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[Keyword] PHS(242hit)

201-220hit(242hit)

  • Bifurcation Phenomena in the Josephson Junction Circuit Coupled by a Resistor

    Tetsushi UETA  Hiroshi KAWAKAMI  

     
    PAPER-Nonlinear Circuits and Bifurcation

      Vol:
    E79-A No:10
      Page(s):
    1546-1550

    Bifurcation Phenomena observed in a circuit containing two Josephson junctions coupled by a resistor are investigated. This circuit model has a mechanical analogue: Two damped pendula linked by a clutch exchanging kinetic energy of each pendulum. In this paper, firstly we study equilibria of the system. Bifurcations and topological properties of the equilibria are clarified. Secondly we analyze periodic solutions in the system by using suitable Poincare mapping and obtain a bifurcation diagram. There are two types of limit cycles distinguished by whether the motion is in S1R3 or T2R2, since at most two cyclic coordinates are included in the state space. There ia a typical structure of tangent bifurcation for 2-periodic solutions with a cusp point. We found chaotic orbits via the period-doubling cascade, and a long-period stepwise orbit.

  • Josephson Array Oscillators Using Resonant Effects in Shunted Tunnel Junctions

    Akira KAWAKAMI  Zhen WANG  

     
    PAPER-Analog applications

      Vol:
    E79-C No:9
      Page(s):
    1242-1246

    Resonant properties of resistance shunted tunnel junctions have been investigated using the RLCSJ model. We found that an increase in dc current resulted from an increase in impedance of the shunted tunnel junctions. The static and dynamic properties of the shunted tunnel junctions were described in detail by numerical simulations and experiments. The simulated and measured results showed good agreement in I-V characteristics. A Josephson array oscillator has been proposed using the resonant properties for increasing oscillator output impedance. We designed and fabricated the oscillator with 20 shunted tunnel junctions. The output power of the oscillator delivered to the load resistor was estimated to be about 0.5µW at 312 GHz.

  • Josephson Memory Technology

    Suichi TAHARA  Shuichi NAGASAWA  Hideaki NUMATA  Yoshihito HASHIMOTO  Shinichi YOROZU  

     
    INVITED PAPER-Superconductive digital integrated circuits

      Vol:
    E79-C No:9
      Page(s):
    1193-1199

    Superconductive LSIs with Josephson junctions have features such as low power dissipation and high switching speed. In this paper, we review our developed 4-Kbit RAM with vortex transitional memory cells as an illustration of superconductive LSIs with Josephson junctions. We have developed a fabrication process technology for the 4-Kbit RAM. In the 4-Kbit RAM, 380ps access time and 9.8 mW power dissipation have been experimentally obtained. And also, we have estimated a suitable moat structure to reduce the influence of trapped magnetic structure. The 4-Kbit RAM has been successfully operated with a bit yield of 99.8%. Furthermore, we discuss GHz testing which is one of the most significant issues concerning superconductive digital LSIs.

  • Binary Counter with New Interface Circuits in the Extended Phase-Mode Logic Family

    Takeshi ONOMI  Yoshinao MIZUGAKI  TsutomuYAMASHITA  Koji NAKAJIMA  

     
    PAPER-Superconductive digital integrated circuits

      Vol:
    E79-C No:9
      Page(s):
    1200-1205

    A binary counter circuit in the extended phase-mode logic (EPL) family is presented. The EPL family utilizes a single flux quantum as an information bit carrier. Numerical simulations show that a binary counter circuit with a Josephson critical current density of 1 kA/cm2 can operate up to a 30 GHz input signal. The circuit has been fabricated using Nb/AlOx/Nb Josephson junction technology. New interface circuits are employed in the fabricated chip. A low speed test result shows the correct operation of the binary counter.

  • Oscillation Modes in a Josephson Circuit and Its Application to Digital Systems

    Akinori KANASUGI  Mititada MORISUE  Hiroshi NOGUCHI  Masayuki YAMADAYA  Hajime FURUKAWA  

     
    PAPER-Superconductive digital integrated circuits

      Vol:
    E79-C No:9
      Page(s):
    1206-1212

    In this paper, oscillation modes produced in a Josephson circuit and its application to digital systems are described. The analysis is performed using an analog simulator to model the Josephson junction, in addition to computer simulation. The experimental results concerning oscillation modes agree well with the simulation results. The main advantage of the mapping for the oscillation modes is that it allows understanding of the relationships among oscillation modes and circuit parameters at first sight. In addition, a novel application of nonlinear oscillation to digital systems is described.

  • Strato-Mesospheric Ozone Monitoring System Using an SIS Mixer

    Hideo SUZUKI  Minoru SUZUKI  Hideo OGAWA  

     
    INVITED PAPER-Analog applications

      Vol:
    E79-C No:9
      Page(s):
    1219-1227

    We have developed a strato-mesospheric ozone monitoring system with a low noise SIS mixer, which receives 110.836 GHz millimeter-wave emission due to the rotational transition of ozone molecules (J=61,560,6). The system is completely standalone. We derived the altitude profile of ozone density between 25 km and 80 km from the observed spectrum. The receiver noise temperature was as low as 17 K (DSB), so that the altitude profile could be obtained every 3-10 minutes. The monitoring system can operate continuously over one year without any maintenance work, because it utilizes a 4 K closed cycle helium refrigerator and reliable Nb/AIOx/Nb SIS junctions. We used two acousto-optical spectrometers (AOSs) as real-time spectrometers because of their high resolution and simple construction. In an up-to-date system, one AOS would have a band-width of 65 MHz and the other, a band-width of 250 MHz with resolutions of 40 kHz and 250 kHz, respectively. A computer controls the entire system and is also used to analyze measured data. In this paper, we present the principles of system operation, the latest performance and the construction of the system, and some observed data.

  • Fault-Tolerant Graphs for Hypercubes and Tori*

    Toshinori YAMADA  Koji YAMAMOTO  Shuichi UENO  

     
    PAPER-Fault Diagnosis/Tolerance

      Vol:
    E79-D No:8
      Page(s):
    1147-1152

    Motivated by the design of fault-tolerant multiprocessor interconnection networks, this paper considers the following problem: Given a positive integer t and a graph H, construct a graph G from H by adding a minimum number Δ(t, H) of edges such that even after deleting any t edges from G the remaining graph contains H as a subgraph. We estimate Δ(t, H) for the hypercube and torus, which are well-known as important interconnection networks for multiprocessor systems. If we denote the hypercube and the square torus on N vertices by QN and DN respectively, we show, among others, that Δ(t, QN) = O(tN log(log N/t + log 2e)) for any t and N (t 2), and Δ(1, DN) = N/2 for N even.

  • Efficient Parallel Algorithms on Proper Circular Arc Graphs

    Selim G. AKL  Lin CHEN  

     
    PAPER-Algorithms

      Vol:
    E79-D No:8
      Page(s):
    1015-1020

    Efficient parallel algorithms for several problems on proper circular arc graphs are presented in this paper. These problems include finding a maximum matching, partitioning into a minimum number of induced subgraphs each of which has a Hamiltonian cycle (path), partitioning into induced subgraphs each of which has a Hamiltonian cycle (path) with at least k vertices for a given k, and adding a minimum number of edges to make the graph contain a Hamiltonian cycle (path). It is shown here that the above problems can all be solved in logarithmic time with a linear number of EREW PRAM processors, or in constant time with a linear number of BSR processors. A more important part of this work is perhaps the extension of basic BSR to allow simultaneous multiple BROADCAST instructions.

  • Nonadaptive Fault-Tolerant File Transmission in Rotator Graphs

    Yukihiro HAMADA  Feng BAO  Aohan MEI  Yoshihide IGARASHI  

     
    PAPER

      Vol:
    E79-A No:4
      Page(s):
    477-482

    A directed graph G = (V,E) is called the n-rotator graph if V = {a1a2an|a1a2an is a permutation of 1,2,,n} and E = {(a1a2an,b1b2bn)| for some 2 i n, b1b2bn = a2aia1ai+1an}. We show that for any pair of distinct nodes in the n-rotator graph, we can construct n - 1 disjoint paths, each length < 2n, connecting the two nodes. We propose a nonadaptive fault-tolerant file transmission algorithm which uses these disjoint paths. Then the probabilistic analysis of its reliability is given.

  • Implicit Representation and Manipulation of Binary Decision Diagrams

    Hitoshi YAMAUCHI  Nagisa ISHIURA  Hiromitsu TAKAHASHI  

     
    PAPER

      Vol:
    E79-A No:3
      Page(s):
    354-362

    This paper presents implicit representation of binary decision diagrams (implicit BDDs) as a new effecient data structure for Boolean functions. A well-known method of representing graphs by binary decision diagrams (BDDs) is applied to BDDs themselves. Namely, it is a BDD representation of BDDs. Regularity in the structure of BDDs representing certain Boolean functions contributes to significant reduction in size of the resulting implicit BDD repersentation. Since the implicit BDDs also provide canonical forms for Boolean functions, the equivalence of the two implicit BDD forms is decided in time proportional to the representation size. We also show an algorithm to maniqulate Boolean functions on this implicit data structure.

  • Conceptual Graph Programs and Their Declarative Semantics

    Bikash Chandra GHOSH  Vilas WUWONGSE  

     
    PAPER-Artificial Intelligence and Cognitive Science

      Vol:
    E78-D No:9
      Page(s):
    1208-1217

    Conceptual graph formalism is a knowledge representation language in AI based on a graphical form of logic. Although logic is the basis of the conceptual graph theory, there is a strongly felt absence of a formal treatment of conceptual graphs as a logic programming language. In this paper, we develop the notion of a conceptual graph program as a kind of graph-based order-sorted logic program. First, we define the syntax of the conceptual graph program by specifying its major syntactic elements. Then, we develop a kind of model theoretic semantics and fixpoint semantics of the conceptual graph program. Finally, we show that the two types of semantics coincide for the conceptual graph programs.

  • High-Tc Superconducting Active Slot Antenna with a YBCO Step-Edge Josephson Junction Array

    Wataru CHUJO  Hisashi SHIMAKAGE  Zhen WANG  Bokuji KOMIYAMA  

     
    PAPER

      Vol:
    E78-C No:8
      Page(s):
    1007-1011

    The high-Tc superconducting active antenna proposed here for millimeter and submillimeter radiowave communications, uses a YBCO slot antenna with a series Josephson junction array to increase the normal-state resistance of the junctions, in order to ensure impedance matching between the antenna and the junctions. The antenna is a coplanar waveguide fed slot antenna, which can be easily and monolithically combined with the Josephson junctions. The design frequency of the antenna is 10 GHz and the obtained bandwidth of a VSWR less than 2 was 4.1%. Normal-state resistance values of the junction array could be confirmed by measuring I-V characteristics and 100-MHz impedance measurements, and both agree very well. Microwave mixing experiments were carried out using the junction array with the antenna, and the experiments showed that the conversion gain of the junction was proportional to the number of the junctions. The conversion gain of an eight-junction mixer with the antenna was found to be -6 dB.

  • 1-V Josephson-Junction Array Voltage Standrd and Development of 10-V Josephson Junction Array at ETL

    Tadashi ENDO  Yasuhiko SAKAMOTO  Yasushi MURAYAMA  Akio IWASA  Haruo YOSHIDA  

     
    INVITED PAPER-Voltage standard

      Vol:
    E78-C No:5
      Page(s):
    503-510

    Recenty, the Josephson effect-based voltage standard has been realized by using the Josephson junction array which is constructed by integrating many Josephson junctions. In this article, the 1-V Josephson-junction-array voltage standard used in routine calibration work and further development of the 10-V Josephson junction array at the Electrotechnical Laboratory (ETL) are introduced.

  • Co-planar Josephson Junction Using Nonsuperconductive YBaCuO Formed on Very Locally Damaged Substrate by FIB

    Yunnghee KIM  Yoshihisa SOUTOME  Hiroshi KIMURA  Yoichi OKABE  

     
    PAPER-Three terminal devices and Josephson Junctions

      Vol:
    E78-C No:5
      Page(s):
    471-475

    A YBaCuO-Nonsuperconductive YBaCuO-YBaCuO coplanar Josephson junction has been fabricated, using Nonsuperconductive YBaCuO thin film deposited on an MgO(100) substrate with intentional and very local damage which was created by Focused Ion Beam. The YBaCuO grown on the damaged section of the substrate turned out to be non-superconductor, due to implanted Ga ions and the change in the crystal quality, facilitating formation of an S-N-S junction. We found the important fact that the critical current density decreased exponentially with inverse of the junction length which was changed from 0.2 to 1 µm, and that Ga ion was detected in the thin films of the junctions, and that the thin films of the junctions were formed by a mixture of an amorphous, a polycrystal and a crystal, which is confirmed by Transmission Electron Diffraction. And the damaged substrate gave rise to Ga segregation and the mixed crystal, which played an very important role to form the normal metallic YBCO thin film of the Josephson junction. All these facts are related with the S-N-S junctions.

  • Neuro-Base Josephson Flip-Flop

    Yoshinao MIZUGAKI  Koji NAKAJIMA  Tsutomu YAMASHITA  

     
    PAPER-Superconducting integrated circuits

      Vol:
    E78-C No:5
      Page(s):
    531-534

    We present a superconducting neural network which functions as an RS flip-flop. We employ a coupled-SQUID as a neuron, which is a combination of a single-junction SQUID and a double-junction SQUID. A resistor is used as a fixed synapse. The network consists of two neurons and two synapses. The operation of the network is simulated under the junction current density of 100 kA/cm2. The result shows that the network is operated as an RS flip-flop with clock speed capability up to 50 GHz.

  • Comparison of Josephson Microwave Self-Radiation and Linewidth Properties in Various YBa2Cu3Oy Grain Boundary Junctions

    Kiejin LEE  Ienari IGUCHI  

     
    PAPER-Microwave devices

      Vol:
    E78-C No:5
      Page(s):
    490-497

    We have investigated the Josephson microwave self-radiation and the linewidth from different types of YBa2Cu3Oy(YBCO) grain boundary junctions: natural grain boundary junctions, step-edge junctions and bicrystal junctions. The Josephson self-rediation was directly observed using a total power radiometer receiver with receiving frequencies fREC=1.7-72 GHz. All junctions exhibited microwave self-radiation peaks with intensity of order of 10-12-10-14 W. For step-edge and bicrystal junction, they appeared at a voltage related to the Josephson frequency-voltage relation, V=n(h/2e)f, while for natural grain boundary junctions, the above relation did not hold, suggesting a Josephson medium property. For all types of junctions the observed Josephson linewidth deviated from the theoretical RSJ values due to the extra noise source in the grain boundary junction. The Josephson linewidth decreased with increasing the receiving frequency for all type of junctions. The reduction of Josephson linewidth at higher frequencies indicates that the critical current fluctuations due to a critical current spread at small bias voltages and a crystalline disorientation at the junction boundary generate an additional noise in grain boundary junctions.

  • A Monolithic GaAs Linear Power Amplifier Operating with a Single Low 2.7-V Supply for 1.9-GHz Digital Mobile Communication Applications

    Masami NAGAOKA  Tomotoshi INOUE  Katsue KAWAKYU  Shuichi OBAYASHI  Hiroyuki KAYANO  Eiji TAKAGI  Yoshikazu TANABE  Misao YOSHIMURA  Kenji ISHIDA  Yoshiaki KITAURA  Naotaka UCHITOMI  

     
    PAPER-Analog Circuits

      Vol:
    E78-C No:4
      Page(s):
    424-429

    A monolithic linear power amplifier IC operating with a single low 2.7-V supply has been developed for 1.9-GHz digital mobile communication systems, such as the Japanese personal handy phone system (PHS). Refractory WNx/W self-aligned gate GaAs power MESFETs have been successfully developed for L-band power amplification, and this power amplifier operates with high efficiency and low distortion at a low voltage of 2.7 V, without any additional negative voltage supply, by virtue of small drain knee voltage, high transconductance and sufficient breakdown voltage of the power MESFET. An output power of 23.0 dBm and a high power-added efficiency of 30.8% were attained for 1.9-GHz π/4-shifted QPSK (quadrature phase shift keying) modulated input when adjacent channel leakage power level was less than -60 dBc at 600 kHz apart from 1.9 GHz.

  • Bifurcation of an Inductively Coupled Josephson Junction Circuit

    Tetsushi UETA  Hiroshi KAWAKAMI  

     
    PAPER-Analysis of Nonlinear Circuits and Systems

      Vol:
    E77-A No:11
      Page(s):
    1758-1763

    Some qualitative properties of an inductively coupled circuit containing two Josephson junction elements with a dc source are investigated. The system is described by a four–dimensional autonomous differential equation. However, the phase space can be regarded as S1×R3 because the system has a periodicity for the invariant transformation. In this paper, we study the properties of periodic solutions winding around S1 as a bifurcation problem. Firstly, we analyze equilibria in this system. The bifurcation diagram of equilibria and its topological classification are given. Secondly, the bifurcation diagram of the periodic solutions winding around S1 are calculated by using a suitable Poincar mapping, and some properties of periodic solutions are discussed. From these analyses, we clarify that a periodic solution so–called "caterpillar solution" is observed when the two Josephson junction circuits are weakly coupled.

  • Logic Synthesis and Optimization Algorithm of Multiple-Valued Logic Functions

    Ali Massound HAIDAR  Mititada MORISUE  

     
    PAPER-Algorithm and Computational Complexity

      Vol:
    E77-D No:10
      Page(s):
    1106-1117

    This paper presents a novel and successful logic synthesis method for optimizing ternary logic functions of any given number of input variables. A new optimization algorithm to synthesize and minimize an arbitrary ternary logic function of n-input variables can always lead this function to optimal or very close to optimal solution, where [n (n1)/2]1 searches are necessary to achieve the optimal solution. Therefore, the complexity number of this algorithm has been greatly reduced from O(3n) into O(n2). The advantages of this synthesis and optimization algorithm are: (1) Very easy logic synthesis method. (2) Algorithm complexity is O(n2). (3) Optimal solution can be obtained in very short time. (4) The method can solve the interconnection problems (interconnection delay) of VLSI and ULSI processors, where very fast and parallel operations can be achieved. A transformation method between operational and polynomial domains of ternary logic functions of n-input variables is also discussed. This transformation method is very effective and simple. Design of the circuits of GF(3) operators, addition and multiplication mod-3, have been proposed, where these circuits are composed of Josephson junction devices. The simulation results of these circuits and examples show the following advantages: very good performances, very low power consumption, and ultra high speed switching operation.

  • Off-Chip Superconductor Wiring in Multichip Module for Josephson LSI Circuit

    Shigeo TANAHASHI  Takanori KUBO  Ryoji JIKUHARA  Gentaro KAJI  Masami TERASAWA  Munecazu TACANO  Hiroshi NAKAGAWA  Masahiro AOYAGI  Itaru KUROSAWA  Susumu TAKADA  

     
    INVITED PAPER-LTS

      Vol:
    E77-C No:8
      Page(s):
    1157-1163

    A superconducting multichip module using Nb/Polyimide on a mullite multilayer ceramic substrate has been developed for Josephson LSI circuits. The Nb/Polyimide stacked layers on the mullite multilayer ceramic substrate makes it possible to fabricate superconducting off-chip wiring for control signal line. We named the MCM "SuperMCM". The superconducting transmission line is designed to have the characteristic impedance of 14 Ω to match with the Josephson devices. The superconducting critical temperature, critical current density and critical current at a via hole are 8.5 K, 8.2105 A/cm2 and 2.5 A, respectively. The SuperMCM also provides matching circuits employing quarter wavelength striplines for driving Josephson LSI circuits at a microwave frequency, and DC bias circuits in the mullite multilayer ceramic substrate. The characteristics of the matching circuit is measured in the frequency range up to 3.6 GHz and the microwave current gain of 20 dB is obtained at 1.2 GHz, which revealed that the SuperMCM has the ability to drive the Josephson LSI circuits at more than 1.2 GHz clock speed.

201-220hit(242hit)