Sr0. 7Bi2. 3Ta2O9(SBT) films are drawing attention as fatigue-free materials. We prepared an SBT film containing discontinuous crystals in the Bi-layered compound using a misted deposition method. In comparison to films prepared by the spin-on method, leakage current was low and spontaneous polarization is high but saturation performance was low. The low saturation performance seems attributable to the inclusion of discontinuous crystals in the Bi-layered compound, while the low leakage current may be explained by the films smaller, denser particles, which form a film without voids, resulting in higher uniformity. The misted deposition method has advantages of finer grain size and higher uniformity.

A formal necessary and sufficient condition on the general Petri net reachability problem is presented by eliminating all spurious solutions among known nonnegative integer solutions of state equation and unifying all the causes of those spurious solutions into a maximal-strongly-connected and siphon-and-trap subnet Nw. This result is based on the decomposition of a given net (N, Mo) with Md and the concepts of "no immature siphon at the reduced initial marking Mwo" and "no immature trap at the reduced end marking Mwd" on Nw which are both extended from "no token-free siphon at the initial marking Mo" and "no token-free trap at the end marking Md" on N, respectively, which have been both effectively, explicitly or implicitly, used in the well-known fundamental and simple subclasses.

In this paper, we propose a new structure of the frequency domain adaptive filter (FDAF). The proposed structure is based on the modified DFT pair which consists of the FIR filters, so that un-delayed output signal can be obtained with stable convergence and without accumulated error which are problems for the conventional FDAFs. The convergence performance of the proposed FDAF is examined through the computer simulations in the adaptive line enhancer (ALE) comparing with the conventional FDAF and the DCT domain adaptive filter. Furthermore, in order to improve the error performance of the FDAF, we propose a composite algorithm which consists of the normalized step size algorithm for fast convergence and the variable step size one for small estimation error. The advantage of the proposed algorithm is also confirmed through simulations in the ALE. Finally, we propose a reduction method of the computational complexity of the proposed FDAF. The proposed method is to utilize a part of the FFT flow-graph, so that the computational complexity is reduced to O(N log N).

The post-annealing process has been investigated for (Ba, Sr)TiO3 [BST] thin films employed as a capacitor dielectric in 1 Gbit dynamic random access memories (DRAMs). The effects of post-annealing on morphology, crystallinity, and dielectric properties were examined for thin film capacitors with BST prepared on Pt electrodes by liquid source chemical vapor deposition (CVD). The direct annealing of BST capacitors caused a roughening in surface morphology of the upper Pt electrodes and BST films. However, the post-annealing of capacitors with a silicon dioxide passivation layer was found to cause little change in surface morphology of Pt and BST, and also no significant deterioration in leakage current. The improvement in crystallinity of BST films through post-annealing was confirmed at a temperature in the range 700-850 by X-ray diffraction (XRD) and transmission electron microscope (TEM). Moreover, the post-annealing experiments for BST films with different compositions showed that the post-annealing greatly increases the dielectric constant of BST films having approximately stoichiometric composition. The leakage and breakdown properties of BST films were also examined, indicating that excess Ti ions result in an increase of the turn-on voltage and the breakdown time. Based on these investigations, the electrical properties of dielectric constant ε 260, equivalent silicon dioxide thickness teq 0. 44 nm, and leakage current JL110-7 A/cm2 at 1. 9 V were successfully obtained for stoichiometric 30-nm-thick BST films post-annealed at 750. Hence, it can be concluded that the post-annealing is a promising technique to enhance the applicability of CVD-deposited BST films with conformal coverage to memory cell capacitors of 1 Gbit DRAMs.

Basic structural characteristics, which are useful in modular synthesis based on strongly connected state machines, of SMA/LBFC nets are discussed in this paper. A more convincing and direct proof of the equivalence of two structural characterization of the class of Petri nets is given. This proof will give clearer view of the structural characteristics of LBFC/SMA nets. On the other hand, however, the structural characteristics are not practically amenable in application to modular synthesis of SMA nets from a given set of SCSM's since all possible SCSM's should be examined for the verification of the given conditions. The later half of this paper is devoted into strengthening the results, i. e. , in composition of an SMA net from a given set of SCSM's the condition is also satisfied in any SCSM generated by composition.

Using transmission electron microscopy (TEM), we studied structural defects in a Sr0. 7Bi2. 3Ta2O9 (SBT) thin film to be used for ferroelectric memory devices. We examined the effects of the substrate, crystal continuity, and dislocations in crystals as major causes of defects. For this study, we used an SBT thin film grown from an alkoxide solution. Since crystal growth was hardly influenced by the substrate, the substrate had little influence on the occurrence of defects resulted in misfit of lattice constant. Regions of partially low crystal continuity were observed in the SBT thin film. In these regions, the orientation was still uniform, but the continuity of the crystal grain was low because of the defects. In addition, variation in contrast was observed in the crystals, however, no obvious variation in chemical composition was found in this region of varying contrast. Therefore, the contrast variation is considered to be attributed to the dislocation. Such a dislocation was found to be occurred in the direction of the (2010) plane in many instances. The defects in the SBT film were also confirmed by the TEM observation.

In this paper, we give a new approach to the computation of primary decomposition and associated prime components of a zero-dimensional polynomial ideal (f1,f2,. . . ,fn), where fi are multivariate polynomials on Z (the ring of integer). Over the past several years, a considerable number of studies have been made on the computation of primary decomposition of a zero-dimensional polynomial ideal. Many algorithms to compute primary decomposition are proposed. Most of the algorithms recently proposed are based on Groebner basis. However, the computation of Groebner basis can be very expensive to perform. Some computations are even impossible because of the physical limitation of memory in a computer. On the other hand, recent advance in numerical methods such as homotopy method made access to the zeros of a polynomial system relatively easy. Hence, instead of Groebner basis, we use the zeros of a given ideal to compute primary decomposition and associated prime components. More specifically, given a zero-dimensional ideal, we use LLL reduction algorithm by Lenstra et al. to determine the integer coefficients of irreducible polynomials in the ideal. It is shown that primary decomposition and associated prime components of the ideal can be computed, provided the zeros of the ideal are computed with enough accuracy. A numerical experiment is given to show effectiveness of our algorithm.

In this paper, we propose a transformation technique for the multiplications of one variable with multiple constants, which are frequently seen in the various applications of signal processing, image processing, and so forth. The method is based on the exploration of common subexpressions among constants and reduces the number of shifts, additions, and subtractions to implement linear computations with hardware. Our method searches for regularity among elements of a linear transform using matrix decomposition and generates a reduced data-flow graph which preserves the full regularity. We show experimental results obtained using Discrete Cosine Transform (DCT) and Fast Fourier Transform (FFT) and illustrate the effectiveness of the method.

FIR digital filters composed of parallel multiple subfilters are proposed. A binary expression of an input signal is decomposed into multiple shorter words, which drive the subfilters having different length. The output error is evaluated by mean squared and maximum spectra. A fast algorithm is also proposed to determine optimal filter lengths and coefficients of subfilters. Many examples confirm that the proposed filters generate smaller output errors than conventional filters under the condition of specified number of multiplications and additions in filter operations. Further, multiplier and adder structures (MAS) to perform the operations of the proposed filters are also presented. The number of gates used in the proposed MAS and its critical path are estimated. The effectiveness of the proposed MAS is confirmed.

We describe an algorithm for efficiently compositing partial images generated during parallel volume rendering on a distributed memory parallel computer. In this object space partitioning algorithm, each PE is assigned to several subvolumes where each subvolume has a corresponding local frame buffer. After volume rendering is performed independently for each subvolume, the partial images stored in the local frame buffers are combined to generate a complete image. During this compositing process, the communication of partial image data between the PEs is kept minimal by assigning PEs to subvolumes in an interleaved manner. This assignment makes possible a reduction in communication in the axis direction in which there is the most communication. Experimental results indicate that a 9% to 35% reduction in the total rendering time can be attained with no additional data structures and no memory overhead.

This paper proposes a time-interval data model in which all temporal representation and operations can be expressed with time intervals. The model expresses not only real time intervals, in which an event exists, but also null time intervals, in which an event is suspended. We model the history of a real-world event as a composite time interval, which is defined in this paper. Operations on the composite time intervals are also defined, and it is shown how these operations can be used to express temporal constraints with time intervals.

A method is proposed for estimating the error of whole-body average specific absorption rate (SAR) of an infinite-length cylindrical model of man exposed to TM microwave. At high frequencies, the average SAR of the infinite-length cylindrical model is approximately 5% smaller than that of the finite-length cylindrical model.

Three-dimensional (3-D) instrumentation using an image sequence is a promising instrumentation method for intelligent systems in which accurate 3-D information is required. However, real-time instrumentation is difficult since much computation time and a large memory bandwidth are required. In this paper, a 3-D instrumentation VLSI processor with a concurrent memory-access scheme is proposed. To reduce the access time, frequently used data are stored in a cache register array and are concurrently transferred to processing elements using simple interconnections to the 8-nearest neighbor registers. Based on a row and column memory access pattern, we propose a diagonally interleaved frame memory by which pixel values of a row and column are stored across memory modules. Based on the concurrent memory-access scheme, a 40 GOPS vprocessor is designed and the delay time for the instrumentation is estimated to be 42 ms for a 256256 images.

One of the polarimetric radar applications is classification or identification of targets making use of the scattering matrix. This paper presents a decomposition scheme of a scattering matrix into three elementary scattering matrices in the circular polarization basis. The elementary components are a sphere, a diplane (dihedral corner reflector), and a helix. Since a synthetic aperture FM-CW radar provides scattering matrix through a polarimetric measurement, this decomposition scheme was applied to the actual raw data, although the matrix is resulted from a swept frequency measurement. Radar imaging experiments at the Ku band (14.5-15.5GHz) were carried out to obtain a total of 6464 scattering matrices in an imaging plane, using flat plates, corner reflectors and wires as elementary radar targets for classification. It is shown that the decomposition scheme has been successfully carried out to distinguish these targets and that the determination of rotation angle of line target is possible if the scattering matrix is classified as a wire.

In this paper, we introduce a Shared Multiple Rooted XOR-based Decomposition Diagram (XORDD) to represent functions with multiple outputs. Based on the XORDD representation, we develop a synthesis algorithm for general Exclusive Sum-of-Product forms (ESOP). By iteratively applying transformations and reductions, we obtain a compact XORDD which gives a minimized ESOP. Our method can synthesize larger circuits than previously possible. The compact ESOP representation provides a form that is easier to synthesize for XOR heavy multi-level circuits, such as arithmetic functions. We have applied our synthesis techniques to a large set of benchmark circuits in both PLA and combinational formats. Results of the minimized ESOP forms obtained from our synthesis algorithm are also compared to the SOP forms generated by ESPRESSO. Among the 74 circuits we have experimented with, the minimized ESOP's have fewer product terms than those of SOP's in 39 circuits.

This paper presents a logic synthesis method for look-up table (LUT) based field programmable gate arrays (FPGAs). We determine functions to be mapped to LUTs by functional decomposition for each of single-output functions. To share LUTs among several functions, we use a new Boolean resubstitution technique. Resubstitution is used to determine whether an existing function is useful to realize another function; thus, we can share common functions among two or more functions. The Boolean resubstitution proposed in this paper is customized for an LUT network synthesis because it is based on support minimization for an incompletely specified function. Experimental results show that our synthesis method produces a small size circuit in a practical amount of time.

This study shows the results of evaluating the flux noises at low frequency when the alternating current(AC) bias direct offset integrated technique(DOIT) with additional positive feedback (APF) is used in a high-Tc dc superconducting quantum interference device (SQUID). The AC-bias DOIT can reduce low-frequency noise without increasing the level of white noise because each operating point in the two voltage-flux characteristics with AC bias can always be optimum on the magnetometer in the high-Tc dc-SQUID. APF can improve the effective flux-to-voltage transfer function so that it can reduce the equivalent flux noise due to the voltage noise of the preamplifier in the magnetometer. The use of APF combined with the AC-bias DOIT reduced the noise of the magnetometer by factors of 1.5 (33µΦ0/Hz vs. 50 µΦ0/Hz) at100 Hz, 3.5 (43 µΦ0/Hz vs. 150 µΦ0/Hz) at 10 Hz, and 5.2 (67 µΦ0/Hz vs. 351 µΦ0/Hz) at 1 Hz as compared with the noise levels that were obtained with the static-current-bias DOIT. The contribution of the factors at 1 Hz is about 2 by APF and 2.6 by AC bias. The performance of improving the flux noise in the AC -bias DOIT with APF is almost equal to that of the flux locked loop (FLL) circuits in which the flux modulation uses a coupling system with a transformer and with the AC bias.

Field Programmable Gate Arrays (FPGA's) are important devices for rapid system prototyping. Roth-Karp decomposition is one of the most popular decomposition techniques for Look-Up Table (LUT) -based FPGA technology mapping. In this paper, we propose a novel algorithm based on Binary Decision Diagrams (BDD's) for selecting good lambda set variables in Roth-Karp decomposition to minimize the number of consumed configurable logic blocks (CLB's) in FPGA's. The experimental results on a set of benchmarks show that our algorithm can produce much better results than the similar works of the previous approaches.

Materials for a new reinforcement method using an internal heating technique have been developed experimentally for fusion splices. The method employs a protective package of a carbon-fiber composite and a hot-melt adhesive in a heat-shrinkable tube. The most appropriate heating current and heating time were determined from a consideration of the decomposition temperature of the adhesive (300) and the complete shrinking temperature (115) and the minimum welding temperature of Nylon 12 (about 180). The protective package can be installed in less than 30 seconds at a power of 10 W. Air bubbles which might cause microbending were completely eliminated by using Nylon 12 as the hot-melt adhesive, irradiated polyethylene as the heat-shrinkable tube and a carbon-fiber-composite electrical heating rod which also acted a tension member. The key for preparing the carbon-fiber composite was to remove its impurities. Under the condition of temperature difference larger than 40 deg. between the shrinking temperature of the heat-shrinkable tube and the melting temperature of the hot-melt adhesive. Nylon 12 and irradiated polyethylene were needed for the complete elimination of residual bubbles. By using Nylon 12 as the hot-melt adhesive, a reliable protective package could be achieved for a fusion spliced optical fiber with a low excess loss of less than 0.06 dB/splice between -60 and +70 and a high tensile strength of 3.9 kg.

Linear programming techniques are useful in many diverse applications such as: production planning, energy distribution etc. To find an optimal solution of the linear programming problem, we have to repeat computations and it takes a lot of processing time. For high speed computation of linear programming, special purpose hardware has been sought. This paper proposes a systolic array for solving linear programming problems using the revised simplex method which is a typical algorithm of linear programming. This paper also proposes a modified systolic array that can solve linear programming problems whose sizes are very large.