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[Keyword] Small signal(10hit)

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  • On the Large Signal Evaluation and Modeling of GaN FET

    Iltcho ANGELOV  Mattias THORSELL  Kristoffer ANDERSSON  Akira INOUE  Koji YAMANAKA  Hifumi NOTO  

     
    PAPER-GaN-based Devices

      Vol:
    E93-C No:8
      Page(s):
    1225-1233

    The large signal performance and model for GaN FET devices was evaluated with DC, S-parameters, and large signal measurements. The large signal model was extended with bias and temperature dependence of access resistances, modified capacitance and charge equations, as well as breakdown models. The model was implemented in a commercial CAD tool and exhibits good overall accuracy.

  • InP-Based Unipolar Heterostructure Diode for Vertical Integration, Level Shifting, and Small Signal Rectification

    Werner PROST  Dudu ZHANG  Benjamin MUNSTERMANN  Tobias FELDENGUT  Ralf GEITMANN  Artur POLOCZEK  Franz-Josef TEGUDE  

     
    PAPER-III-V Heterostructure Devices

      Vol:
    E93-C No:8
      Page(s):
    1309-1314

    A unipolar n-n heterostrucuture diode is developed in the InP material system. The electronic barrier is formed by a saw tooth type of conduction band bending which consists of a quaternary In0.52(AlyGa1-y)0.48As layer with 0 < y < ymax. This barrier is lattice matched for all y to InP and is embedded between two n+-InGaAs layers. By varying the maximum Al-content from ymax,1 = 0.7 to ymax,2 = 1 a variable barrier height is formed which enables a diode-type I-V characteristic by epitaxial design with an adjustable current density within 3 orders of magnitude. The high current density of the diode with the lower barrier height (ymax,1 = 0.7) makes it suitable for high frequency applications at low signal levels. RF measurements reveal a speed index of 52 ps/V at VD = 0.15 V. The device is investigated for RF-to-DC power conversion in UHF RFID transponders with low-amplitude RF signals.

  • Comprehensive Matching Characterization of Analog CMOS Circuits

    Hiroo MASUDA  Takeshi KIDA  Shin-ichi OHKAWA  

     
    PAPER

      Vol:
    E92-A No:4
      Page(s):
    966-975

    A new analog mismatch model in circuit level has been developed. MOS transistor's small signal parameters are modeled in term of their matching character for both strong- and weak-inversion operations. Mismatch analysis on basic CMOS amplifiers are conducted with proposed model and Monte Carlo SPICE simulations. We successfully derived simple analytical formula on performance mismatch for analog CMOS circuits, which is verified to be accurate in using actual analog circuit design, within an average error of less than 10%.

  • A Novel Approach for Parameter Determination of HBT Small-Signal Equivalent Circuit

    Han-Yu CHEN  Kun-Ming CHEN  Guo-Wei HUANG  Chun-Yen CHANG  

     
    PAPER-Model

      Vol:
    E88-C No:6
      Page(s):
    1133-1141

    Direct parameter extraction is believed to be the most accurate method for equivalent-circuits modeling of heterojunction bipolar transistors (HBT's). Using this method, the parasitic elements, followed by the intrinsic elements, are determined analytically. Therefore, the quality of the extrinsic elements extraction plays an important role in the accuracy and robustness of the entire extraction algorithm. This study proposes a novel extraction method for the extrinsic elements, which have been proven to be strongly correlated with the intrinsic elements. By utilizing the specific correlation, the equivalent circuit modeling is reduced to an optimization problem of determining six specific extrinsic elements. Converting the intrinsic equivalent circuit into its common-collector configuration, all intrinsic circuit elements are extracted using exact closed-form equations for both the hybrid-π and the T-topology equivalent circuits. Additionally, a general explicit equation on the total extrinsic elements is derived, subsequently reducing the number of optimization variables. The modeling results are presented, showing that the proposed method can yield a good fit between the measured and calculated S parameters.

  • The Structures of CPW PHEMT's for Applications of Millimeter-Waves

    Byeong-Ok LIM  Tae-Shin KANG  Bok-Hyung LEE  Mun-Kyo LEE  Jin-Koo RHEE  

     
    PAPER

      Vol:
    E87-A No:6
      Page(s):
    1323-1329

    The parasitic capacitances induced in the spaces between an air-bridge interconnection and a drain pad (Cad), and between an air-bridge interconnection and a gate head (Cag) from a power CPW PHEMT are not negligible. In this paper, a modified equivalent circuit model for a CPW PHEMT and an improved CPW PHEMT for millimeter-wave applications are proposed. These were proved by measuring the fabricated CPW PHEMT and improved CPW PHEMT. These capacitances were confirmed by measuring the gate-source coupling using CPW PHEMT patterns without an active layer. From the measurements, the improved CPW PHEMT has the lowest coupling (loss) and the highest S21 gain among four different types tested at 60 GHz. And the improved CPW PHEMT is a feasible device which can be directly applied in millimeter-waves as a power device.

  • Determination of Small-Signal Parameters and Noise Figures of MESFET's by Physics-Based Circuit Simulator Employing Monte Carlo Technique

    Takao ISHII  Masahiro NAKAYAMA  Teruyuki TAKEI  Hiroki I. FUJISHIRO  

     
    PAPER

      Vol:
    E86-C No:8
      Page(s):
    1472-1479

    We present a physics-based circuit simulator employing the Monte Carlo (MC) particle technique, which serves as a bridge between the small-device physics and the circuit designs. Two different geometries of GaAs-MESFET's are modeled and analyzed by the simulator. The Y-parameters of the devices are extracted from the transient currents, and then translated into the S-parameters. The cut-off frequency (fT) is estimated from the Y-parameters. The minimum noise figure (Fmin) is also estimated by evaluating the fluctuation in the stationary current. The device, having the n+-region placed just at the drain side of the gate, exhibits the better performances in both fT and Fmin. The analysis on the equivalent circuit (EC) elements reveals that its better performances are mainly due to the reduced gate-source capacitance (Cgs) and the increased transconductance (gm0), which result from the shortened effective gate length (Lg) caused by the termination of the depletion region at the gate edge. The termination of the depletion region, however, causes the increase of the electric field, which results in the higher heat generation rate near the gate edge. It is proven that the physics-based circuit simulator developed here is fully effective to see the inside of the small-device and to model it for the millimeter-wave circuit design.

  • A New Method for the Determination of the Extrinsic Resistances of MESFETs and HEMTs from the Measured S-Parameters under Active Bias

    Jong-Sik LIM  Byung-Sung KIM  Sangwook NAM  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E85-C No:3
      Page(s):
    839-846

    A new method is proposed for determining the parasitic extrinsic resistances of MESFETs and HEMTs from the measured S-parameters under active bias. The proposed method is based on the fact that the difference between drain resistance (Rd) and source resistance (Rs) can be found from the measured S-parameters under zero bias condition. It is possible to define the new internal device including intrinsic device and three extrinsic resistances by eliminating the parasitic imaginary terms. Three resistances can be calculated easily via the presented explicit three equations, which are induced from the fact that 1) the real parts of Yint,11 and Yint,12 of intrinsic Y-parameters are very small or almost zero, 2) the transformation relations between S-, Z-, and Y-matrices. The modelled S-parameters calculated by the obtained resistances and all the other equivalent circuit parameters are in good agreement with the measured S-parameters up to 40 GHz.

  • Non-Quasi-Static Small Signal Model of Four-Terminal MOS Transistors

    Yoichiro NIITSU  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E83-C No:12
      Page(s):
    1950-1960

    Precise simulation of non-quasi-static (NQS) characteristics is crucial for the analog application of MOS transistors. This paper presents the small signal admittance model of four-terminal NQS MOS transistors by solving the differential equation derived from the primary principle. The model contains the bulk-charge effect, the mobility reduction, and the velocity saturation. The results are compared with those for the conventional quasi-static model, the BSIM3v3 NQS model, and the 2-D device simulation.

  • A Monte-Carlo Method to Analyze the Small Signal Response of the Semiconductor Carriers

    Mihail NEDJALKOV  Hans KOSINA  Siegfried SELBERHERR  

     
    PAPER-Device Modeling and Simulation

      Vol:
    E83-C No:8
      Page(s):
    1218-1223

    An approach for analysis of the small signal response of the carriers in semiconductors is presented. The integro-differential equation, describing the phenomenon in the time domain is transformed into a Fredholm integral equation of the second kind. The response of the carrier system to a small signal of a general time dependence can be calculated by the knowledge of the response to an impulse signal, defined by a delta function in time. For an impulse signal, the obtained integral equation resembles the basic structure of the integral form of the time dependent (evolution) Boltzmann equation. Due to this similarity a physical model of the impulse response process is developed. The model explains the response to an impulse signal in terms of a relaxation process of two carrier ensembles, governed by a Boltzmann equation. A Monte-Carlo method is developed which consists of algorithms for modeling the initial distribution of the two ensembles. The numerical Monte-Carlo theory for evaluation of integrals is applied. The subsequent relaxation process can be simulated by the standard algorithms for solving the Boltzmann equation. The presented simulation results for Si and GaAs electrons serve as a test of the Monte-Carlo method and demonstrate that the physical model can be used for explanation of the small signal response process.

  • Simple Small-Signal Model for 3-Port MOS Transistors

    Yoichiro NIITSU  

     
    LETTER-Semiconductor Materials and Devices

      Vol:
    E79-C No:12
      Page(s):
    1760-1765

    The inclusion of the non-quasi-static effect is crucial in the simulation of the microwave circuits for MOS transistors. This report proposes a simple model which includes this effect in small-signal simulation. The simulated results are consistent with the measured data up to a frequency that is 30 times higher frequency than the cut-off frequency.