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  • Generating a Binary Markov Chain by a Discrete-Valued Auto-Regressive Equation

    Junichi NAKAYAMA  Hiroya MOTOYAMA  

     
    LETTER-Digital Signal Processing

      Vol:
    E76-A No:12
      Page(s):
    2114-2118

    This paper gives a systematic approach to generate a Markov chain by a discrete-valued auto-regressive equation, which is a a nonlinear auto-regressive equation having a discrete-valued solution. The power spectrum, the correlation function and the transition probability are explicitly obtained in terms of the discrete-valued auto-regressive equation. Some computer results are illustrated in figures.

  • An Autocorrelation Associative Neural Network with Self-Feedbacks

    Hiroshi UEDA  Masaya OHTA  Akio OGIHARA  Kunio FUKUNAGA  

     
    LETTER

      Vol:
    E76-A No:12
      Page(s):
    2072-2075

    In this article, the autocorrelation associative neural network that is one of well-known applications of neural networks is improved to extend its capacity and error correcting ability. Our approach of the improvement is based on the consideration that negative self-feedbacks remove spurious states. Therefore, we propose a method to determine the self-feedbacks as small as possible within the range that all stored patterns are stable. A state transition rule that enables to escape oscillation is also presented because the method has a possibility of falling into oscillation. The efficiency of the method is confirmed by means of some computer simulations.

  • Computing the Expected Maximum Number of Vertex-Disjoint s-t Paths in a Probabilistic Basically Series-Parallel Digraph

    Peng CHENG  Shigeru MASUYAMA  

     
    PAPER-Graphs, Networks and Matroids

      Vol:
    E76-A No:12
      Page(s):
    2089-2094

    In this paper, we propose a polynomial time algorithm for computing the expected maximum number of vertex-disjoint s-t paths in a probabilistic basically series-parallel directed graph and a probabilistic series-parallel undirected graph with distinguished source s and sink t(st), where each edge has a mutually independent failure probability and each vertex is assumed to be failure-free.

  • A Hybrid-ARQ Protocol with Adaptive Rate Error Control

    Hui ZHAO  Toru SATO  Iwane KIMURA  

     
    PAPER-Information Theory and Coding Theory

      Vol:
    E76-A No:12
      Page(s):
    2095-2101

    This paper presents an adaptive rate error control scheme for digital communication over time-varying channels. The cyclic code with majority-logic decoding is used in a cascaded way as an inner code to create a simple and powerful hybrid-ARQ error control scheme. Inner code is used only for error correction and the outer code is used for both error correction and error detection. When an error is detected, retransmission is required. The unsuccessful packets are not discarded as with conventional schemes, but are combined with their retransmitted copies. Approximations for the throughput efficiency and the undetectable error probability are given. A high reliability coupled with a simple high-speed implementation makes it suitable for high data rate error control over both stationary and nonstationary channels. Adaptive error control scheme becomes the best solution for time-varying channels when the optimum code is selected according to the actual channel conditions to enhance the system performance. The main feature of this system is that the basic structure of the encoder and decoder need not be modified while the error-correction capability of the code increases. Results of a comparative analysis show that the proposed scheme outperforms other similar ARQ protocols.

  • A Fuzzy Inference LSI for an Automotive Control

    Yoshihisa HARATA  Norikazu OHTA  Kiyoharu HAYAKAWA  Takashi SHIGEMATSU  Yasushi KITA  

     
    PAPER

      Vol:
    E76-C No:12
      Page(s):
    1780-1787

    Fuzzy control is suitable for automotive control, because fuzzy control achieves controllability as good as control by humankind. However, since automotive control requires milli-second response and learning control, and the fuzzy system in automobiles requires fewer components (built-in type), a custom fuzzy inference LSI is needed for automotive control. We then indicated requirements of a fuzzy inference LSI suitable for automotive control and fabricated a fuzzy inference LSI using 1.5 µm CMOS process technique. This fabricated fuzzy LSI is designed to utilize in various automotive control experiments such as engine control, cruise control, brake control and steering control. The number of input variables is six, the number of output variables is two, the maximum number of production rules is 256, and the inference time is 63 microseconds (under the condition of six inputs, two outputs and 256 rules). The features of the fuzzy LSI are high speed inference, a built-in type, learning control ability and a memory structure separating into a rule memory and a membership function memory. A fuzzy control system is implemented only by the addition of two devices: the fuzzy LSI and an EPROM. The fuzzy LSI was applied to a rough road durability test aiming at the automatic driving equivalent to the human driver operation. In the test, fuzzy control and linear control were compared in terms of the compensation steering degrees. Linear steering control had a high rate of compensation steering of less than thirty degrees. On the other hand, the accumulated steering compensation of less than twenty degrees in the fuzzy control was about one third that in the linear control. The fuzzy steering control had the same steering compensations as that of human steering. The fuzzy LSI fabricated for various experiments is too large (10.7 mm10.9 mm) to adopt as automotive parts. Therefore, we studied a smaller-sized fuzzy LSI by limiting functions, by changing the parallel processing into sequential processing and by thinning out the memory data of input membership functions. The number of input variables is four, the number of output variables is two, the maximum number of production rules is 160 and the expected inference time is 140 micro-seconds (in the worst case). The obtained chip is small enough (4.8 mm4.8 mm) for automotive applications. Since the chip contains all the memories that are needed to execute fuzzy inference, the chip can be built in a microprocessor as a fuzzy inference co-processor without any other circuits.

  • Load Balancing Based on Load Coherence between Continuous Images for an Object-Space Parallel Ray-Tracing System

    Hiroaki KOBAYASHI  Hideyuki KUBOTA  Susumu HORIGUCHI  Tadao NAKAMURA  

     
    PAPER-Computer Systems

      Vol:
    E76-D No:12
      Page(s):
    1490-1499

    The ray-tracing algorithm can synthesize very realistic images. However, the ray tracing is very time consuming. To solve this problem, a load balancing strategy using temporal coherence between images in an animation is presented for balancing computational loads among processing elements of a parallel processng system. Our parallel processing model is based on a space subdivision method for the ray-tracing algorithm. A subdivided object space is distributed among processing elements of the parallel system. To clarify the effectiveness of the load balancing strategy, we examine the system performance by computer simulation.

  • A Model for Explaining a Phenomenon in Creative concept Formation

    Koichi HORI  

     
    PAPER-Artificial Intelligence and Cognitive Science

      Vol:
    E76-D No:12
      Page(s):
    1521-1527

    This paper gives a model to explain one phenomenon found in the process of creative concept formation, i.e. the phenomenon that people often get trapped in some state where the mental world remains nebulous and sometimes suddenly make a jump to a new concept. This phenomenon has been qualitatively explained mainly by the philosophers but there have not been models for explaining it quantitatively. Such model is necessary in a new research field to study the systems for aiding human creative activities. So far, the work on creation aid has not had theoretical background and the systems have been built based only on trial and error. The model given in this paper explains some aspects of the phenomena found in creative activities and give some suggestions for the future systems for aiding creative concept formation.

  • Multiwave: A Wavelet-Based ECG Data Compression Algorithm

    Nitish V. THAKOR  Yi-chun SUN  Hervé RIX  Pere CAMINAL  

     
    PAPER

      Vol:
    E76-D No:12
      Page(s):
    1462-1469

    MultiWave data compression algorithm is based on the multiresolution wavelet techniqu for decomposing Electrocardiogram (ECG) signals into their coarse and successively more detailed components. At each successive resolution, or scale, the data are convolved with appropriate filters and then the alternate samples are discarded. This procedure results in a data compression rate that increased on a dyadic scale with successive wavelet resolutions. ECG signals recorded from patients with normal sinus rhythm, supraventricular tachycardia, and ventriular tachycardia are analyzed. The data compression rates and the percentage distortion levels at each resolution are obtained. The performance of the MultiWave data compression algorithm is shown to be superior to another algorithm (the Turning Point algorithm) that also carries out data reduction on a dyadic scale.

  • The Role of ASICs in Automotive Control Systems

    Koichi MURAKAMI  Takeshi FUJISHIRO  Ken ITO  Yoshitaka HATA  

     
    INVITED PAPER

      Vol:
    E76-C No:12
      Page(s):
    1727-1734

    With the evolution of semiconductor technology, automotive electronics has made tremendous progress. The aim of automotive electronics is to improve the basic automotive functions of vehicles (running, turning, and stopping) from the standpoint of environmental protection, energy conservation, and transportation efficiency. This paper introduces the process of automotive electronics with an emphasis on major control systems such as engines and brakes. The role of ASICs in automotive control systems is also presented with actual examples of ASICs that are used in these systems.

  • Data Compression of Long Time ECG Recording Using BP and PCA Neural Networks

    Yasunori NAGASAKA  Akira IWATA  

     
    PAPER

      Vol:
    E76-D No:12
      Page(s):
    1434-1442

    The performances of BPNN (neural network trained by back propagation) and PCANN (neural network which computes principal component analysis) for ECG data compression have been investigated from several points of view. We have compared them with an existing data compression method TOMEK. We used MIT/BIH arrhythmia database as ECG data. Both BPNN and PCANN showed better results than TOMEK. They showed 1.1 to 1.4 times higher compression than TOMEK to achieve the same accuracy of reproduction (13.0% of PRD and 99.0% of CC). While PCANN showed better learning ability than BPNN in simple learning task, BPNN was a little better than PCANN regarding compression rates. Observing the reproduced waveforms, BPNN and PCANN had almost the same performance, and they were superior to TOMEK. The following characteristics were obtained from the experiments. Since PCANN is sensitive to the learning rate, we had to precisely control the learning rate while the learning is in progress. We also found the tendency that PCANN needs larger amount of iteration in learning than BPNN for getting the same performance. PCANN showed better learning ability than BPNN, however, the total learning cost were almost the same between BPNN and PCANN due to the large amount of iteration. We analyzed the connection weight patterns. Since PCANN has a clear mathematical background, its behavior can be explained theoretically. BPNN sometimes generated the connection weights which were similar to the principal components. We supposed that BPNN may occasionally generate those patterns, and performs well while doing that. Finally we concluded as follows. Although the difference of the performances is smal, it was always observed and PCANN never exceeded BPNN. When the ease of analysis or the relation to mathematics is important, PCANN is suitable. It will be useful for the study of the recorded data such as statistics.

  • A Stimulator Using Color Cards for Measuring Visual Evoked Potential

    Keiko MOMOSE  Yoshikazu ISHIHARA  Akihiko UCHIYAMA  

     
    LETTER-Bio-Cybernetics

      Vol:
    E76-D No:12
      Page(s):
    1532-1535

    This letter shows that VEPs can be easily measured by using color cards as the color stimulus, and that the responses evoked by a difference in chroma could be described largely by the value of the first principal component in principal component analysis.

  • A Collision Detection Processor for Intelligent Vehicles

    Masanori HARIYAMA  Michitaka KAMEYAMA  

     
    PAPER

      Vol:
    E76-C No:12
      Page(s):
    1804-1811

    Since carelessness in driving causes a terrible traffic accident, it is an important subject for a vehicle to avoid collision autonomously. Real-time collision detection between a vehicle and obstacles will be a key target for the next-generation car electronics system. In collision detection, a large storage capacity is usually required to store the 3-D information on the obstacles lacated in a workspace. Moreover, high-computational power is essential not only in coordinate transformation but also in matching operation. In the proposed collision detection VLSI processor, the matching operation is drastically accelerated by using a Content-Addressable Memory (CAM) which evaluates the magnitude relationships between an input word and all the stored words in parallel. A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be parformed only by parallel magnitude comparison. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed based on the COordinate Rotation DIgital Computation (CORDIC) algorithms. The collision detection time becomes 5.2 ms using 20 PEs and five CAMs with a 42-kbit capacity.

  • Circularly Polarized Slot FED Patches and Conical Beam Array

    Mohammed HIMDI  Jean-Pierre DANIEL  Koichi ITO  

     
    LETTER

      Vol:
    E76-B No:12
      Page(s):
    1579-1582

    Conical beam pattern is well suited for low mobile or maritime mobile antennas used in cheap and low G/T satellite communication system. Various solutions have been already proposed to generate circular polarized conical patterns; some authors use single microstrip patch working on higher order modes [1], [2], while others have built arrays of patches [3]-[5]. The present letter describes the design of an array of slot fed patches with its feed network and the experimental results which have been obtained in S-band.

  • Present and Future Automotive Electronics

    Shuji MIZUTANI  

     
    INVITED PAPER

      Vol:
    E76-C No:12
      Page(s):
    1713-1716

    Electronics and automobiles were bound together by the introduction of emission regulations in the 1970's. The rapid progress of control technology and semiconductors that typify microcomputers has brought still closer relations between them. Without electronics, it would be impossible to realize features such as pursuit of comfort and environmental and safety measures which should be added to the automobile's fundamental features. In looking ahead to the future, the role of electronics in achieving electric automobiles and the ultimate goal of "automatic driving" is ever-increasing. Everyone knows that automobiles have become indispensable in our lives. In the future, the role of electronics will become increasingly important in order to evolve automobiles even further to allow harmonization with society.

  • In-Vehicle Information Systems and Semiconductor Devices They Employ

    Takeshi INOUE  Kikuo MURAMATSU  

     
    INVITED PAPER

      Vol:
    E76-C No:12
      Page(s):
    1744-1755

    It was more than 10 years ago that the first map navigation system, as an example of invehicle information system, has appeared in the market in Japan. Today's navigation system has been improved to the level that the latest system has 10 micro-processors, 7 MBytes of memories, and 4 GBytes of external data storage for map database. From the viewpoint of the automobile driver, there are still some problems with the system. Major problems in general are a lack of traffic information, better human interface, and a need for cost-reduction. The introduction of application specific ICs (ASICs) is expected to make systems smaller, costless, and give higher speed response. Today's in-vehicle information systems are reviewed function by function to discover what functions need to be implemented into ASICs for future systems, what ASICs will be required, and what technology has to be developed. It is concluded that more integration technology is expected including high parformance CPUs, large capacity memories, interface circuits, and some analog circuits such as DA converter. To develop this technology, some, major problems such as power consumption, number of input/output signals, as well as design aid and process technology are pointed out.

  • A CMOS Time-to-Digital Converter LSI with Half-Nanosecond Resolution Using a Ring Gate Delay Line

    Takamoto WATANABE  Yasuaki MAKINO  Yoshinori OHTSUKA  Shigeyuki AKITA  Tadashi HATTORI  

     
    PAPER

      Vol:
    E76-C No:12
      Page(s):
    1774-1779

    The development of highly accurate and durable control system is becoming a must for todays high performance automobiles. For example, it is necessary to up-grade todays materials and methods creating more sensitive sensors, higher speed processors and more accurate actuators, while also being more durable. Thus, the development of a CMOS time-to-digital converter LSI with half-nanosecond resolution, which controls only pulse signals was achieved by employing 1.5 µm CMOS technology. The new signal detecting circuit, 1.1 mm2 in size, converts time to numerical values over a wide measurement range (13 bits). The compact digital circuit employs a newly developed "ring gate delay system". Within the LSI the fully digital circuit is highly durable. This allows it to be utilized even under severe conditions (for example an operating ambient temperature of 130). In order to measure time accurately, a method of correcting the variation of measurement time data employing a real-time conversion fully digital circuit is described. This method allows for fully automatic correction with a microcomputer, so no manual adjustment is required. In addition to sensor circuit applications, the LSI has great potential for Application Specific Integrated Circuit, (ASIC) such as a function cell with is a completely new method of measuring time.

  • An Error-Correcting Version of the Leiss's Parser for Context-Free Languages

    Ken-ichi KURODA  Eiichi TANAKA  

     
    LETTER-Automaton, Language and Theory of Computing

      Vol:
    E76-D No:12
      Page(s):
    1528-1531

    This paper describes an error-correcting parser (ec-parser) for context-free languages that is an extension of the Leiss's parser. Since the ec-parser uses precomputed informations and a pruning technique by lookahead, the ec-parser is always faster than the Lyon's parser. Several examples are shown.

  • Efficient Application of Coding Technique for Data Compression of ECG

    Susumu TSUDA  Koichi SHIMIZU  Goro MATSUMOTO  

     
    PAPER

      Vol:
    E76-D No:12
      Page(s):
    1425-1433

    A technique was developed to reduce ECG data efficiently within a controlled accuracy. The sampled and digitized data of the original waveform of an ECG is transformed in three major processes. They are the calculation of a beat-to-beat variation, a polygonal approximation and the calculation of the difference between consecutive node points. Then, an adaptive coding technique is applied to minimize redundancies in the data. It was demonstrated that the ECG waveform sampled in 200 Hz, 10 bit/sample, 5 µV/digit could be reduced with the bit reduction ratio of about 10% and within the reconstruction error of about 2.5%. A polygonal approximation method, called MSAPA, was newly developed as a modification of the well known method, SAPA. It was shown that the MSAPA gave better reduction efficiency and smaller reconstruction error than the SAPA, when it was applied to the beat-to-beat variation waveform. The importance of the low-pass filtering as a preprocessing for the polygonal approximation was confirmed in concrete examples. The efficiency of the proposed technique was compared with the cased in which the polygonal approximation was not used. Through these analyses, it was found that the redundancy elimination of the coding technique worked effectively in the proposed technique.

  • Single-Board SIMD Processors Using Gate-Array LSIs for Parallel Processing

    Toshio KONDO  Yoshimasa KIMURA  Noboru SONEHARA  

     
    PAPER

      Vol:
    E76-C No:12
      Page(s):
    1827-1834

    We have developed an SIMD processor on a double-height VME board. We achieved a good balance between cost and performance by combining four identical gate-array LSIs in the processor array with a 16-bit degital signal processor (DSP), standard dynamic random-access memories (DRAMs) and other peripherals. The gate-array LSIs have 168-bit processing elements (PEs), each containing a one-bit processing block and a serial multiplier. This PE structure offers high-level bit processing capability and peak performance of 512 million operations per second (MOPS) for 8-bit multiply and accumulate operations. Effective performance of more than 300 MOPS for 8-bit array data processing is achieved by using an LSI structure tuned to the DRAM access rate, although the processing speed is reduced by the DRAM access bottleneck. The LSIs also have two unique additional hardware structures that speed up various array data processes. One is an inter-PE routing register array for supporting a transmission, rotation and memory access path. The other is a tree-structure network for propagating operations among PEs. With these cost-effective structures, the SIMD processor is expected to be widely used for two-dimensional data processing, such as image processing and pattern recognition.

  • Ray Mode Coupling Analysis of Plane Wave Scattering by a Trough

    Hiroshi SHIRAI  Kazuhiro HIRAYAMA  

     
    PAPER

      Vol:
    E76-B No:12
      Page(s):
    1558-1563

    Electromagnetic plane wave scattering by a wide trough on the ground has been analyzed by high frequency asymptotic techniques based on Geometrical Theory of Diffraction. Field in the trough region has been formulated in terms of parallel plane waveguide modes, whose excitation (coupling) coefficients are obtained by ray-mode conversion techniques. Numerical calculation has been done extensively and thus obtained results are then compared with those by other methods. Good agreements have been observed except for oblique incidence case. It is found that first and secondary modal re-radiation fields from the indented trough region play an important role for scattering far field, and primary edge diffracted field contributes mainly to reflection boundary direction.

21841-21860hit(22683hit)