An efficient method which integrates a 2-D energy transport model, impact ionization model, gate current model, a discretized gate-capacitor EPROM model, and a post-processing quasi-transient programming/erase method, was developed for deep-submicron EPROM/Flash device simulation. The predicted results showed on the average better than 90% accuracy, and it took only few minutes CPU time on a SUN/SPARC2 to generate EPROM/Flash Vt shift curves.

A unified model for frequency-dependent characteristics of transconductance and output resistance is presented that incorporates the dynamics of quasi-Fermi levels. Using this model, multiple-frequency dispersion and pulse-narrowing phenomena in GaAs MESFETs are demonstrated based on the drift-diffusion transport theory and a Schockley-Read-Hall-type deep trap model, where rate equations for multiple trapping processes are analyzed self-consistently. It is shown that the complex frequency dependence is due to both spatial and temporal effects of multiple traps.

An eye-contact technique using a blazed half-transparent mirror (BHM) is developed. This half-transparent mirror (HM) consists of an in-line array of many slanting micro-HMs. We fabricated a prototype system and confirmed the principle of this technique. The resolution of an image reflected by a BHM was simulated to determine how to improve the image quality and the factors degrading the resolution were clarified.

To realize a high performance optical subscriber network a route reconnect switch is desired which has bistability, polarization and wavelength independence and compactness. This paper proposes an electrocapillarity optical (ECO) switch, in which a micro-mirror formed by a mercury droplet is driven by electrocapillarity. This switch has a potential for use in bistable waveguide matrix switches, which are suitable for route reconnection in the optical subscriber network. A theoretical model is presented that the driving force of the electrocapillarity originates in an electrically induced gradient in the surface tension of the mercury-electrolyte interface where an electrical double layer is formed. The experimentally obtained relation between the flow velocity of a mercury droplet and the electric current in an electrocapillary system is well described by this model. A prototype of the ECO switch is made using a resin molded single-mode fiber with a slit sawed in it in which a electrocapillary system is made. Optical switching is demonstrated and possible improvements in switching performance are discussed.

Two types of novel nVT level shift circuits based on the square law characteristics of MOSFETs have been proposed. These circuits generate VIN+nVT or VIN-nVT (where VT is a threshold voltage), if the input voltage is applied as the VIN. These circuits can be widely used in MOSFET characterization, compensating VT effect, VT measurement, level shifting, etc. Type 1 is directly derived from the nVT-sift circuit proposed by Wang. Type 2 can reduce a total chip area than type 1 and has a wider input range. SPICE simulations show that the proposed circuits have a very wide input range and a small power consumption.

An HDTV still-picture camera that uses four PAL CCD sensors has been developed for use as a high-speed, high-resolution image reader. The CCD sensors are optically coupled to a single lens by a pyramidal mirror. Each CCD sensor reads a quarter of the image and the four quarter-images are combined into one HDTV picture. Discontinuities at the lines where the four images join can be eliminated by white- and dark-level correction and gamma correction. Moreover, smoothing processing using a weighted-mean method is performed to produce a seamless picture. With this processing the camera can consistently produce seamless pictures.

This paper describes a DBF (Digital Beamforming) technique as a spatial filtering in the radar systems. DBF for a beamformer and an adaptive processor are discussed. An architecture for the beamformer is proposed. The beamformer discussed consists of systolic arrays that can form beams arbitrarily. Antenna radiation patterns measured in an open site are shown. For the adaptive processor, Gram-Schmidt transformation method is attained by using systolic arrays. Proposed is a means to prevent target signals from being suppressed in cells of the systolic arrays and to achieve the convergent characteristics independent of the magnitude of undesired signal power. In order to demonstrate the performance of the proposed processor, a test model of the adaptive processor was developed and tested in multiple undesired signal environment. Test results are indicated.

OTA (Operational Transconductance Amplifier) is a useful circuit in analog signal processing systems, especially in high-frequency applications. Important features of OTA are: infinite input impedance, electrically changeable transconductance (Gm), and much wider operation range without negative feedback such as in OPamp applications. The good linearity of OTA over wide input range is necessary to extend the application fields of OTA. Several techniques are developed to extend the input range with good linearity. In this paper, a highly-linear CMOS-OTA operating under 1 V power supply, is proposed. The concept of the proposed OTA is based on class-AB operation of two n-channel MOSFETs in the saturation region. By improving the input stage circuits, wide input range can be achieved. SPICE simulations are performed to verify the performance of the proposed OTA.

This paper newly estimates the yield suppression for 1.5 V-1 Gbit DRAM caused by threshold voltage variation of MOSFET due to microscopic fluctuations in dopant distributions within the channel region and points out the limitation of the conventional redundancy techniques. The yield suppression is estimated for four main circuit blocks, the memory cell transfer transistor, bit line sense amplifier S/A, I/O line differential amplifier D/A, and the peripheral circuit. It is newly found that for 1.5 V-1 Gbit DRAM due to the effect of the newly estimated threshold voltage variation of MOSFET the bit failures of memory cells become the most dominant failure mode and the failure of D/A which can be ignored for 64 Mbit DRAM level can no longer be neglected. Furthermore, the novel optimized redundancy technique for replacing these failure is described.

Material representations and algorithms are presented for simulation of nanometer lithography. Organic polymer resists are modeled as collections of overlapping spheres, with each sphere representing a polymer chain. Exposure and post-exposure bake steps are modeled at the nanometer scale for both positive and negative resists. The development algorithm is based on the Poisson removal probability for each sphere in contact with developer. The Poisson removal rate for a given sphere is derived from a mass balance relationship with a macroscopic development rate model. Simulations of electron beam lithography with (poly) methyl methacrylate and Shipley SAL-601 reveal edge roughness standard deviations from 2 to 3 nm, leading to linewidth peak-to-peak 3σ variation of 15 to 22 nm. Typical simulations require about 2 MBytes and under 5 minutes on a Sun Sparc 10/41 engineering workstation.

A photonic network with a space- and frequency switching capability is proposed. It provides point-to-point and point-to-multipoint connections without internal blocking. The switching network exclusively uses frequency switching stages and a shared-medium architecture. Our proposal is compared with similar published networks which are either also constructed solely from frequency switching stages or from frequency and space switching stages. It is shown that the proposed switching network features fewer optical and opto-electronic components, fewer different types of component/module, lower losses, a higher capacity and an easier expansibility.

An exact analysis for magnetostatic surface wave excitation by a single microstrip is presented. Conventional approaches for such an excitation problem do not explain experimental results in a reasonable manner. The theory proposed here explains radiation resistances obtained by experiments, owing to having considered the edge conditions and an expansion form of excitation current on the microstrip properly.

A simulation study on cylindrical semiconductor devices is described, where the internal behavior of power devices are analyzed under steady-state condition with considering heat generation. In simulation, circular cylindrical coordinate is used to consider the effect of three-dimensional spreading current flow with keeping calculation time and memory as in two-dimensional simulation. Numerical model is based on the well-known set of Shockley-Roosbroeck semiconductor equations--continuity equations for carriers and Poisson's equation, along with heat flow equation. Drift-diffusion approximation of carrier transport equations is used, taking temperature field as a driving force for carriers into account. Using the cylindrical simulator, numerical analysis of power MOSFETs, which integrate zener diodes to improve the avalanche capability, has been carried out. Results showed that, a parasitic bipolar transistor turns on under forward-biased condition in a power MOSFET with a zener diode. The highest lattice temperature takes place at source edge. Under reverse-biased condition, breakdown occurs at doughnut area around the bottom of source contact (at the upper region of zener junction), and the avalanche current flows detouring the base region of parasitic bipolar transistor which implies that secondary breakdown will be suppressed. The highest lattice temperature region under reverse-biased conditions is the same as the breakdown region. Without zener diodes, on the other hand, breakdown occurs ringing about the edge of source region, and the avalanche current flows through the base region of parasitic bipolar transistor which implies that even MOSFETs may suffer from the secondary breakdown. As channel length becomes short, breakdown caused by punchthrough becomes dominant at the edge of source region.

Numerical simulation of the hydrodynamic semiconductor device equations requires powerful numerical schemes. A Space-time Galerkin/Least-Squares finite element formulation, that has been successfully applied to problems of fluid dynamic, is proposed for the solution of the hydrodynamic device equations. Similarity between the equations of fluid dynamic and semiconductor devices is discussed. The robustness and accuracy of the numerical scheme are demonstrated with the example of a single electron carrier submicron silicon MESFET device.

The aim of this study is to evaluate mental workload (MWL) quantitatively by HRV (Heart Rate Variability) measures. The electrocardiography and the respiration curve were recorded in five different epochs (1) during a rest condition and (2) during mental arithmetic tasks (addition). In the experiment, subjects added two numbers. The work levels (figures of the number in the addition) were set to one figure, two figures, three figures and four figures. The work level had effects on the mean percent correct, the number of answers and the mean processing time. The psychological evaluation on mental workload obtained by the method of paired comparison increased with the work level. Among the statistical HRV measures, the number of peak and trough waves could distinguish between the rest and the mental loading. However, mental workload for each work level was not evaluated quantitatively by the measure. The HRV measures were also calculated from the power spectrum estimated by the autoregressive (AR) model identification. The ratio of the low frequency power to the high frequency power increased linearly with the work level. In conclusion, the HRV measures obtained by the AR power spectrum analysis were found to be sensitive to changes of mental workload.

We have developed a novel method of numerical synthesis of optical waveguides, which consists of the endless loop of the random sampling of waveguide parameters, numerical analysis and the judgment of calculated result. This loop is repeated until some objective solutions satisfying required characteristics are discovered. When the structural condition is almost unknown and there is no clue to search it, this method is useful for discovering new-type waveguides, and this concept is applicable to any other devices. We applied this method to the search of new waveguide structures having multilayer claddings, and obtained many types of low loss single mode waveguides, including ARROW-type waveguides, waveguide-type polarizers and a very narrow band wavelength filter.

Photonic ATM switching systems with Terabit/s throughput are desirable for future broadband ISDN systems. Since electronic LSI-based ATM switching systems are planned to have the throughput of 160Gb/s, a photonic ATM switching system should take the role of the highest layer in a hybrid switching network which includes electronic LSI-based ATM switching systems as its sub-system. This report discusses the state-of-the-art photonic devices needed for a frequency-self-routing ATM photonic switching system with maximum throughput of 5Tb/s. This kind of systems seems to be a moderate system for the first phase photonic switching system with no insuperable obstacle for initiating development, even though none of the devices and technologies required have yet been developed to meet the specifications. On the contrary, for realizing further enlarged throughput as the second-phase photonic switching system, there are huge fundamental research projects still remaining for establishing the technology utilizing the spectrum broadened over 120nm and highly-dense FDM technologies based on homodyne coherent detection, if supposing a simple architecture. "Ultra devices" seem to be the photonic devices based on new tailored materials of which gain and refractive index are designed to realize ultra-wide spectrum utilization.

It has become more important to shorten development periods of high performance computer systems and their LSIs. During debugging of computer prototypes, logic designers request very frequent LSI refabrication to change logic circuits and to add some functions in spite of their extensive logic simulation by several GFLOPS supercomputers. To meet these demands, an automated on-chip direct wiring modification system has been developed, which enables wire-cut and via-digging by a precise focused ion beam machine, and via-filling and jumper-writing by a laser CVD machine, directly on pre-redesign (original) chips. This modification system was applied to LSI reworks during the development of Hitachi large scale computers M-880 and S-3800, and contributed to shorten system debugging period by four to six months.

The exact characteristic equation for the hybrid modes in Goubau line is given. By solving the equation numerically we find the hybrid modes Lnm, defined in this paper. We also examine the propagation and attenuation constants of the hybrid modes. As a result the hybrid K12 mode has the extremely low attenuation at the specific frequency similar to the hybrid K11 mode. The electric field distributions of K11 and L11 modes are plotted.

A simulation model for arsenic diffusion in polycrystalline silicon has been developed considering dynamic dopant clustering and polysilicon grain growth kinetics tightly coupled with dopant diffusion and segregation. It was assumed that the polysilicon layer consists of column-like grains surrounded by thin grain-boundaries, so that one dimensional description is permissible for dopant diffusion. The dynamic clustering model was introduced for describing arsenic activation in polysilicon grains, considering the solubility limit increase for arsenic in a polysilicon. For a grain-growth calculation, a previous formula was modified to include a local concentration dependence. The simulation results show that these effects are significant for a high dose implantation case.