Impact of sampling frequency and the number of quantization bit of analog-to-digital conversion (ADC) in a direct detection lightwave system using Kramers-Kronig (KK) relation, which has been attracting attention in recent years, are numerically investigated. We studied the effect of spectral broadening caused by nonlinear operations (logarithm, square root) of the KK algorithm when the frequency gap (shift frequency) between the modulated signal and the optical tone is varied. We found that reception performances depend on both the ADC bandwidth and the relative positions of the optical tone and the spectrum. Spectral broadening caused by the logarithm operation of the KK algorithm is found to be the dominant factor of signal distortion in an ADC bandwidth limited system. We studied the effect of the number of quantization bit on the error vector magnitude (EVM) of KK relation based reception in a carrier-to-signal power ratio (CSPR) adjustable transmission system. We found that performances of KK relation based receiver can be improved by increasing the number of quantization bits. For minimum-phase-condition satisfied KK receiver, the required number of quantization bit was found to be 5 bits or more for detection of QPSK, 16-QAM and 64-QAM-modulated signal after 20-km transmission.

A high degree of freedom in spectral domain allows us to accommodate additional optical signal processing for wavelength division multiplexing in photonic analog-to-digital conversion. We experimentally verified a spectral compression to save a necessary bandwidth for soliton self-frequency shift based optical quantization through the cascade of the four-wave mixing based and the sum-frequency generation based spectral compression. This approach can realize 0.03 nm individual bandwidth correspond to save up to more than 85 percent of bandwidth for 7-bit optical quantization in C-band.

We investigate a quantization error improvement technique using a dual rail configuration for optical quantization. Our proposed optical quantization uses intensity-to-wavelength conversion based on soliton self-frequency shift and spectral compression based on self-phase modulation. However, some unfavorable input peak power regions exist due to stagnations of wavelength shift or distortions of spectral compression. These phenomena could induce a serious quantization error and degrade the effective number of bit (ENOB). In this work, we propose a quantization error improvement technique which can make up for the unfavorable input peak power regions. We experimentally verify the quantization error improvement effect by the proposed technique in 6 bit optical quantization. The estimated ENOB is improved from 5.35 bit to 5.66 bit. In addition, we examine the XPM influence between counter-propagating pulses at high sampling rate. Experimental results and numerical simulation show that the XPM influence is negligible under ∼40 GS/s conditions.

We investigate resolution improvement in optical quantization with keeping high sampling rate performance in optical sampling. Since our optical quantization approach uses power-to-wavelength conversion based on soliton self-frequency shift, a spectral compression can improve resolution in exchange for sampling rate degradation. In this work, we propose a different approach for resolution improvement by parallel use of dispersion devices so as to avoid sampling rate degradation. Additional use of different dispersion devices can assist the wavelength separation ability of an original dispersion device. We demonstrate the principle of resolution improvement in 3 bit optical quantization. Simulation results based on experimental evaluation of 3 bit optical quantization system shows 4 bit optical quantization is achieved by parallel use of dispersion devices in 3 bit optical quantization system. The maximum differential non-linearity (DNL) and integral non-linearity (INL) are 0.49 least significant bit (LSB) and 0.50 LSB, respectively. The effective number of bits (ENOB) estimated to 3.62 bit.

This paper presents a digitally error-corrected pipeline analog-to-digital converter (ADC) using linearization of incomplete settling errors. A pre-charging technique is used for residue amplifiers in order to reduce the incomplete settling error itself and linearize the input signal dependency of the incomplete settling error. A technique with charge redistribution of divided capacitors is proposed for pre-charging capacitors without any additional reference sources. This linearized settling error is corrected by a first-order error approximation in digital domain with feasible complexity and cost. Simulation results show that the ADC achieves SNDR of 70 dB, SFDR of 79 dB at nyquist input frequency in a 65 nm CMOS process under 1.2 V power supply voltage for 1.2 Vp-p input signal swing. The estimated power consumption of the 12b 200 MS/s pipeline ADC using the proposed digital error correction of incomplete settling errors is 7.6 mW with a small FOM of 22 fJ/conv-step.

Recently, the research on all-optical analog-to-digital conversion (ADC) has been extensively attempted to break through inherently limited operating speed of electronic devices. In this paper, we describe a novel quantization scheme by slicing supercontinuum (SC) spectrum for all-optical ADC and then propose a 2-bit all-optical ADC scheme consisting of the quantization by slicing SC spectrum and the coding by switching pulses with a nonlinear optical loop mirror (NOLM). The feasibility of the proposed quantization scheme was confirmed by numerical simulation. We conducted proof-of-principle experiments of optical quantization by slicing SC spectrum with an arrayed waveguide grating and optical coding by switching pulses with NOLM. We successfully demonstrated optical quantization and coding, which allows us to confirm the feasibility of the proposed 2-bit ADC scheme.

We report on the first demonstration of single sideband (SSB) modulated time stretch system. In addition, we present an analytical model relating the system performance to the phase and amplitude mismatches in the SSB modulator. The results show that, fortuitously, the system is tolerant to such mismatches. In particular, using commercially available components,the dispersion induced power penalty can be kept below 2.5 dB over 4-20 GHz bandwidth for any stretch factor. The experiments demonstrate 120 Gsample/s real-time capture of a 20 GHz SSB-modulated microwave signal.

A second-order sigma-delta modulator with a 3-bit internal quantizer featuring a gain scaling of an internal ADC and a very simple internal DAC has been designed and implemented in a 0.8 µm double-poly double-metal CMOS process. We improved the performance of the modulator with the gain scaling of a 3-bit internal ADC and design of the internal error-free DAC with using simple logic gates. The specification of each component is determined for the modulator to have 14-bit resolution by time based modeling and the designed components satisfy the required specifications. The peak SNR of 87 dB and dynamic range of 87 dB were achieved at a clock rate of 2.816 MHz for 22 kHz baseband. The measured results show that the fabricated modulator lower SNR by 14 dB than that of the simulation due to the non-ideal input source and the disregarded error factors in the modeling such as the voltage variable capacitors etc.

This paper describes a 10-bit 40-MS/s pipelined A/D converter implemented in a 0.8-µm double-poly, double-metal CMOS process. This A/D converter achieves low power dissipation of 36-mW at 5-V power supply. A 1.5-bit/stage pipelined architecture allows large correction range for comparator offset, and performs fast interstage signal processing. For high speed and low power operation, the sample-and-hold amplifier is designed using op-amp sharing technique and dynamic comparator. In addition, fully-differential folded-cascode op amp with gain-boosting stage is designed by an automatic design tool. When 10-MHz input signal is applied, SNDR is 55.0 dB, and SNR is 56.7 dB. The DNL and INL exhibit 0.6 LSB, +1/-0.75 LSB respectively.

A direct gradient descent learning algorithm of energy function in Hopfield neural networks is proposed. The gradient descent learning is not performed on usual error functions, but the Hopfield energy functions directly. We demonstrate the algorithm by testing it on an analog-to-digital conversion and an associative memory problems.