Razor Flip-Flop (FF) is a good combination for the dynamic voltage scaling (DVS) technique to achieve high energy efficiency. We previously proposed a RazorProtector scheme, which uses, under a very high IR-drop zone, a redundant data-path to provide a very fast recovery for a Razor-FF based processor. In this paper, we propose a dynamic method to adjust the redundancy level to fine-grained fit both the program behaviors and processor manufacturing variations so as to achieve an optimal power saving. We design an online turning method to adjust the redundancy level according to the most related parameters, ILP (Instruction Level Parallelism) and DCF (Delay Criticality Factor). Our simulation results show that under a workload suite with different behaviors, the adaptive redundancy can achieve better Energy Delay Product (EDP) reduction than any static controls. Compared to the traditional application of Razor-FF and DVS, our proposed dynamic control achieves an EDP reduction of 56% in average for the workloads we studied.

This paper proposes an automatic error correction method for melanosome tracking. Melanosomes in intracellular images are currently tracked manually when investigating diseases, and an automatic tracking method is desirable. We detect all melanosome candidates by SIFT with 2 different parameters. Of course, the SIFT also detects non-melanosomes. Therefore, we use the 4-valued difference image (4-VDimage) to eliminate non-melanosome candidates. After tracking melanosome, we re-track the melanosome with low confidence again from t+1 to t. If the results from t to t+1 and from t+1 to t are different, we judge that initial tracking result is a failure, the melanosome is eliminated as a candidate and re-tracking is carried out. Experiments demonstrate that our method can correct the error and improves the accuracy.

In this paper, an adaptive expansion strategy (AES) is proposed for multiple-input/multiple-output (MIMO) detection in the presence of circular signals. By exploiting channel properties, the AES classifies MIMO channels into three types: excellent, average and deep fading. To avoid unnecessary branch-searching, the AES adopts single expansion (SE), partial expansion (PE) and full expansion (FE) for excellent channels, average channels and deep fading channels, respectively. In the PE, the non-circularity of signal is exploited, and the widely linear processing is extended from non-circular signals to circular signals by I (or Q) component cancellation. An analytical performance analysis is given to quantify the performance improvement. Simulation results show that the proposed algorithm can achieve quasi-optimal performance with much less complexity (hundreds of flops/symbol are saved) compared with the fixed-complexity sphere decoder (FSD) and the sphere decoder (SD).

The amplitude damping (AD) quantum channel is one of the models describing evolution of quantum states. The construction of quantum error correcting codes for the AD channel based on classical codes has been presented, and Shor et al. proposed a class of classical codes over F3 which are efficiently applicable to this construction. In this study, we expand Shor's construction to that over F7, and succeeded to construct an AD code that has better parameters than AD codes constructed by Shor et al.

In this paper, we design an Unequal Error Protection (UEP) rateless code with special coding graph and apply it to propose a novel HTTP adaptive streaming based on UEP rateless code (HASUR). Our designed UEP rateless code provides high diversity on decoding probability and priority for data in different important level with overhead smaller than 0.27. By adopting this UEP rateless channel coding and scalable video source coding, our HASUR ensures symbols with basic quality to be decoded first to guarantee fluent playback experience. Besides, it also provides multiple layers to ensure the most suitable quality for fluctuant bandwidth and packet loss rate (PLR) without estimating them in advance. We evaluate our HASUR against the alternative solutions. Simulation results show that HASUR provides higher video quality and more adapts to bandwidth and PLR than other two commercial schemes under End-to-End transmission.

In this paper, we propose a modified-error adaptive feedback active noise control (ANC) system using a linear prediction filter. The proposed ANC system is advantageous in terms of the rate of convergence, while maintaining stability, because it can reduce narrowband noise while suppressing disturbance, including wideband components. The estimation accuracy of the noise control filter in the conventional system is degraded because the disturbance corrupts the input signal to the noise control filter. A solution of this problem is to utilize a linear prediction filter. The linear prediction filter is utilized for the modified-error feedback ANC system to suppress the wideband disturbance because the linear prediction filter can separate narrowband and wideband noise. Suppressing wideband noise is important for the head-mounted ANC system we have already proposed for reducing the noise from a magnetic resonance imaging (MRI) device because the error microphones are located near the user's ears and the user's voice consequently corrupts the input signal to the noise control filter. Some simulation and experimental results obtained using a digital signal processor (DSP) demonstrate that the proposed feedback ANC system is superior to a conventional feedback ANC system in terms of the estimation accuracy and the rate of convergence of the noise control filter.

This paper analyzes the transmission performances of visible light communication (VLC) based on unipolar orthogonal frequency division multiplexing (OFDM), which is compatible with intensity modulation and direct detection (IM/DD). Three existing unipolar OFDM schemes, namely DC biased optical OFDM (DCO-OFDM), asymmetrically clipped optical OFDM (ACO-OFDM), and flip-OFDM are investigated and compared. While these three schemes have been analyzed for indoor optical wireless communication (OWC) subject to the limitation on the transmit optical power, they have not been carefully investigated and compared for VLC when a large transmit power is available due to the illumination requirement, and the signal dynamic range (DR) becomes the main limitation. For the analysis, DR expressions of DCO-OFDM, ACO-OFDM, and flip-OFDM signals are first derived. Then, the bit error rate (BER) expression of each unipolar OFDM scheme is derived in terms of the DR. For data rates in the range of 1-10Mbps, under the system parameters based on typical indoor environments, DCO-OFDM is observed to outperform the other two schemes. This superiority of DCO-OFDM is in contrast with previously reported results that indicate the attractiveness of ACO-OFDM and flip-OFDM over DCO-OFDM when the transmit optical power is the main limitation. Finally, light dimming is considered to identify the illumination level below which DCO-OFDM loses this superiority.

This paper describes a soft-error tolerant and margin-enhanced nMOS-pMOS reversed 6T SRAM cell. The 6T SRAM bitcell comprises pMOS access and driver transistors, and nMOS load transistors. Therefore, the nMOS and pMOS masks are reversed in comparison with those of a conventional bitcell. In scaled process technology, The pMOS transistors present advantages of small random dopant fluctuation, strain-enhanced saturation current, and small soft-error sensitivity. The four-pMOS and two-nMOS structure improves the soft-error rate plus operating margin. We conduct SPICE and neutron-induced soft-error simulations to evaluate the n-p reversed 6T SRAM bitcell in 130-nm to 22-nm processes. At the 22-nm node, a multiple-cell-upset and single-bit-upset SERs are improved by 34% and 51% over a conventional 6T cell. Additionally, the static noise margin and read cell current are 2.04× and 2.81× improved by leveraging the pMOS benefits.

Stochastic decoding provides ultra-low-complexity hardware for high-throughput parallel low-density parity-check (LDPC) decoders. Asynchronous stochastic decoding was proposed to demonstrate the possibility of low power dissipation and high throughput in stochastic decoders, but decoding might stop before convergence due to “lock-up”, causing error floors that also occur in synchronous stochastic decoding. In this paper, we introduce a wire-delay dependent (WDD) scheduling algorithm for asynchronous stochastic decoding in order to reduce the error floors. Instead of assigning the same delay to all computation nodes in the previous work, different computation delay is assigned to each computation node depending on its wire length. The variation of update timing increases switching activities to decrease the possibility of the “lock-up”, lowering the error floors. In addition, the WDD scheduling algorithm is simplified for the hardware implementation in order to eliminate time-averaging and multiplication functions used in the original WDD scheduling algorithm. BER performance using a regular (1024, 512) (3,6) LDPC code is simulated based on our timing model that has computation and wire delay estimated under ASPLA 90nm CMOS technology. It is demonstrated that the proposed asynchronous decoder achieves a 6.4-9.8× smaller latency than that of the synchronous decoder with a 0.25-0.3 dB coding gain.

For two-dimensional IIR digital filters described by the Fornasini-Marchesini second model, the problem of jointly optimizing high-order error feedback and realization to minimize the effects of roundoff noise at the filter output subject to l2-scaling constraints is investigated. The problem at hand is converted into an unconstrained optimization problem by using linear-algebraic techniques. The unconstrained optimization problem is then solved iteratively by applying an efficient quasi-Newton algorithm with closed-form formulas for key gradient evaluation. Finally, a numerical example is presented to illustrate the validity and effectiveness of the proposed technique.

The Global Position System (GPS), which is well known as a global tool for positioning, is also the primary system for time transfer. GPS can deliver very precise time to every corner of the world. Usually, a GPS receiver indicates the precise time by means of the 1PPS (one pulse per second) signal. This paper studies the precise time transfer system structure of GPS receivers and then proposes an effective PPS signal generation method with predictive synchronous loop, combining phase error prediction and dynamic threshold adjustment. A GPS time transfer system is implemented and measured in detail to demonstrate the validity of the proposed algorithm. Assuming the receiver clock rate of 16.368MHz, the proposed method can achieve the accuracy of ±20ns in the scope 1δ which can meet the requirements of the vast majority of occasions. Through a long period of testing, we prove the feasibility of this algorithm experimentally.

A smoothing method for minimum phone error linear regression (MPELR) is proposed in this paper. We show that the objective function for minimum phone error (MPE) can be combined with a prior mean distribution. When the prior mean distribution is based on maximum likelihood (ML) estimates, the proposed method is the same as the previous smoothing technique for MPELR. Instead of ML estimates, maximum a posteriori (MAP) parameter estimate is used to define the mode of prior mean distribution to improve the performance of MPELR. Experiments on a large vocabulary speech recognition task show that the proposed method can obtain 8.4% relative reduction in word error rate when the amount of data is limited, while retaining the same asymptotic performance as conventional MPELR. When compared with discriminative maximum a posteriori linear regression (DMAPLR), the proposed method shows improvement except for the case of limited adaptation data for supervised adaptation.

In this paper, a low-complexity precoding scheme for minimizing the bit error rate (BER) subject to fixed power constraint for distributed antenna systems with non-Kronecker correlation over spatially correlated Rayleigh fading channels is presented. Based on an approximated BER bound and a newly defined compressed signal-to-noise ratio (CSNR) criterion, closed-form expressions of power allocation and beamforming matrix are derived for the developed precoding scheme. This scheme not only has the calculation of the power allocation less than and also obtain the BER performance close to that of the existing optimal precoding scheme. Simulation results show that the proposed scheme can provide BER lower than the equal power allocation and single mode beamforming scheme, has almost the same performance as the existing optimal scheme.

We consider a unified approach to the tracking analysis of adaptive filters with error and matrix data nonlinearities. Using energy-conservation arguments, we not only derive earlier results in a unified manner, but we also obtain new performance results for more general adaptive algorithms without requiring the restriction of the regression data to a particular distribution. Numerical simulations support the theoretical results.

The k-error linear complexity of periodic sequences is an important security index of stream cipher systems. By using an interesting decomposing approach, we investigate the intrinsic structure for the set of 2n-periodic binary sequences with fixed complexity measures. For k ≤ 4, we construct the complete set of error vectors that give the k-error linear complexity. As auxiliary results we obtain the counting functions of the k-error linear complexity of 2n-periodic binary sequences for k ≤ 4, as well as the expectations of the k-error linear complexity of a random sequence for k ≤ 3. Moreover, we study the 2t-error linear complexity of the set of 2n-periodic binary sequences with some fixed linear complexity L, where t < n-1 and the Hamming weight of the binary representation of 2n-L is t. Also, we extend some results to pn-periodic sequences over Fp. Finally, we discuss some potential applications.

Nonlinearity compensation algorithm and soft-decision forward error correction (FEC) are considered as key technologies for future high-capacity and long-haul optical transmission system. In this report, we experimentally demonstrate the following three benefits brought by low complexity perturbation back-propagation nonlinear compensation algorithm in 224Gb/s DP-16QAM transmission over large-Aeff pure silica core fiber; (1) improvement of pre-FEC bit error ratio, (2) reshaping noise distribution to more Gaussian, and (3) reduction of cycle slip probability.

This paper presents a measurement circuit structure for capturing SET pulse-width suppressing pulse-width modulation and within-die process variation effects. For mitigating pulse-width modulation while maintaining area efficiency, the proposed circuit uses massively parallelized short inverter chains as a target circuit. Moreover, for each inverter chain on each die, pulse-width calibration is performed. In measurements, narrow SET pulses ranging 5ps to 215ps were obtained. We confirm that an overestimation of pulse-width may happen when ignoring die-to-die and within-die variation of the measurement circuit. Our evaluation results thus point out that calibration for within-die variation in addition to die-to-die variation of the measurement circuit is indispensable.

In this letter, the k-out-of-n rule for cooperative sensing is considered. For a given n, we derive the optimal value of k that minimizes the total sensing error probability subject to the sensing accuracy, considering both the effective of sensing errors and the primary activities. According to the optimal k, we analyze the performance and compare with other schemes, which illustrate the effectiveness of the proposed scheme.

Luby Transform (LT) codes are the first practical implementation of digital fountain codes. In LT codes, encoding symbols are independently generated so as to realize the universal property which means that performance is independent of channel parameters. The universal property makes LT codes able to provide reliable delivery simultaneously via channels of different quality while it may also limit the flexibility of LT codes. In certain application scenarios, such as real-time multimedia transmission, most receivers have tolerable channels whose erasure rates are not fixed, and channels of high erasure rate are outside the design box. In this paper, Connection Choice (CC) codes are proposed to trade the universal property for better performance. The key to CC codes is replacement of random selection with tournament selection. Tournament selection can equalize the frequency of input symbols to join encoding and change the degree distribution of input symbols. Our study indicates that CC codes with appropriate degree distributions provide better performance than the best known LT code when channels of high erasure rate can be ignored. CC codes enable system designers to customize digital fountain codes by taking into account the distribution of the erasure rate and create a new possibility for setting trade-offs between performance and erasure rate.

This paper introduces a partially parallel inter-chip link architecture for asynchronous multi-chip Network-on-Chips (NoCs). The multi-chip NoCs that operate as a large NoC have been recently proposed for very large systems, such as automotive applications. Inter-chip links are key elements to realize high-performance multi-chip NoCs using a limited number of I/Os. The proposed asynchronous link based on level-encoded dual-rail (LEDR) encoding transmits several bits in parallel that are received by detecting the phase information of the LEDR signals at each serial link. It employs a burst-mode data transmission that eliminates a per-bit handshake for a high-speed operation, but the elimination may cause data-transmission errors due to cross-talk and power-supply noises. For triggering data retransmission, errors are detected from the embedded phase information; error-detection codes are not used. The throughput is theoretically modelled and is optimized by considering the bit-error rate (BER) of the link. Using delay parameters estimated for a 0.13 µm CMOS technology, the throughput of 8.82 Gbps is achieved by using 10 I/Os, which is 90.5% higher than that of a link using 9 I/Os without an error-detection method operating under negligible low BER (<10-20).