Integer codes are defined by error-correcting codes over integers modulo a fixed positive integer. In this paper, we show that the construction of integer codes can be reduced into the cases of prime-power moduli. We can efficiently search integer codes with small prime-power moduli and can construct target integer codes with a large composite-number modulus. Moreover, we also show that this prime-factorization reduction is useful for the construction of self-orthogonal and self-dual integer codes, i.e., these properties in the prime-power moduli are preserved in the composite-number modulus. Numerical examples of integer codes and generator matrices demonstrate these facts and processes.

The k-error linear complexity of a sequence is a fundamental concept for assessing the stability of the linear complexity. After computing the k-error linear complexity of a sequence, those bits that cause the linear complexity reduced also need to be determined. For binary sequences with period 2pn, where p is an odd prime and 2 is a primitive root modulo p2, we present an algorithm which computes the minimum number k such that the k-error linear complexity is not greater than a given constant c. The corresponding error sequence is also obtained.

We prove generalization error bounds of classes of low-rank matrices with some norm constraints for collaborative filtering tasks. Our bounds are tighter, compared to known bounds using rank or the related quantity only, by taking the additional L1 and L∞ constraints into account. Also, we show that our bounds on the Rademacher complexity of the classes are optimal.

Timing vernier (i.e., digital-to-time converter) is a key component of the pin-electronics circuit board installed in automated digital-VLSI test equipment, and it is used to create fine delays of less than one-cycle time of a clock signal. This paper presents a new on-the-fly (timing-) jitter suppression technique which makes it possible to use low-power plain-CMOS-logic-based timing verniers. Using a power-compensation line installed at the poststage of the digitally variable delay line, we make every pulse (used as a timing signal) consume a fixed amount of electric energy independent of the required delay amount. Since the power load of intrapowerlines is kept constantly, the jitter increase in the situation of changing the required delay amount on the fly is suppressed. On the basis of the concept, a 10-ns span, 125-MHz timing-vernier macro was designed and fabricated with a CMOS process for logic VLSIs. Every macro installed in a real-time timing-signal generator VLSI achieved the required timing resolution of 31.25ps with a linearity error within 15ps. The on-the-fly jitter was successfully suppressed to a random jitter level (<26ps p-p).

In an X channel, multiple transmitters transmit independent signals to different receivers. Separate zero-forcing (ZF) precoding is used at transmitters in the two-user X channel with two transmitters and two receivers. A closed-form optimal power allocation is derived under the sum power constraint (SPC) to maximize the squared minimum distance. The ZF strategy with optimal power allocation achieves a significant signal to noise ratio (SNR) improvement. Under the individual power constraint (IPC), a suboptimal power allocation that achieves better performance compared to the existing algorithms is also proposed.

Non-volatile memories are a promising alternative to memory design but data stored in them still may be destructed due to crosstalk and radiation. The data stored in them can be restored by using error-correcting codes but they require extra bits to correct bit errors. One of the largest problems in non-volatile memories is that they consume ten to hundred times more energy than normal memories in bit-writing. It is quite necessary to reduce writing bits. Recently, a REC code (bit-write-reducing and error-correcting code) is proposed for non-volatile memories which can reduce writing bits and has a capability of error correction. The REC code is generated from a linear systematic error-correcting code but it must include the codeword of all 1's, i.e., 11…1. The codeword bit length must be longer in order to satisfy this condition. In this letter, we propose a method to generate a relaxed REC code which is generated from a relaxed error-correcting code, which does not necessarily include the codeword of all 1's and thus its codeword bit length can be shorter. We prove that the maximum flipping bits of the relaxed REC code is still limited theoretically. Experimental results show that the relaxed REC code efficiently reduce the number of writing bits.

To deal with the reliability issue caused by soft errors, this paper proposed a low power soft error hardened latch (SHC) design using a novel Schmitt-Trigger-based C-element for reliable low power applications. Unlike state-of-the-art soft error tolerant latches that are usually based on hardware redundancy with large area overhead and high power consumption, the proposed SHC latch is implemented through double-sampling and node-checking using a novel Schmitt-Trigger-based C-element, which can help to reduce the area overhead and the corresponding power consumption as well. The evaluation results show that the total number of transistors of the proposed SHC latch is only increased by 2 when compared to the conventional unhardened C2MOS latch, while up to 20.35% and 82.96% power reduction can be achieved when compared to the conventional unhardened C2MOS latch and the existing soft error tolerant HiPeR design, respectively.

This paper derives highly accurate and effective closed-form formulas for the average upper bound on the pairwise error probability (PEP) of the multi-carrier index keying orthogonal frequency division multiplexing (MCIK-OFDM) system with low-complexity detection (i.e., greedy detection) in two-wave with diffuse power (TWDP) fading channels. To be specific, we utilize an exact moment generating function (MGF) of the signal-to-noise ratio (SNR) under TWDP fading to guarantee highly precise investigations of error probability performance; existing formulas for average PEP employ the approximate probability density function (PDF) of the SNR for TWDP fading, thereby inducing inherent approximation error. Moreover, some special cases of TWDP fading are also considered. To quantitatively reveal the achievable modulation gain and diversity order, we further derive asymptotic formulas for the upper bound on the average PEP. The obtained asymptotic expressions can be used to rapidly estimate the achievable error performance of MCIK-OFDM with the greedy detection over TWDP fading in high SNR regimes.

In this paper, we investigate the capacity performance of an in-band full-duplex (IBFD) amplify-and-forward two-way relay system under the effect of residual loop-back-interference (LBI). In a two-way IBFD relay system, two IBFD nodes exchange data with each other via an IBFD relay. Both two-way relaying and IBFD one-way relaying could double the spectrum efficiency theoretically. However, due to imperfect channel estimation, the performance of two-way relaying is degraded by self-interference at the receiver. Moreover, the performance of the IBFD relaying is deteriorated by LBI between the transmit antenna and the receive antenna of the node. Different from the IBFD one-way relay scenario, the IBFD two-way relay system will suffer from an extra level of LBI at the destination receiver. We derive accurate approximations of the average end-to-end capacities for both the IBFD and half-duplex modes. We evaluate the impact of the LBI and channel estimation errors on system performance. Monte Carlo simulations verify the validity of analytical results. It can be shown that with certain signal-to-noise ratio values and effective interference cancellation techniques, the IBFD transmission is preferable in terms of capacity. The IBFD two-way relaying is an attractive technique for practical applications.

We propose a radiation-hardened Flip-Flop (FF) with stacked transistors based on the Adaptive Coupling Flip-Flop (ACFF) with low power consumption in a 65 nm FDSOI process. The slave latch in ACFF is much weaker against soft errors than the master latch. We design several FFs with stacked transistors in the master or slave latches to mitigate soft errors. We investigate radiation hardness of the proposed FFs by α particle and neutron irradiation tests. The proposed FFs have higher radiation hardness than a conventional DFF and ACFF. Neutron irradiation and α particle tests revealed no error in the proposed AC Slave-Stacked FF (AC_SS FF) which has stacked transistors only in the slave latch. We also investigate radiation hardness of the proposed FFs by heavy ion irradiation. The proposed FFs maintain higher radiation hardness up to 40 MeV-cm2/mg than the conventional DFF. Stacked inverters become more sensitive to soft errors by increasing tilt angles. AC_SS FF achieves higher radiation hardness than ACFF with the performance equivalent to that of ACFF.

This paper demonstrates the suppressing power of 10 Gbps On Off keyed signal using biased half-wave rectification. Authors have previously reported that radio frequency (RF) and optical on-off keying (OOK) signal can be simultaneously transmitted over the radio over fiber (RoF) link [1]. Since the optical OOK signal has much broader bandwidth compared to RF signal, it interferes with RF signal. Reference [1] experimentally shows that the optical OOK signal degrades the RF signal in terms of signal-to-noise power ratio (SNR) when 10 Gbps OOK and 1.9 GHz microwave are employed as baseband and RF, respectively. This paper proposes an interference suppression, and the proposal is subsequently used for detecting the RF signal. Experiments are conducted for the purpose of the proof-of-concept of the proposal. Finally numerical simulations are employed to show the performance enhancement in terms of error vector magnitude (EVM).

The conventional generalized spatial modulation (GSM) simultaneously activates multiple transmit antennas in order to improve the spectral efficiency of the original SM. In this letter, to lessen the hardware burden of the multiple RF chains, we provide a new scheme that is designed by combining the GSM scheme using only two active antennas with quaternary quasi-orthogonal sequences of a length of two. Compared with the other SM schemes, the proposed scheme has significant benefits in average error performances and/or their hardware complexities of the RF systems.

This paper shows an optimal spreading sequence in the Weyl sequence class, which is similar to the set of the Oppermann sequences for asynchronous CDMA systems. Sequences in Weyl sequence class have the desired property that the order of cross-correlation is low. Therefore, sequences in the Weyl sequence class are expected to minimize the inter-symbol interference. We evaluate the upper bound of cross-correlation and odd cross-correlation of spreading sequences in the Weyl sequence class and construct the optimization problem: minimize the upper bound of the absolute values of cross-correlation and odd cross-correlation. Since our optimization problem is convex, we can derive the optimal spreading sequences as the global solution of the problem. We show their signal to interference plus noise ratio (SINR) in a special case. From this result, we propose how the initial elements are assigned, that is, how spreading sequences are assigned to each users. In an asynchronous CDMA system, we also numerically compare our spreading sequences with other ones, the Gold codes, the Oppermann sequences, the optimal Chebyshev spreading sequences and the SP sequences in Bit Error Rate. Our spreading sequence, which yields the global solution, has the highest performance among the other spreading sequences tested.

In this paper, a new and an accurate symbol error probability's analytical model of Rectangular Quadrature Amplitude Modulation in α-µ fading channel is presented for single-user single-input multi-output environment, which can be easily extended to generalized fading channels. The maximal-ratio combining technique is utilized at the receiving end and unified moment generating functions are used to derivate the results. The fading mediums considered are independent and non-identical. The mathematical model presented is applicable for slow and frequency non-selective fading channels only. The final expression is presented in terms of Meijer G-function; it contains single integrals with finite limits to evaluate the mathematical expressions with numerical techniques. The beauty of the model will help evaluate symbol error probability of rectangular quadrature amplitude modulation with spatial diversity over various fading mediums not addressed in this article. To check for the validity of derived analytical expressions, comparison is made between theoretical and simulation results at the end.

To effectively analyze the influence of two-wave with diffuse power (TWDP) fading on the achievable error rate performance of binary phase-shift keying (BPSK) signaling, we derive two novel concise asymptotic closed-form bit error rate (BER) formulas. We perform asymptotic analysese based on existing exact and approximate BER formulas, which are obtained from the exact probability density function (PDF) or moment generating function (MGF), and the approximate PDF of TWDP fading. The derived asymptotic closed-form expressions yield explicit insights into the achievable error rate performance in TWDP fading environments. Furthermore, the absolute relative error (ARE) between the exact and approximate coding gains is investigated, from which we also propose a criterion for the order of an approximate PDF, which is more robust than the conventional criterion. Numerical results clearly demonstrate the accuracy of the derived asymptotic formulas, and also support our proposed criterion.

In this paper, we consider a two-hop communication system with an amplify-and-forward (AF) relay under channel estimation errors. According to the channel quality of the link between the base station (BS) and the relay, we investigate two typical relay scenarios. We study the capacity performance for both In-Band Full-Duplex (IBFD) and Half-Duplex (HD) transmission modes. Moreover, we consider two operation modes of the user equipment (UE) for each scenario. Closed-form expressions of ergodic capacities with channel estimation errors are obtained for scenario-1. And we derive accurate approximations of ergodic capacities for scenario-2. Numerical experiments are conducted to verify the analytical results and show that our theoretical derivations are perfectly matched with the simulations. We show that with practical signal-to-noise ratio values and effective interference cancellation techniques, IBFD transmission is preferable in terms of capacity.

This paper presents a new GPU-based rasterization algorithm for Boolean operations that handles arbitary closed polygons. We construct an efficient data structure for interoperation of CPU and GPU and propose a fast GPU-based contour extraction method to ensure the performance of our algorithm. We then design a novel traversing strategy to achieve an error-free calculation of intersection point for correct Boolean operations. We finally give a detail evaluation and the results show that our algorithm has a higher performance than exsiting algorithms on processing polygons with large amount of vertices.

We present the concept of key-rotatable and security-updatable homomorphic encryption (KR-SU-HE) scheme, which is defined as a class of public-key homomorphic encryption in which the keys and the security of any ciphertext can be rotated and updated while still keeping the underlying plaintext intact and unrevealed. After formalising the syntax and security notions for KR-SU-HE schemes, we build a concrete scheme based on the Learning With Errors assumption. We then perform several careful implementations and optimizations to show that our proposed scheme is efficiently practical.

In an IoT system, neural networks have the potential to perform advanced information processing in various environments. To clarify this, the robustness of a restricted Boltzmann machine (RBM) used for deep neural networks, such as a deep belief network (DBN), was studied in this paper. Even if memory or logic errors occurred in the circuit operating in the RBM while pre-training the DBN, they did not affect the identification rate of the DBN, showing the robustness of the RBM. In addition, robustness against soft errors was evaluated. The soft errors had almost no influence on the RBM unless they were as large as 1012 times or more in the 50-nm CMOS process.

In this paper, a study on the design and implementation of uniform 4-level quantizers for soft-decision decodings for binary linear codes is shown. Simulation results on quantized Viterbi decoding with a 4-level quantizer for the (64,42,8) Reed-Muller code show that the optimum stepsize, which is derived from the cutoff rate, gives an almost optimum error performance. In addition, the simulation results show that the case where the number of optimum codewords is larger than the one for a received sequence causes non-negligible degradation on error performance at high SN ratios of Eb/N0.