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  • A Digital Neural Network Coprocessor with a Dynamically Reconfigurable Pipeline Architecture

    Takayuki MORISHITA  Youichi TAMURA  Takami SATONAKA  Atsuo INOUE  Shin-ichi KATSU  Tatsuo OTSUKI  

     
    PAPER-Neural Networks and Chips

      Vol:
    E76-C No:7
      Page(s):
    1191-1196

    We have developed a digital coprocessor with a dynamically reconfigurable pipeline architecture specified for a layered neural network which executes on-chip learning. The coprocessor attains a learning speed of 18 MCUPS that is approximately twenty times that of the conventional DSP. This coprocessor obtains expansibility in the calculation through a larger multi-layer, network by means of a network decomposition and a distributed processing approach.

  • Forced Formation of a Geometrical Feature Space by a Neural Network Model with Supervised Learning

    Toshiaki TAKEDA  Hiroki MIZOE  Koichiro KISHI  Takahide MATSUOKA  

     
    LETTER

      Vol:
    E76-A No:7
      Page(s):
    1129-1132

    To investigate necessary conditions for the object recognition by simulations using neural network models is one of ways to acquire suggestions for understanding the neuronal representation of objects in the brain. In the present study, we trained a three layered neural network to form a geometrical feature representation in its output layer using back-propagation algorithm. After training using 73 learning examples, 65 testing patterns made by various combinations of above features could be recognized with the network at a rate of 95.3% appropriate response. We could classify four types of hidden layer units on the basis of effects on the output layer.

  • CNV Based Intermedia Synchronization Mechanism under High Speed Communication Environment

    Chan-Hyun YOUN  Yoshiaki NEMOTO  Shoichi NOGUCHI  

     
    PAPER-Communication Networks and Service

      Vol:
    E76-B No:6
      Page(s):
    634-645

    In this paper, we discuss to the intermedia synchronization problems for high speed multimedia communication. Especially, we described how software synchronization can be operated, and estimated the skew bound in CNV when considering the network delay. And we applied CNV to the intermedia synchronization and a hybrid model (HSM) is proposed. Furthermore, we used the statistical approach to evaluate the performance of the synchronization mechanisms. The results of performance evaluation show that HSM has good performance in the probability of estimation error.

  • Unified Scheduling of High Performance Parallel VLSI Processors for Robotics

    Bumchul KIM  Michitaka KAMEYAMA  Tatsuo HIGUCHI  

     
    PAPER-Parallel Processor Scheduling

      Vol:
    E76-A No:6
      Page(s):
    904-910

    The performance of processing elements can be improved by the progress of VLSI circuit technology, while the communication overhead can not be negligible in parallel processing system. This paper presents a unified scheduling that allocates tasks having different task processing times in multiple processing elements. The objective function is formulated to measure communication time between processing elements. By employing constraint conditions, the scheduling efficiently generates an optimal solution using an integer programming so that minimum communication time can be achieved. We also propose a VLSI processor for robotics whose latency is very small. In the VLSI processor, the data transfer between two processing elements can be done very quickly, so that the communication cycle time is greatly reduced.

  • Boltzmann Machine Processor Using Single-Bit Operation

    Mamoru SASAKI  Shuichi KANEDA  Fumio UENO  Takahiro INOUE  Yoshiki KITAMURA  

     
    PAPER-Nonlinear Circuits and Neural Nets

      Vol:
    E76-A No:6
      Page(s):
    878-885

    This paper describes a single-bit parallel processor specified to Boltzmann Machine. The processor has SIMD (Shingle Instruction Multiple Data stream) type parallel architecture and every processing element (PE) has a single-bit ALU and a local memory storing connected weights between neurons. Features of the processor are large scale parallel processing a number of the simple single-bit PEs and effective expansion realized by multiple chips connected simple bus lines. Moreover, it is enhanced that the processing speed can be independent of the number of the neurons. We designed the PE using 1.2 µm CMOS process standard cells and confirmed the high performance using CAD simulations.

  • Error Probability Analysis in Reduced State Viterbi Decoding

    Carlos VALDEZ  Hiroyuki FUJIWARA  Ikuo OKA  Hirosuke YAMAMOTO  

     
    PAPER-Communication Theory

      Vol:
    E76-B No:6
      Page(s):
    667-676

    The performance evaluation by analysis of systems employing Reduced State Viterbi decoding is addressed. This type of decoding is characterized by an inherent error propagation effect, which yields a difficulty in the error probability analysis, and has been usually neglected in the literature. By modifying the Full State trellis diagram, we derive for Reduced State schemes, new transfer function bounds with the effects of error propagation. Both the Chernoff and the tight upper bound are applied to the transfer function in order to obtain the bit error probability upper bound. Furthermore, and in order to get a tighter bound for Reduced State decoding schemes with parallel transitions, the pairwise probability of the two sequences involved in an error event is upper bounded, and then the branch metric of a sequence taken from that bound is associated with a truncated instead of complete Gaussian noise probability density function. To support the analysis, particular assessment is done for a Trellis Coded Modulation scheme.

  • A New Auto-Regressive Equation for Generating a Binary Markov Chain

    Junichi NAKAYAMA  

     
    LETTER-Digital Signal Processing

      Vol:
    E76-A No:6
      Page(s):
    1031-1034

    This paper proposes a second order auto-regressive equation with discrete-valued random coefficients. The auto-regressive equation transforms an independent stochastic sequence into a binary sequence, which is a special case of a stationary Markov chain. The power spectrum, correlation function and the transition probability are explicitly obtained in terms of the random coefficients. Some computer results are illustrated in figures.

  • Robust Performance Using Cascaded Artificial Neural Network Architecture

    Joarder KAMRUZZAMAN  Yukio KUMAGAI  Hiromitsu HIKITA  

     
    LETTER-Digital Signal Processing

      Vol:
    E76-A No:6
      Page(s):
    1023-1030

    It has been reported that generalization performance of multilayer feedformard networks strongly depends on the attainment of saturated hidden outputs in response to the training set. Usually standard Backpropagation (BP) network mostly uses intermediate values of hidden units as the internal representation of the training patterns. In this letter, we propose construction of a 3-layer cascaded network in which two 2-layer networks are first trained independently by delta rule and then cascaded. After cascading, the intermediate layer can be viewed as hidden layer which is trained to attain preassigned saturated outputs in response to the training set. This network is particularly easier to construct for linearly separable training set, and can also be constructed for nonlinearly separable tasks by using higher order inputs at the input layer or by assigning proper codes at the intermediate layer which can be obtained from a trained Fahlman and Lebiere's network. Simulation results show that, at least, when the training set is linearly separable, use of the proposed cascaded network significantly enhances the generalization performance compared to BP network, and also maintains high generalization ability for nonlinearly separable training set. Performance of cascaded network depending on the preassigned codes at the intermediate layer is discussed and a suggestion about the preassigned coding is presented.

  • Hardware Implementation of the Multifrequency Oscillation Learning Method for Analog Neural Networks

    Hiroshi MIYAO  Masafumi KOGA  Takao MATSUMOTO  

     
    LETTER-Bio-Cybernetics

      Vol:
    E76-D No:6
      Page(s):
    717-728

    High-speed learning of neural networks using the multifrequency oscillation method is demonstrated for first time. During the learning of an analog neural network integrated circuit implementing the exclusive-OR' logic, weight and threshold values converge to steady states within 2 ms for a learning speed of 2 mega-patterns per second.

  • Very Small MMIC Variable Frequency and Q Factor Active Bandpass Filters Using Novel Positive and Negative Feedback Design Techniques

    Hideo SUWAKI  Takashi OHIRA  

     
    PAPER

      Vol:
    E76-C No:6
      Page(s):
    919-924

    This paper presents newly developed very small MMIC bandpass filters along with novel positive and negative feedback techniques. In order to maintain the expected Q factor without unwanted oscillations in the positive feedback loop, the unity-coupler principle is proposed to stabilize the constituent amplifier. A prototype bandpass filter is monolithically integrated in a very small area of only 0.1 mm2 on a GaAs substrate. A sharp factor as high as 5.6/1-30 dB is achieved near the frequency range of 1 GHz. The other technique presented in this paper is to achieve the bandpass function without using any positive feedback. This is negative feedback consisting of feedback elements with the unique variable transfer function of b/(1as). A variable bandpass filter based on this design concept is also fabricated in a 1.21.3 mm2 area on a GaAs substrate. It has both a varactor and varistor integrated in the circuit, resulting in an independently controllable center frequency and Q factor. It is shown experimentally that the Q factor is controllable over a remarkable range of 20 to 400 and the center frequency is broader than 100 MHz at the 1 GHz band. By cascading two of the fabricated MMIC chips, a forth-order frequency response is successfully obtained along with a 35-40 dB forward gain and an in-band gain flatness of 0.35 dB.

  • Analysis of Transient Spectral Spread of Directly Modulated DFB LD's

    Takeshi KAWAI  Atsutaka KURIHARA  Masakazu MORI  Toshio GOTO  Akira MIYAUCHI  Takakiyo NAKAGAMI  

     
    PAPER-Optical Communication

      Vol:
    E76-B No:6
      Page(s):
    677-683

    The transient spectral spread of directly modulated DFB LD's, which appears in the time-resolved chirping measurement, is studied experimentally and numerically. Such a phenomenon has been already reported as a side mode oscillation called "subpeak", but there has been little argument as to the physical origin. We make it clear that the subpeak is a spurious mode due to the influence of the photodetector bandwidth. The minimum photodetector bandwidth which is necessary in the time-resolved chirping measurement is examined. Furthermore the distortion of the long-distance transmitted waveform is also explained by one mode oscillation.

  • Toward the New Era of Visual Communication

    Masahide KANEKO  Fumio KISHINO  Kazunori SHIMAMURA  Hiroshi HARASHIMA  

     
    INVITED PAPER

      Vol:
    E76-B No:6
      Page(s):
    577-591

    Recently, studies aiming at the next generation of visual communication services which support better human communication have been carried out intensively in Japan. The principal motive of these studies is to develop new services which are not restricted to a conventional communication framework based on the transmission of waveform signals. This paper focuses on three important key words in these studies; "intelligent," "real," and "distributed and collaborative," and describes recent research activities. The first key word "intelligent" relates to intelligent image coding. As a particular example, model-based coding of moving facial images is discussed in detail. In this method, shape change and motion of the human face is described by a small number of parameters. This feature leads to the development of new applications such as very low bit-rate transmission of moving facial images, analysis and synthesis of facial expression, human interfaces, and so on. The second key word "real" relates to communication with realistic sensations and virtual space teleconferencing. Among various component technologies, real-time reproduction of 3-D human images and a cooperative work environment with virtual space are discussed in detail. The last key word "distributed and collaborative" relates to collaborative work in a distributed work environment. The importance of visual media in collaborative work, a concept of CSCW, and requirements for realizing a distributed collaborative environment are discussed. Then, four examples of CSCW systems are briefly outlined.

  • Template Based Method of Edge Linking with Low Distortion

    Fredrick L. MILLER  Junji MAEDA  Hiroshi KUBO  

     
    LETTER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E76-D No:6
      Page(s):
    711-716

    In the field of computer vision the detection of edges in an image serves to simplify the date in the early stages, into a form which is more easily processed by the computer. But because of noise or due to the inherent weaknesses of the chosen edge detector, gaps or interruptions in the edges may be formed. In order for further processing to proceed with accuracy and confidence, these gaps must be filled or linked to form a more continuous edge. Proposed in this paper is a unique method of edge linking. This method consists of three steps, labelling, linking and merging. The procedure makes use of global information in the labelling process and local information with the use of templates in the linking and merging processes. As a result of the unique way in which the gaps between edge segments are filled, distortion of the edge image is kept minimal. One other advantage of the proposed edge linker is that it can be used in combination with different edge detection schemes. To show the effectiveness of the proposed method, comparisons are given. These include the linear feature extraction method of Zhou et.al., upon which the proposed method is based and also outputs from a method described by Nevatia.

  • A GaAs Monolithic Sampling Phase Frequency Comparator for Extending the Pull-In Range of Microwave Phase-Locked Oscillators

    Tadao NAKAGAWA  Tetsuo HIROTA  Takashi OHIRA  

     
    PAPER

      Vol:
    E76-C No:6
      Page(s):
    944-949

    A novel sampling comparator circuit is presented for extending the pull-in range of microwave phase-locked oscillators (PLOs). It performs both phase and frequency detection without any frequency dividers, and a GaAs MMIC prototype is developed and tested. The proposed comparator improves the pull-in range by about 10 times more than is possible with conventional sampling phase detectors.

  • Analysis of Excess Intensity Noise due to External Optical Feedback in DFB Semiconductor Lasers on the Basis of Mode Competition Theory

    Michihiko SUHARA  Minoru YAMADA  

     
    PAPER-Opto-Electronics

      Vol:
    E76-C No:6
      Page(s):
    1007-1017

    The generation mechanism for excess intensity noise due to optical feedback is analyzed theoretically and experimentally. Modal rate equations under the weakly coupled condition with external feedback are derived to include the mode competition phenomena in DFB and Fabry-Perot lasers. We found that the sensitivity of the external feedback strongly depends on design parameters of structure, such as the coupling constant of the corrugation, the facet reflection and the phase relation between the corrugation and the facet. A DFB laser whose oscillating wavelength is well adjusted to Bragg wavelength through insertion of a phase adjustment region becomes less sensitive to external optical feedback than a Fabry-Perot laser, but other types of DFB lasers revealing a stop band are more sensitive than the Fabry-Perot laser.

  • Fault Analysis on (K+1)-Valued PLA Structure Logic Circuits

    Hui Min WANG  Chung Len LEE  Jwu E CHEN  

     
    PAPER-Fault Analysis, Testing and Verification

      Vol:
    E76-A No:6
      Page(s):
    1001-1010

    This paper presents a general form and a set of basic gates to implement (K+1)-valued PLA structure logic circuits. A complete fault analysis on the proposed circuit has been done and it is shown that all fanout stem faults can be collapsed to branch faults. A procedure for fault collapsing is derived. For any function implemented in the (K+1)-valued circuit, the number of remaining faults is smaller than that of the 2-valued circuit after the collapsing, where the value of K is dependent on the number of outputs and the assignment of the OR plane of the 2-valued logic circuit.

  • Noise Temperature of Active Feedback Resonator (AFR)

    Youhei ISHIKAWA  Sadao YAMASHITA  Seiji HIDAKA  

     
    PAPER

      Vol:
    E76-C No:6
      Page(s):
    925-931

    An active feedback resonator (AFR) is a kind of circuit which functions as a high unloaded Q resonator. The AFR employs an active feedback loop which compensates for the energy loss of a conventional microwave resonator. Owing to an active element in the AFR, thermal noise should be taken into account when designing the AFR. In order to simplify a circuit design using the AFR we introduced noise temperature (Tn) for the AFR. In addition, we describe the AFR design which gives minimum noise temperature. Finally, the noise temperature, measured in an AFR as a band elimination filter, is compared with the theoretical value to evaluate the AFR.

  • Comparison of Convergence Behavior and Generalization Ability in Backpropagation Learning with Linear and Sigmoid Output Units

    Joarder KAMRUZZAMAN  Yukio KUMAGAI  Hiromitsu HIKITA  

     
    LETTER-Neural Networks

      Vol:
    E76-A No:6
      Page(s):
    1035-1042

    The most commonly used activation function in Backpropagation learning is sigmoidal while linear function is also sometimes used at the output layer with the view that choice between these activation functions does not make considerable differences in network's performance. In this letter, we show distinct performance between a network with linear output units and a similar network with sigmoid output units in terms of convergence behavior and generalization ability. We experimented with two types of cost functions, namely, sum-squared error used in standard Backpropagation and log-likelihood recently reported. We find that, with sum-squared error cost function and hidden units with nonsteep sigmoid function, use of linear units at the output layer instead of sigmoidal ones accelerates the convergence speed considerably while generalization ability is slightly degraded. Network with sigmoid output units trained by log-likelihood cost function yields even faster convergence and better generalization but does not converge at all with linear output units. It is also shown that a network with linear output units needs more hidden units for convergence.

  • Fuzzy Petri Net Representation and Reasoning Methods for Rule-Based Decision Making Systems

    Myung-Geun CHUN  Zeungnam BIEN  

     
    PAPER-Concurrent Systems, Discrete Event Systems and Petri Nets

      Vol:
    E76-A No:6
      Page(s):
    974-983

    In this paper, we propose a fuzzy Petri net model for a rule-based decision making system which contains uncertain conditions and vague rules. Using the transformation method introduced in the paper, one can obtain the fuzzy Petri net of the rule-based system. Since the fuzzy Petri net can be represented by some matrices, the algebraic form of a state equation of the fuzzy Petri net is systematically derived. Both forward and backward reasoning are performed by using the state equations. Since the proposed reasoning methods require only simple arithmetic operations under a parallel rule firing scheme, it is possible to perform real-time decision making with applications to control systems and diagnostic systems. The methodology presented is also applicable to classical (nonfuzzy) knowledge base systems if the nonfuzzy system is considered as a special case of a fuzzy system with truth values being equal to the extreme values only. Finally, an illustrative example of a rule-based decision making system is given for automobile engine diagnosis.

  • L* Learning: A Fast Self-Organizing Feature Map Learning Algorithm Based on Incremental Ordering

    Young Pyo JUN  Hyunsoo YOON  Jung Wan CHO  

     
    PAPER-Bio-Cybernetics

      Vol:
    E76-D No:6
      Page(s):
    698-706

    The self-organizing feature map is one of the most widely used neural network paradigm based on unsupervised competitive learning. However, the learning algorithm introduced by Kohonen is very slow when the size of the map is large. The slowness is caused by the search for large map in each training steps of the learning. In this paper, a fast learning algorithm based on incremental ordering is proposed. The new learning starts with only a few units evenly distributed on a large topological feature map, and gradually increases the number of units until it covers the entire map. In middle phases of the learning, some units are well-ordered and others are not, while all units are weekly-ordered in Kohonen learning. The ordered units, during the learning, help to accelerate the search speed of the algorithm and accelerate the movements of the remaining unordered units to their topological locations. It is shown by theoretical analysis as well as experimental analysis that the proposed learning algorithm reduces the training time from O(M2) to O(log M) for M by M map without any additional working space, while preserving the ordering properties of the Kohonen learning algorithm.

12381-12400hit(12654hit)