A number of schemes have been proposed for communication using chaos over the past years. Regardless of the exact modulation method used, the transmitted signal must go through a physical channel which undesirably introduces distortion to the signal and adds noise to it. The problem is particularly serious when coherent-based demodulation is used because the necessary process of chaos synchronization is difficult to implement in practice. This paper addresses the channel distortion problem and proposes a technique for channel equalization in chaos-based communication systems. The proposed equalization is realized by a modified recurrent neural network (RNN) incorporating a specific training (equalizing) algorithm. Computer simulations are used to demonstrate the performance of the proposed equalizer in chaos-based communication systems. The Henon map and Chua's circuit are used to generate chaotic signals. It is shown that the proposed RNN-based equalizer outperforms conventional equalizers.

ZCZ sets are families of sequences, whose periodic auto/cross-correlation functions have zero correlation zone at the both side of the zero-shift. They can provide approximately synchronized CDMA systems without intra-cell interference for cellular mobile communications. This paper presents ternary ZCZ sets achieving a mathematical bound, and investigates the average interference parameters for the sets in order to evaluate inter-cell interference. It is shown that they can provide AS-CDMA systems with efficiency frequency usage.

In loudspeaker-based 3D audio systems, there are some acoustic crosstalk cancellation methods to enlarge the 'sweet spot' around a fixed listener position. However, these methods have common defect that most of them can be applied only to the specific narrow frequency band. In this letter, we propose the more robust acoustic crosstalk cancellation method so that we can cancel the crosstalk signal in far wider frequency band and enlarge 'sweet spot. ' For this goal, we apply a sum and difference filter to the conventional three loudspeaker-based 3D audio system.

A quasi-periodic signal is a periodic signal with period and amplitude variations. Several physiological signals, including the electrocardiogram (ECG), can be treated as quasi-periodic. Vector quantization (VQ) is a valuable and universal tool for signal compression. However, compressing quasi-periodic signals using VQ presents several problems. First, a pre-trained codebook has little adaptation to signal variations, resulting in no quality control of reconstructed signals. Secondly, the periodicity of the signal causes data redundancy in the codebook, where many codevectors are highly correlated. These two problems are solved by the proposed codebook replenishment VQ (CRVQ) scheme based on a bar-shaped (BS) codebook structure. In the CRVQ, codevectors can be updated online according to signal variations, and the quality of reconstructed signals can be specified. With the BS codebook structure, the codebook redundancy is reduced significantly and great codebook storage space is saved; moreover variable-dimension (VD) codevectors can be used to minimize the coding bit rate subject to a distortion constraint. The theoretic rationale and implementation scheme of the VD-CRVQ is given. The ECG data from the MIT/BIH arrhythmic database are tested, and the result is substantially better than that of using other VQ compression methods.

The potential network architecture of the emerging carrier class VoIP (Voice over IP) technology for NGN (Next Generation Networks) adopts distributed control architecture to take full advantage of scalability, reliability, flexibility, and interoperability. However, the design of distributed control architecture in the carrier class VoIP network is the state-of-the-art in decentralization and distribution of control. Different configurations of system elements, control scheme of inter system elements communications, signaling protocol, functional partitioning, and scheduling of jobs in call control processing may affect the system performance and QoS (Quality of Service) of MGC (Media Gateway Controller) in carrier class VoIP network. Hence, the modeling of distributed control architecture and its performance analysis are essential issues whenever optimum control architecture has to be determined to meet design requirements. Based on these reasons, this paper proposes several potential network architectures and focuses on the performance study of distributed control architecture in carrier class VoIP network. The SIGTRAN-based distributed control architecture model and the MGCP/MEGACO-based distributed control architecture model are presented. Then, we analyze the SIGTRAN-based distributed control architecture model between MGC and SG (Signaling Gateway) using WRR (Weighted Round Robin) and WF2Q (Worst-case Fair Weighted Fair Queueing) scheduling algorithms respectively. And, we analyze the MGCP/MEGACO-based distributed control architecture model between MGC and MG (Media Gateway) using M/G/1 gating service queueing model. Consequently, the results of performance analysis can be used to evaluate whether the performance of distributed control architecture model can meet the requirement of planning and design for carrier class VoIP network deployment.

An LCD Driver IC includes more than 300 buffer amplifiers on a single chip. The phase compensation capacitors (on-chip Miller capacitors) for the amplifiers are more than 1000 pF and occupy a large chip area. This paper describes a two-gain-stage amplifier in which an on-chip Miller capacitor is not used for phase compensation in an LCD Driver IC. In the proposed amplifier, phase compensation is achieved only by a newly introduced zero, which is formed by the load capacitance and a phase compensation resistor connected between the output of the amplifier and the capacitive load. Designs of the phase compensation resistor and the amplifier before compensation are discussed, considering a typical load capacitance range. The test chip was fabricated. The newly introduced zero successfully stabilized the amplifier. The chip area for the amplifier was reduced by 30-40%, compared with our previously reported one. The current consumption of the amplifier was only 5 µA. The experimental results of the fabricated test chip support that the proposed amplifier is suitable to an LCD driver IC with a smaller chip area.

We show a method to determine a Steiner Minimum Tree (SMT) and a necessary and sufficient condition that an SMT is a full Steiner tree for three given points in -geometry ( = 3m, m is a positive integer). The -geometry allows only orientations with angles i/ (i and ( 2) are integers), and fill up the gap between the rectilinear geometry ( = 2) and the Euclidean geometry ( = ). An SMT in -geometry ( = 3m) has a similar property to that in the Euclidean geometry. The method to determine an SMT in -geometry is an extension of the well-known method in the Euclidean geometry. The Steiner point in -geometry is any point in the intersection area with a parallelogram and a Steiner locus. Then there are infinite candidate locations of the Steiner point. The Steiner point in the Euclidean geometry is that in -geometry ( = 3m).

In this paper, we propose a novel higher order time-frequency distribution (GDH) for a discrete time signal. This distribution is defined over the original discrete time-frequency grids through a delicate discretization of an equivalent expression of a higher order distribution, for a continuous time signal, in [4]. We also present a constructive design method, for the kernel of the GDH, by which the distribution satisfies (i) the alias free condition as well as (ii) the marginal conditions. Numerical examples show that the proposed distributions reasonably suppress the artifacts which are observed severely in the Wigner distribution and its simple higher order generalization.

This paper presents the performance modeling, analysis, and simulation of SIP-T (Session Initiation Protocol for Telephones) signaling system in carrier class packet telephony network for NGN (Next Generation Networks). Until recently, fone of the greatest challenges in the migration from existing PSTN (Public Switched Telephone Network) toward NGN is to build a carrier class packet telephony network that preserves the ubiquity, quality, and reliability of PSTN services while allowing the greatest flexibility for use of new packet telephony technology. The SIP-T signaling system defined in IETF (Internet Engineering Task Force) draft is a mechanism that uses SIP (Session Initiation Protocol) to facilitate the interconnection of PSTN with carrier class packet telephony network. Based on IETF, the SIP-T signaling system not only promises scalability, flexibility, and interoperability with PSTN but also provides call control function of MGC (Media Gateway Controller) to set up, tear down, and manage VoIP (Voice over IP) calls in carrier class packet telephony network. In this paper, we derive the buffer size, the mean of queueing delay, and the variance of queueing delay of SIP-T signaling system that are the major performance evaluation parameters for improving QoS (Quality of Service) and system performance of MGC in carrier class packet telephony network focused on toll by-pass or tandem by-pass of PSTN. First, we assume a mathematical model of the M/G/1 queue with non-preemptive priority assignment to represent SIP-T signaling system. Second, we derive the formulas of buffer size, queueing delay, and delay variation for the non-preemptive priority queue by queueing theory respectively. Besides, some numerical examples of buffer size, queueing delay, and delay variation are presented as well. Finally, the theoretical estimates are shown to be in excellent consistence with simulation results.

In this paper, we investigate the optimal assignment problem of cells in PCS (Personal Communication Service) to switches on a ATM (Asynchronous Transfer Mode) network. Given cells and switches on an ATM network (whose locations are fixed and known), the problem is to group cells into clusters and assign these clusters to switches in an optimum manner. This problem is modeled as a complex integer programming problem. Since finding an optimal solution of this problem is NP-hard, a heuristic solution model consists of three phases (Cell Pre-Partitioning Phase, Cell Exchanging Phase, and Cell Migrating Phase) is proposed. Experimental results show that Cell Exchanging and Cell Migrating Phases can really reduce total cost near 44% on average.

We propose a DPC-PA (Distributed Power Control with Power Assignment) algorithm to speed up the process of finding a feasible power set for multimedia CDMA wireless networks. We prove that given a feasible configuration, the power set of the DPC-PA algorithm will converge to a feasible power set which achieves equality in a set of linear equations. We also found, from numerical experiments, that the DPC-PA algorithm can find a feasible power set (if there is one) much faster than the distributed power control algorithm without power assignment.

On the basis of generalized theory of system design the behavior of the different design trajectories in the design phase space was analyzed. An additional acceleration effect of the design process has been discovered by the analysis of various design strategies with different initial points. This effect can be understood well on the basis of the elaborated design methodology by means of the different design trajectory analysis. This effect is displayed for all analyzed circuits and it reduces additionally the total computer time for the system design.

In this paper, the co-existence of TDMA and W-CDMA spectrum sharing system (TDMA/W-CDMA overlaid system) with cellular architecture is discussed. In this system, both systems share the same frequency band to improve the spectrum efficiency. Overall rate, bit error ratio (BER) and spectrum efficiency of the system are calculated for the forward link (down-link) in the presence of AWGN channel. Taking into account the path loss and shadow fading loss in this system with cellular architecture, W-CDMA applying interference cancellation (IC) shows a substantial difference in spectrum efficiency, the overlaid system can provide a greater overall rate and higher spectrum efficiency than a single multiple access-based system such as TDMA system or W-CDMA system. The interference cancellation can significantly improve BER of the spectrum overlaid system.

Software with design flaws increases maintenance costs, decreases component reuse, and reduces software life. Even well-designed software tends to deteriorate with time as it undergoes maintenance. Work on restructuring object-oriented designs involves estimating the quality of the designs using metrics, and automating transformations that preserve the behavior of the designs. However, these factors have been treated almost independently of each other. A long-term goal is to define transformations preserving the behavior of object-oriented designs, and automate the transformations using metrics. In this paper, we describe a genetic algorithm based restructuring approach using metrics to automatically modify object-oriented designs. Cohesion and coupling metrics based on abstract models are defined to quantify designs and provide criteria for comparing alternative designs. The abstract models include a call-use graph and a class-association graph that represent methods, attributes, classes, and their relationships. The metrics include cohesion, inheritance coupling, and interaction coupling based on the behavioral similarity between methods extracted from the models. We define restructuring operations, and show that the operations preserve the behavior of object-oriented designs. We also devise a fitness function using cohesion and coupling metrics, and automatically restructure object-oriented designs by applying a genetic algorithm using the fitness function.

In this letter a low-complexity and low-power realization of the 2D discrete-cosine-transform and its inverse (DCT/IDCT) is presented. A VLSI circuit based on the Chen algorithm with the distributed arithmetic approach is described. Furthermore low-power design techniques, based on clock gating and data driven switching activity reduction, are used to decrease the circuit power consumption. To this aim, input signal statistics have been extracted from H.263/MPEG verification models. Finally, circuit performance is compared to known software solutions and dedicated full-custom ones.

Wavelength division multiplexed (WDM) routed optical networks represent the direction towards future high-capacity wide-area network applications. A serious issue in WDM-routed networks, though, is light-path allocation which requires a combination of optical routing and wavelength assignment. While near-optimal-routing and wavelength-assignment algorithms aimed at minimizing network wavelength requirements have been reported, the practicability of wavelength-routed optical networks depends on the number of wavelengths required to satisfy a given traffic demand. In this paper, we proposed two symmetrical routing and wavelength-assignment methods for optical networks with a Grid or ShuffleNet physical topology. Here, we consider the case of non-adaptive wavelength routing systems, where the operations performed in nodes are independent of the network traffic load. In this case, the routing differs somewhat from that in adaptive routing networks where the routing function may produce different results at different times. The path followed by a wavelength never changes in non-adaptive wavelength-routing networks. When all N(N-1) node-pairs are to be connected, our methods lower the wavelength requirement to (or close to) its calculated minimum. Symmetry is a basic feature of both these regular topologies, but there are differences in the features within the topologies. Our goal has been to try to make use of the symmetry, and the differences in the native symmetry features, of these regular topologies to yield a lower wavelength requirement.

In this paper, we present a new approach to the construction of a set of binary sequences with a zero-correlation zone. The set consists of n pairs of binary sequences and the length of each binary sequence is n2(m+2) for some integers m and n. The Hadamard sequences with length n are used to construct the set. Any sequence in the set has 2(m+1) subsequences, each of length 2n. The author proves that any two subsequences are orthogonal if they belong to different pairs of binary sequences in the set.

In this paper, the efficient signal enhancement scheme for an adaptive antenna array under the Nakagami fading channel is proposed. The proposed signal enhancement scheme is the modified linear signal estimator with Toeplitz Matrix Approximation (TMA) method. The underlying principle of the proposed signal enhancement scheme is to reduce a noise component using not only the Lagrangian method of the constrained minimization but also a signal-plus-noise subspace method. TMA is also used to have the theoretical property of noise-free signal. These functions greatly enhance the performance of an adaptive antenna array by removing the all undesired noise effects from the post-correlation received signal. The proposed signal enhancement scheme is applied at the Wiener Maximal Ratio Combining (MRC) method which has been widely used as the conventional adaptive antenna array. Also, we investigated the effect of the power control error (PCE) for the proposed scheme over the Nakagami multipath fading channel. Several computer simulation examples are provided for illustrating the effectiveness of the proposed scheme.

This paper introduces the concept of hierarchical testability of data paths for delay faults. A definition of hierarchically two-pattern testable (HTPT) data path is developed. Also, a design for testability (DFT) method is presented to augment a data path to become an HTPT one. The DFT method incorporates a graph-based analysis of an HTPT data path and makes use of some graph algorithms. The proposed method can provide similar advantages to the enhanced scan approach at a much lower hardware overhead cost.

This paper presents a new DSP-oriented code optimization method to enhance performance by exploiting the specific architectural features of digital signal processors. In the proposed method, a source code is translated into the static single assignment form while preserving the high-level information related to loops and the address computation of array accesses. The information is used in generating hardware loop instructions and parallel instructions provided by most digital signal processors. In addition to the conventional control-data flow graph, a new graph is employed to make it easy to find auto-modification addressing modes efficiently. Experimental results on benchmark programs show that the proposed method is effective in improving performance.