Hisato FUJISAKA Yuji HIDAKA Singo KAJITA Mititada MORISUE
Piecewise linear (PWL) circuit modules operating on sigma-delta (ΣΔ) modulated signals and nonlinear signal processors built of these modules are proposed. The proposed module library includes absolute circuits, min/max selectors and negative resistances. Their output signal-to-noise ratio is higher than 50dB when their oversampling ratio is 28. A nonlinear filter and a stochastic resonator are presented as applications of the PWL modules to ΣΔ domain signal processing. The filter is structured with 37% of logic gates consumed by an equivalent filter with a 5-bit parallel signal form.
Hidenori KUWAKADO Hatsukazu TANAKA
Micali and Rivest have proposed a transitive signature scheme for an undirected graph, which is suitable for signing data with undirected graph structure. The problem of finding a transitive signature scheme for a directed graph has remained an open problem. In this paper, we propose a transitive signature scheme for a directed tree. Since the directed tree is a special case of the directed graph, the proposed scheme is a partial solution for the open problem. We also show that a transitive signature scheme for the undirected graph can be constructed from a bundling homomorphism. This means that the transitive signature scheme for the undirected graph is closely related with a fail-stop signature scheme.
Hisako SATO Mariko OHTSUKA Kazuya MAKABE Yuichi KONDO Kazumasa YANAGISAWA Peter M. LEE
This paper presents an efficient application of hot-carrier reliability simulation to delay libraries of 0.18µm and 0.14µm gate length logic products. Using analysis of simple primitive inverter cells, a design rule was developed in restricting signal rise time, and delay libraries of actual products were screened to check whether the rise time restrictions were met. At 200MHz, maximum rise time (0-100%) triseMAX was 0.8nsec (17% of duty) under Δtd/td = 5%. For a 800,000 net product, only 25 simulations were done (each less than one minute CPU time) for the internal devices with screening done for this logic process. 30 nets were caught, but judged reliable due to their reduced duty.
There exists an optimum power assignment, which can be obtained by solving a set of linear equations, for multi-cell CDMA networks. According to the direct method, we have to measure all the link gains to solve these linear equations. We propose in this paper an indirect method which allows each base station to only measure the received power for each user in its cell area and the interference from each other-cell. Compared to the direct method, the number of measurements can be largely reduced.
Jong Dae KIM Yong Up LEE Seokyu KIM
This paper presents the design considerations for a digital dental X-ray system with a commercial CCD sensor. Especially the system should be able to work with several X-ray machines even with them for the classical film. The hardware-software co-design methodology is employed to optimize the system. The full digital implementation is assumed for the reliability of the system. The considered functions cover the pre-processing such as the exposure detection, clamping and the dark level correction and the post-processing such as gray level compensation. It is analyzed with some other constraints in order to make the final partition. The entire system based on the partition will be described.
An accurate, fast delay calculation method suitable for high-performance, low-power LSI design is proposed. The delay calculation is composed of two steps: (1) the gate delay is calculated by using an effective capacitance obtained from a simple model we propose; and (2) the interconnect delay is also calculated from the effective capacitance and modified by using the gate-output transition time. The proposed delay calculation halves the error of a conventional rough calculation, achieving a computational error within 10% per gate stage. The mathematical models are simple enough that the method is suitable for quick delay calculation and logic circuit optimization in the early stages of LSI design. A delay optimization tool using this delay calculation method reduced the worst path delay of a multiply-add module by 11.2% and decreased the sizes of 58.1% of the gates.
Chih-Yung CHANG Po-Chih HUANG Chao-Tsun CHANG Yuh-Shyan CHEN
In Ad Hoc networks, communication between a pair of hosts uses channel resources, such that the channel cannot be used by the neighboring hosts. A channel used by one pair of hosts can be reused by another pair of hosts only if their communication ranges do not overlap. Channels are limited resources, accounting for why exploiting channel reuse opportunities and enhancing the channel utilization is essential to increasing system capacity. However, exploiting channel reuse opportunities may cause a co-channel interference problem. Two pairs of communicating hosts that use the same channel may gradually move toward to each other. A channel reassignment operation must be applied to these hosts to maintain their communication. This investigation presents a channel assignment protocol that enables the channel resources to be highly utilized. Following this protocol, a channel reassignment protocol is also proposed to protect the communicating hosts from co-channel interference caused by mobility. The proposed reassignment protocol efficiently reassigns a new available channel to a pair of hosts that suffers from co-channel interference. The performance of the proposed protocols is also examined. Experimental results reveal that the proposed protocols enable more hosts to communicate simultaneously and prevent their communication from failing.
Akira YAMADA Yasuhiro NUNOMURA Hiroaki SUZUKI Hisakazu SATO Niichi ITOH Tetsuya KAGEMOTO Hironobu ITO Takashi KURAFUJI Nobuharu YOSHIOKA Jingo NAKANISHI Hiromi NOTANI Rei AKIYAMA Atsushi IWABU Tadao YAMANAKA Hidehiro TAKATA Takeshi SHIBAGAKI Takahiko ARAKAWA Hiroshi MAKINO Osamu TOMISAWA Shuhei IWADE
A high-speed 32-bit RISC microcontroller has been developed. In order to realize high-speed operation with minimum hardware resource, we have developed new design and analysis methods such as a clock distribution, a bus-line layout, and an IR drop analysis. As a result, high-speed operation of 400 MHz has been achieved with power dissipation of 0.96 W at 1.8 V.
Hsiao-Hwa CHEN Yi-Ning CHANG Yu-Bing WU
A new pilot-aided multiuser detection scheme, single code cyclic shift (SCCS) detector, is proposed in this paper for synchronous CDMA multiuser signal reception. The unique feature of the proposed detector is that a receiver can decode multiuser signals even without explicit knowledge of all signature codes active in the system. The transmitting signal from a base station to a mobile contains two separated channels: the pilot and data channels; the former consists of periodically repeated pilot symbols encoded by the same signature codes as the one spreading the latter. Both pilot and data signals for a specific mobile are sent by a base-station using quadrature and in-phase carriers at the same frequency with QPSK modulation. A matched filter bank, consisting of M correlators that match to distinct cyclic-shifted versions of a "single" signature code, is employed for "channel cyclic shift correlation function" estimation, followed by the multiuser detection algorithm based on the channel information obtained earlier. The performance of the proposed SCCS detector is evaluated and compared to decorrelating detector by computer simulations considering various multipath channels with different profiles. The results demonstrate that a synchronous CDMA joint detection can be implemented successfully without necessarily knowing all signature codes of the system.
Michael LOGOTHETIS Ioannis NIKOLAOU
Modern network technologies gave rise to intelligent network reconfiguration schemes for restoration purposes and several network self-healing schemes, exploiting the capabilities of network elements (NE), have already been proposed. Each self-healing scheme has its own characteristics, regarding restoration time, flexibility, restoration cost and exploitation of NEs. Integrated self-healing networks, which combine more than one survivability techniques, mainly the Shared Self-Healing Rings (SSR) with the Dynamic Self-Healing Networks (DSN), can achieve higher network survivability and cost-effective network design. In this paper, we propose two algorithms for the design of spare and working channel capacities for integrated self-healing networks. In the first algorithm, A1, we do not take into account the capacity of network nodes, while in the second algorithm, A2, we take into account the limited capacity of network nodes. These algorithms are based on the shortest path principles, similarly to a previous algorithm (old algorithm) proposed by scientists of NEC Corporation for integrated self-healing network design. By the new algorithms we achieve more savings than by the old algorithm in total network capacity. On the other hand, strong motivation for the development of the new algorithms is the fact that the procedural steps of the old algorithm are not homogeneous; the old algorithm incorporates both heuristics and analytical methods, in contrast to the new algorithms that are pure heuristics. Moreover, we introduce restrictions in node-capacities of the network that they were not included in the old algorithm.
Hidefumi KUROKAWA Hiroyuki IKEGAMI Motohide OTSUBO Kiyoshi ASAO Kazuhisa KIRIGAYA Katsuya MISU Satoshi TAKAHASHI Tetsuji KAWATSU Kouji NITTA Hiroshi RYU Kazutoshi WAKABAYASHI Minoru TOMOBE Wataru TAKAHASHI Akira MUKOUYAMA Takashi TAKENAKA
This paper describes the effects of system LSI design with C language-based behavioral synthesis following several trials of design period reduction and quality improvement for a variety of circuit types. The results of these trials are analyzed from the viewpoints of description productivity, verification productivity, reusability and design flexibility as well as hardware and software co-verification. First the C-based design flow proposed by the authors is described, and the design productivity and verification productivity under this design flow is compared to RTL design. The reusability of the behavioral IP core and its efficiency with HW/SW co-verification are also shown using design examples. Next, using the example of an MPEG-4 video decoder design, a typical design process in a C-based design is shown with considerations regarding verification efficiency, reusability of the IP core and HW/SW co-verification. Finally, the authors' perspectives regarding future directions of system LSI design are discussed.
Yongmei LI Kazunori SUGAHARA Tomoyuki OSAKI Ryosuke KONISHI
It is well known that KT method proposed by R. Kumaresan and D. W. Tufts is used as a popular parameter estimation method of exponentially damped signal. It is based on linear backward-prediction method and singular value decomposition (SVD). However, it is difficult to estimate parameters correctly by KT method in the case when high noise exists in the signal. In this paper, we propose a parameter (frequency components and damping factors) estimation method to improve the performance of KT method under high noise. In our proposed method, we find the signal zero groups by calculating zeros with different data record lengths according to the combination of forward-prediction and backward-prediction, the mean value of the zeros in the signal zero groups are calculated to estimate the parameters of the signal. The proposed method can estimate parameters correctly and accurately even when high noise exists in the signal. Simulation results are shown to confirm the effectiveness of the proposed method.
In this letter, we show that Fan-Chen-Yeh's blind signature scheme and Chien-Jan-Tseng's partially blind signature scheme are vulnerable to the chosen-plaintext attack. We also show that both schemes can be modified so that the chosen-plaintext attack is impossible. But, still Chien-Jan-Tseng's partially blind signature scheme is vulnerable. It fails to satisfy the partial blindness property.
Chen ZHENG Takaya YAMAZATO Hiraku OKADA Masaaki KATAYAMA Akira OGAWA
A soft-decision decoding scheme of low-density parity-check codes (LDPC) is proposed for hard-detected signals of optical fiber communication (OFC) systems. Based on the error detection, the proposed scheme converts the received hard-decision into soft reliability for the input of the LDPC decoder, and soft-decision decoding is performed. Simulation results under OFC channels are shown and superior performance is obtained by using the proposed decoding scheme of the LDPC codes.
Nobuyoshi KIKUMA Mitoshi FUJIMOTO
This paper reviews the historical development of adaptive antennas in Japan. First of all, we watch basic adaptive algorithms. In 1980s, particularly, the following issues were a matter of considerable concern to us; (a) behavior to the coherent interference like multipath waves or radar clutters, (b) signal degradation in case that the direction of arrival (DOA) of desired signal is different from the DOA specified beforehand in the adaptive antennas with the DOA of the desired signal as a prior knowledge, and (c) performance of adaptive antennas when the desired signal and interference are broadband. Although there are a lot of development and modification of adaptive algorithms in Japan, we refer in this paper only to the above-mentioned topics. Secondly, our attention is paid to implementation of adaptive antennas and advanced technologies. A large number of researches on the subjects have been carried out in Japan. Particularly, we focus on the initiative studies in Japan toward mobile communication application. They include researches of mobile radio propagation for adaptive antennas, calibration methods, and adaptive antenna for mobile terminals. As a matter of course, we also refer to adaptive antenna technologies for advanced communication schemes such as CDMA, SDMA, OFDM and so on. Finally, we take notice of some pilot products which were developed to verify the effect of the adaptive antenna in the practical environments. As the initiative ones, a couple of equipments are introduced in this paper.
Hiroshi SAWADA Ryo MUKAI Shoko ARAKI Shoji MAKINO
This paper discusses a nonlinear function for independent component analysis to process complex-valued signals in frequency-domain blind source separation. Conventionally, nonlinear functions based on the Cartesian coordinates are widely used. However, such functions have a convergence problem. In this paper, we propose a more appropriate nonlinear function that is based on the polar coordinates of a complex number. In addition, we show that the difference between the two types of functions arises from the assumed densities of independent components. Our discussion is supported by several experimental results for separating speech signals, which show that the polar type nonlinear functions behave better than the Cartesian type.
Young-Joo SUH Min-Sun KIM Young-Jae KIM
There is a growing demand that mobile networks should provide quality-of-service (QoS) to mobile users since portable devices become popular and more and more applications require real-time services. Providing QoS to mobile hosts is very difficult due to mobility of hosts. The resource ReSerVation Protocol (RSVP) establishes and maintains a reservation state to ensure a given QoS level between the sender and receiver. However, RSVP is designed for fixed networks and thus it is inadequate in wireless mobile networking environments. In this paper, we propose a resource reservation protocol for mobile hosts in mobile networks. The proposed protocol extends the RSVP by introducing RSVP agents in local networks to manage the reservations. The proposed protocol reduces packet delay, bandwidth overhead, and the number of RSVP messages to maintain reservation states. We examined the performance of the proposed protocol by simulation and we got an improved performance over the existing protocols.
Hajime SHIBATA Soji MORI Nobuo FUJII
An automated synthesis for analog computational circuits in transistor-level configuration is presented. A cell-based structure is introduced to place moderate constraints on the MOSFET circuit topology. Even though each cell has a simple structure that consists of one current path with four transistors, common analog building blocks can be implemented using combinations of the cells. A genetic algorithm is applied to search circuit topologies and transistor sizes that satisfy given specifications. Synthesis capabilities are demonstrated through examples of three types of computational circuits; absolute value, squaring, and cubing functions by using computer simulations and real hardware.
Balaji Sundar RAJAN Ganapathy VISWANATH
The asymptotic Elias upper bound of codes designed for Hamming distance is well known. Piret and Ericsson have extended this bound for codes over symmetric PSK signal sets with Euclidean distance and for codes over signal sets that form a group, with general distance function respectively. The tightness of these bounds depend on a choice of a probability distribution, and finding the distribution (optimum distribution) that leads to the tightest bound is difficult in general. In this paper we point out that these bounds are valid for codes over the wider class of distance-uniform signal sets (a signal set is referred to be distance-uniform if the Euclidean distance distribution is same from any point of the signal set). We show that optimum distributions can be found for (i) simplex signal sets, (ii) Hamming spaces and (iii) biorthogonal signal set. The classical Elias bound for arbitrary alphabet size is shown to be obtainable by specializing the extended bound to simplex signal sets with optimum distribution. We also verify Piret's conjecture for codes over 5-PSK signal set.
Haruo KOBAYASHI Hiroshi YAGI Takanori KOMURO Hiroshi SAKAYORI
This paper describes two digital correction algorithms for ADC nonlinearity, targeted for mixed-signal LSI tester applications: an interpolation algorithm and a stochastic algorithm. Numerical simulations show that our algorithms compensate for ADC nonlinearity as well as missing codes and nonmonotonicity characteristics, and improve ADC SNDR and SFDR.