Masaru SATO Yusuke KUMAZAKI Naoya OKAMOTO Toshihiro OHKI Naoko KURAHASHI Masato NISHIMORI Atsushi YAMADA Junji KOTANI Naoki HARA Keiji WATANABE
A high-efficiency uniform/selective heating microwave oven was developed. Because the power amplifier requires high-efficiency characteristics to function as a microwave source, a free-standing Gallium Nitride (GaN) substrate was applied in this study. By applying a harmonic tuning circuit, an output power of 71 W and PAE of 73% were achieved in pulsed operation, and an output power of 63 W and PAE of 69% were achieved in CW operation. Moreover, we fabricated a prototype PA module that consists of an oscillator, a driver amplifier, PA, and other RF circuits. The output power was controlled by pulse width modulation to maintain high efficiency regardless of output power. We evaluated the arrangement of antenna polarizations to isolate each antenna. By suppressing the interference of output from adjacent antennas, it is possible to irradiate the object on the top surface of the antenna, thereby demonstrating heating characteristics with small temperature unevenness. The prototype microwave oven successfully demonstrated uniform/selective heating.
This paper provides a new method to implement substrate integrated defected ground structure (SIDGS)-based bandpass filter (BPF) with adjustable frequency and controllable bandwidth. Compared with previous literature, this method implements a new SIDGS-like resonator capable of tunable frequency in the same plane as the slotted line using a varactor diode, increasing the design flexibility. In addition, the method solves the problem that the tunable BPF constituted by the SIDGS resonator cannot control the bandwidth by introducing a T-shaped non-resonant unit. The theoretical design method and the structural design are shown. Moreover, the configured structure is fabricated and measured to show the validity of the design method in this paper.
Long LIU Gensai TEI Masahiro WATANABE
We have proposed integrated waveguide structure suitable for mid- and near- infrared light propagation using Si and CaF2 heterostructures on Si substrate. Using a fabrication process based on etching, lithography and crystal growth techniques, we have formed a slab-waveguide structure with a current injection mechanism on a SOI substrate, which would be a key component for Si/CaF2 quantum cascade lasers and other optical integrated systems. The propagation of light at a wavelength of 1.55 µm through a Si/CaF2 waveguide structure have been demonstrated for the first time using a structure with a Si/CaF2 multilayered core with 610-nm-thick, waveguide width of 970 nm, which satisfies single-mode condition in the horizontal direction within a tolerance of fabrication accuracy. The waveguide loss for transverse magnetic (TM) mode has been evaluated to be 51.4 cm-1. The cause of the loss was discussed by estimating the edge roughness scattering and free carrier absorption, which suggests further reduction of the loss would be possible.
Weiyu ZHOU Satoshi ONO Koji WADA
This paper proposes a novel multi-layer substrate integrated waveguide (SIW) resonator loaded with asymmetric E-shaped slot-lines and shows a tri-band band-pass filter (BPF) using the proposed structure. In the previous literature, various SIW resonators have been proposed to simultaneously solve the problems of large area and high insertion loss. Although these SIWs have a lower insertion loss than planar-type resonators using a printed circuit board, the size of these structures tends to be larger. A multi-layer SIW resonator loaded with asymmetric E-shaped slot-lines can solve the above problems and realize a tri-band BPF without increasing the size to realize further miniaturization. The theoretical design method and the structural design are shown. Moreover, the configured structure is fabricated and measured for showing the validity of the design method in this paper.
In this paper, millimeter wave (mmWave) filtenna arrays for 5G applications are proposed. Two kinds of 2-element subarrays are designed for horizontal and vertical polarizations. Each subarray consists of three substrate integrated waveguide (SIW) cavities and two sets of stacked patches. Fully-shielded combined eighth-mode SIW (FSD-CEMSIW) cavities are used in the filtenna design. This cavity not only works as the first-stage resonator but also as the power divider for the subarray. As a result, a four-order bandpass filtering response is achieved. Filtenna arrays were fabricated and measured for demonstration. The impedance bandwidths of these subarrays cover 24-30GHz, including the 5G mmWave bands (n257, n258, and n261) with measured average gains of 8.2dBi and more than 22dB out-of-band suppression. The proposed antennas can be good candidates for 5G mmWave communication to reduce the system complexity and potential cost of the mmWave front-ends.
A variety of smart services are being provided on multiple virtual networks embedded into a common inter-cloud substrate network. The substrate network operator deploys critical substrate nodes so that multiple service providers can achieve enhanced services due to the secure sharing of their service data. Even if one of the critical substrate nodes incurs damage, resiliency of the enhanced services can be assured due to reallocation of the workload and periodic backup of the service data to the other normal critical substrate nodes. However, the connectivity of the embedded virtual networks must be maintained so that the enhanced services can be continuously provided to all clients on the virtual networks. This paper considers resilient virtual network embedding (VNE) that ensures the connectivity of the embedded virtual networks after critical substrate node failures have occurred. The resilient VNE problem is formulated using an integer linear programming model and a distance-based method is proposed to solve the large-scale resilient VNE problem efficiently. Simulation results demonstrate that the distance-based method can derive a sub-optimum VNE solution with a small computational effort. The method derived a VNE solution with an approximation ratio of less than 1.2 within ten seconds in all the simulation experiments.
Tatsuya ISHIKAWA Heisuke SAKAI Hideyuki MURATA
We have developed the flexible dual-gate OFET based pressure sensor using a thin polyethylene naphthalate (PEN, 25 µm) film as a substrate. The performance was equivalent to that fabricated on the glass substrate, and it could also be used on the curved surface. Drain current in the flexible pressure sensor was increased according to the pressure load without application of gate voltage. The magnitude of the change in drain current with respect to pressure application was about 2.5 times larger than that for the device on the glass substrate.
Savanna LLOYD Tatsuya TANIGAWA Heisuke SAKAI Hideyuki MURATA
In this work, we have successfully patterned OLED glass substrates with a novel Yb-doped femtosecond laser. Such patterns can simultaneously increase the outcoupling efficiency up to 24.4%, as a result of reducing substrate waveguided light by scattering at the substrate/air interface and reduce the viewing angle dependence of the electroluminescent spectra.
Seiya KAWAMORITA Yosei SHIBATA Takahiro ISHINABE Hideo FUJIKAKE
In this paper, we examined the transfer method of fluororesin as the novel formation method of polymer wall in order to realize the lattice-shaped polymer walls without patterned light irradiation using photomask. We clarified that the transfer method was effective for formation of polymer wall structure on flexible substrate.
Ryo NAKAO Masakazu ARAI Takaaki KAKITSUKA Shinji MATSUO
We demonstrate heteroepitaxial growth of GaAs/Ge buffer layers for fabricating 1.3-µm range metamorphic InGaAs-based multiple quantum well (MQW) lasers in which the Ge buffer layer is grown using a metal-organic Ge precursor, iso-butyl germane, in a conventional metal-organic vapor phase epitaxy reactor. This enables us to grow Ge and GaAs buffer layers in the same reactor seamlessly. Transmission electron microscopy and X-ray diffraction analyses indicate that dislocations are well confined at the Ge/Si interface. Furthermore, thermal-cycle annealing significantly improves crystalline quality at the GaAs/Ge interface, resulting in higher photoluminescence intensity from the MQWs on the buffer layers.
Yuusuke OBONAI Yosei SHIBATA Takahiro ISHINABE Hideo FUJIKAKE
We developed flexible liquid crystal devices using ultra-thin polyimide substrates and bonding polymer spacers, and discussed the effects of polymer spacer structure on the cell thickness uniformity of flexible LCDs. We clarified that the lattice-shaped polymer spacer is effective to stabilize the cell thickness by suppressing the flow of the liquid crystal during bending process.
Shuichi HONDA Takahiro ISHINABE Yosei SHIBATA Hideo FUJIKAKE
We investigated the effects of a bending stress on the change in phase retardation of curved polycarbonate substrates and optical characteristics of flexible liquid crystal displays (LCDs). We clarified that the change in phase retardation was extremely small even for the substrates with a small radius of curvature, because bending stresses occurred in the inner and upper surfaces are canceled each other out. We compensated for the phase retardation of polycarbonate substrates by a positive C-plate and successfully suppressed light leakage in both non-curved and curved states. These results indicate the feasibility of high-quality flexible LCDs using polycarbonate substrates even in curved states.
Enhancing the performance of low-temperature (LT) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) requires high-quality poly-Si films. One of the authors (A.H.) has already demonstrated a continuous-wave (CW) laser lateral crystallization (CLC) method to improve the crystalline quality of thin poly-Si films, using a diode-pumped solid-state CW laser. Another candidate method to increase the on-current and decrease the subthreshold swing (s.s.) is the use of a high-k gate stack. In this paper, we discuss the performance of top-gate CLC LT poly-Si TFTs with sputtering metal/hafnium oxide (HfO2) gate stacks on nonalkaline glass substrates. A mobility of 180 cm2/Vs is obtained for n-ch TFTs, which is considerably higher than those of previously reported n-ch LT poly-Si TFTs with high-k gate stacks; it is, however, lower than the one obtained with a plasma enhanced chemical vapor deposited SiO2 gate stack. For p-ch TFTs, a mobility of 92 cm2/Vs and an s.s. of 98 mV/dec were obtained. This s.s. value is smaller than the ones of the previously reported p-ch LT poly-Si TFTs with high-k gate stacks. The evaluation of a fabricated complementary metal-oxide-semiconductor inverter showed a switching threshold voltage of 0.8 V and a gain of 38 at an input voltage of 2.0 V; moreover, full swing inverter operation was successfully confirmed at the low input voltage of 1.0 V. This shows the feasibility of CLC LT poly-Si TFTs with a sputtered HfO2 gate dielectric on nonalkaline glass substrates.
Yuusuke OBONAI Yosei SHIBATA Takahiro ISHINABE Hideo FUJIKAKE
We developed flexible LC devices using coat-debond polyimide substrates with a low birefringence and etched post spacers, and clarified that flexible LCDs using post spacers with small spacer distance have a high flexibility without degradation of the image quality. This result ensured the feasibility of flexible LCDs using coat-debond method.
Daisuke SASAKI Yosei SHIBATA Takahiro ISHINABE Hideo FUJIKAKE
We have proposed composite films composed of a molecular-aligned polymer and liquid crystal (LC) for substrate-free liquid crystal displays with high-contrast images. We successfully controlled the molecular alignment of the LC and formed molecular-aligned LC droplets in the polymer by controlling the fluidity of the LC/monomer mixture and the curing rate of the monomer.
This paper presents an innovative fabrication process for a planar circuits at millimeter-wave frequency. Screen printing technology provides low cost and high performance coplanar waveguides (CPW) lines in planar devices operated at millimeter-wave frequency up to 110GHz. Printed transmission lines provide low insertion losses of 0.30dB/mm at 110GHz and small return loss like as impedance standard lines. In the paper, Multiline Thru-Reflect-Line (TRL) calibration was also demonstrated by using the impedance standard substrates (ISS) fabricated by screen printing. Regarding calibration capability validation, verification devices were measured and compare the results to the result obtained by the TRL calibration using commercial ISS. The comparison results obtained by calibration of screen printing ISS are almost the same as results measured based on conventional ISS technology.
Kaida DONG Jingyan MO Yuhong HE Zhewang MA Xuexia YANG
A compact millimeter-wave three-pole dual-band bandpass filter (BPF) by using substrate-integrated waveguide (SIW) dual-mode cavities is developed in this paper. The proposed filter consists of three SIW dual-mode cavities, in which the TE201 and TE102 modes are used to form two passbands. The center frequencies of the two passbands can be readily changed by varying the lengths and/or widths of the SIW cavities. Meanwhile three transmission zeros are produced with appropriate design of the input and output of the SIW cavities, which increase significantly the isolation between the two passbands and their roll-off rate of attenuations. The dual-band BPF filter is designed, fabricated and measured. The measured center frequencies of the two passbands are 26.75GHz and 31.55GHz, respectively. The 3dB-passbands are 26.35-27.15GHz (3%) and 31.29-31.81GHz (1.6%), respectively, with maximum insertion loss of 2.64dB and 4.2dB, respectively, and return loss larger than 12dB in both passbands. A good agreement between the simulated and measured filter characteristics is obtained.
Zhitao XU Jun XU Shuai LIU Yaping ZHANG
In this paper, a novel multilayer substrate integrated waveguide (SIW) four-way out-of-phase power divider is proposed. It is realized by 3D mode coupling, on multilayer substrates. The structure consists of vertical Y-junction, lateral T-junction of SIW and lateral Y-junction of half-mode SIW. The advantages of the proposed structure are its low cost and ease of fabrication. Also, it can be integrated easily with other planar circuits such as microstrip circuits. An experimental circuit is designed and fabricated using the traditional printed circuit board technology. The simulated and measured results show that the return loss of the input port is above 15 dB over 8 to 11.8 GHz and transmissions are about -7.6±1.6 dB in the passband. It is expected that the proposed the proposed power divider will play an important role in the future integration of compact multilayer SIW circuits and systems.
In this study, we investigated Si(100), Si(110) and Si(111) surface flattening process utilizing sacrificial oxidation method, and its effect on Metal-Insulator-Semiconductor (MIS) diode characteristics. By the etching of the 100 nm-thick sacrificial oxide formed by thermal oxidation at 1100°C, the surface roughness of Si(100), Si(110) and Si(111) substrates were reduced. The obtained Root-Mean-Square (RMS) roughness of Si(100) was reduced from 0.22 nm (as-cleaned) to 0.07 nm (after etching), while it was reduced from 0.23 nm to 0.12 nm in the case of Si(110), and from 0.23 nm to 0.11 nm in the case of Si(111), respectively. Furthermore, it was found that time-dependent dielectric breakdown (TDDB) characteristics of MIS diodes for p-Si(100), p-Si(110) and p-Si(111) were improved with the reduction of Si surface RMS roughness.
Guangyi LU Yuan WANG Xing ZHANG
Layout strategies including source edge to substrate space (SESS) and inserted substrate-pick stripes of gate-grounded NMOS(ggNMOS) are optimized in this work for on-chip electrostatic discharge (ESD) protection. In order to fully investigate influences of substrate resistors on triggering and conduction behaviors of ggNMOS, various devices are designed and fabricated in a 65-nm CMOS process. Direct current (DC), transmission-line-pulsing (TLP), human body model (HBM) and very-fast TLP (VF-TLP) tests are executed to fully characterize performance of fabricated ggNMOS. Test results reveal that an enlarged SESS parameter results in an earlier triggering behavior of ggNMOS, which presents a layout option for subtle adjustable triggering behaviors. Besides, inserted substrate-pick stripes are proved to have a bell-shape influence on the ESD robustness of ggNMOS and this bell-shape influence is valid in TLP, HBM and VF-TLP tests. Moreover, the most ESD-robust ggNMOS optimized under different inserted substrate-pick stripes always achieves a higher HBM level over the traditional ggNMOS at each concerned total device-width. Physical mechanisms of test results will be deeply discussed in this work.