It is found that the supercontinuum spectrum is generated from cross-phase modulated soliton pulses which are propagated through a dispersion-flattened/decreasing fiber with low birefringence. The cross-phase modulation is achieved by exciting two orthogonally polarized modes in a birefringent fiber and the effect of input azimuth of linearly polarized pulses is discussed theoretically and numerically.

An optical fiber line testing system is essential for reducing maintenance costs and improving service reliability in optical access networks. NTT has already developed such a system called AURORA (AUtomatic optical fibeR opeRAtions support system). As we already use the 1310 and 1550nm wavelengths for communication, we use the 1650nm wavelength for maintenance testing in accordance with ITU-T recommendation L.41. Recently, a long wavelength band (L-band) that extends to 1625nm has begun to be used for WDM transmission. With a view to monitoring optical fiber cables transmitting L-band communication light, an attractive way of separating the U-band wavelength of the test lights from the L-band wavelength of the communication light is to use a chirped fiber Bragg grating (FBG) filter because of its steep optical spectrum. However, it is difficult to measure fiber characteristics with an optical time-domain reflectometer (OTDR), because multi-reflections appear in the OTDR trace when FBG filters are installed at both ends of an optical fiber line. In this paper, we consider this problem and show that the reflection loss at the port of a test access module (TAM) must be more than 36.6dB. We also describe the system design for an extended optical fiber line testing system using an L/U-band optical coupler, which has two chirped FBGs between two 4-port circulators for L-band WDM transmission. In this system, the reflection loss at a TAM port was 38.1dB, and we confirmed that there was no degradation in the OTDR trace caused by multi-reflections at the optical filters.

We designed an FPGA-based parallel machine called "RASH"(Reconfigurable Architecture based on Scalable Hardware) for high speed and flexible signal/data processing. Cryptanalysis is one of the killer applications for FPGA-based machines because huge amounts of logical and/or simple arithmetic operations are required and FPGA is suitable for this. One of the well-known activities in cryptanalysis is the DES (Data Encryption Standard) cracking contest conducted by RSA Data Security. TMTO (Time-Memory Trade-Off) Cryptanalysis is a practical method to dramatically shorten the time for key search when plaintext is given in advance. A string of ASCII characters is used as the key much like a password. The ASCII character is 7-bit character and is changed to 96 kinds of value. The 56-bit DES key is given with a string of 8 ASCII characters. Although the DES key has 64 trillion(=256) possibilities, the key that is given with a string has only 6.4 trillion(=968) possibilities. Therefore, we improve TMTO cryptanalysis so that we search only the limited key by ASCII characters and reduce the quantity of computation. In this paper, we demonstrate how TMTO cryptanalysis for limited key is well suited to our FPGA-based RASH machine. By limiting the key to a string, DES key will be found at 80% probability within 45 minutes after ciphertext is given on 10 units of RASH. The precomputation before starting key search takes 3 weeks on the same RASH configuration.

The generation of high repetition-rate optical pulse train using a passively mode-locked figure-8 fiber ring laser is presented. The laser employs a novel configuration incorporating a superstructure fiber Bragg grating. Pulse train with repetition rates up to 100GHz is possible and transform-limited pulses with pulsewidth below 1ps can be achieved with chirp compensation. The output pulses can further be reduced to 83fs with an external pulse compressor.

The purpose of this paper is to discuss length estimation based on digitized curves. Information on a curve in the Euclidean plane is lost after digitization. Higher resolution supports a convergence of a digital image towards the original curve with respect to Hausdorff metric. No matter how high resolution is assumed, it is impossible to know the length of an original curve exactly. In image analysis we estimate the length of a curve in the Euclidean plane based on an approximation. An approximate polygon converges to the original curve with an increase of resolution. Several approximation methods have been proposed so far. This paper proposes a new approximation method which generates polygonal curves closer (in the sense of Hausdorff metric) in general to its original curves than any of the previously known methods and discusses its relevance for length estimation by proving a Convergence Theorem.

The c-Secure CRT code is a collusion-secure fingerprinting code whose code length is reduced by using the Chinese Remainder Theorem. The tracing algorithm for the c-secure CRT code drops its performance of traitor tracing when random errors are added to the codewords. In this paper, we show two approaches to enhance random-error-resilience to the tracing algorithm of the c-secure CRT code. The first approach is introducing thresholds for the distinction of the detected part of the embedded data called detected blocks. We propose a method to derive appropriate values of the thresholds on an assumption that the tracer can estimate the random error rate. This modification extends the capability of traitor tracing to the attacks in which the alteration rate of the detected blocks is not fixed to 0.5. The second approach is extending the scope of the search for the detected blocks. With numerical results by computer simulations, we confirmed an impressive improvement of random-error-resilience of a c-secure CRT code.

This paper describes the scalability of a full-mesh wavelength division multiplexing star-structure network based on an arrayed-waveguide grating router (AWG-STAR). The scalability of the network is examined experimentally. A power penalty of 0.1dB is obtained with a 32-node network and an estimated scalability of up to 100 nodes is confirmed.

A novel signal processing technique using adaptive neural network algorithm is applied for the on-line detection of harmonic current components generated by nonlinear current loads in the single-phase diode bridge rectifier and it can efficiently determine the harmonic current components in real time. The validity of this active filtering processing system to compensate current harmonics is proved on the basis of simulation results.

Online profiling methodologies are studied for exploiting dynamic optimization. On a dynamic optimizable system with online profilers, it has to get accurate profile in early step of the program execution for effective execution. However, for getting more effective profile by online profiling, it has to satisfy "Rapidness" and "Accuracy". They are conflicted requirements. Therefore, it has to choose trade-off point at implementation. We focused into online Hot Instruction Sequence (HIS) profiler to exploit reconfigurable functional units. To circumstantiate the effectiveness of online HIS profiling, we build some evaluation models for experimental evaluation. Our profiler models are SC/DM, SC/FA and JC/DM. These models have different policy of event counting and table lookup. Our event counting policies are simple-counting or jumble-counting. On the other hand, table lookup policies are direct-map or full-associative. In our experimental evaluation, SC/FA and JC/DM models scored higher accuracy than SC/DM. The JC/DM model is able to implement by lower cost for table lookup, but it scored high accuracy comparable to SC/FA.

A Radio Network (RN, for short) is a distributed system with no central arbiter, consisting of p radio stations each of which is endowed with a radio transceiver. In this work we consider single-hop, single channel RNs, where each station S(i), (1ip), initially stores si items which are tagged with the unique destination they must be routed. Since each item must be transmitted at least once, every routing protocol must take at least n = s1 + s2 + + sp time slots to route each item to its final destination. Similarly, each station S(i), (1ip), must be awake for at least si + di time slots to broadcast si items and to receive di items, where di denotes the number of items destined for S(i). The main contribution of this work is to present a randomized time- and energy-optimal routing protocol on the RN. Let qi, (1ip), be the number of stations that have items destined for S(i), q=q1 +q2 ++ qp, and ri be the number of stations for which S(i) has items. When qi is known to station S(i), our routing protocol runs, with probability exceeding 1 - , (f > 1), in n + O(q + log f) time slots with each station S(i) being awake for at most si + di + O(qi + ri + log f) time slots. Since qidi, risi, and qn always hold, our randomized routing protocol is optimal. We also show that, when the value of di is known to S(i), our routing protocol runs, with probability exceeding 1 - , (f > 1), in O(n + log f) time slots with no station being awake for more than O(si + di + log f) time slots.

This paper proposes an improvement of Elkies' point counting algorithm for the Jacobian of a genus 2 hyperelliptic curve defined over a finite field in a practical sense and introduces experimental results. Our experimental results show that we can generate a cryptographic secure genus 2 hyperelliptic curve, where the order of its Jacobian is a 160-bit prime number in about 8.1 minutes on average, on a 700 MHz PentiumIII level PC. We improve Elkies' algorithm by proposing some complementary techniques for speeding up the baby-step giant-step.

An 8-bit 200 MS/s CMOS 2-stage cascaded folding/interpolating ADC chip was implemented by applying a resistor averaging/interpolating scheme at the preamplifier outputs and the differential circuits for the encoder logic block, with a 0.35-µm double-poly CMOS process. The number of preamplifiers was reduced to half by using an averaging technique with a resistor array at the preamplifier outputs. The delay time of digital encoder block was reduced from 2.2 ns to 1.3 ns by replacing the standard CMOS logic with DCVSPG and CPL differential circuits. The measured SFDR was 42.5 dB at the sampling rate of 200 MS/s for the 10.072 MHz sinusoidal input signal.

We have developed a low-power, high-performance MPEG-4 codec LSI for mobile video applications. This codec LSI is capable of up to CIF 30-fps encoding, making it suitable for various visual applications. The measured power consumption of the codec core was 9 mW for QCIF 15-fps codec operation and 38 mW for CIF 30-fps encoding. To provide an error-robust MPEG-4 codec, we implemented an error-resilience function in the LSI. We describe the techniques that have enabled low power consumption and high performance and discuss our test results.

Existing routing protocols for mobile ad hoc networks assume that all nodes have the same transmission range. In other words, the mobile ad hoc network has symmetric links, which means that two neighboring nodes A and B are within the transmission range of one another. However, since nodes consume battery power independently according to their computing and communication load, there exist asymmetric links, which means that node A is within node B's transmission range, but not vice versa. In this paper, two approaches are presented to support routing in the existence of asymmetric links: GAHA (GPS-based Hop-by-hop Acknowledgment) and GAPA (GPS-based Passive Acknowledgment) schemes. Both GAHA and GAPA can be applied to any routing protocols by utilizing GPS (Global Positioning System) location information. Simulation results reveal that both GAHA and GAPA protocols cope well in the presence of asymmetric wireless links and nodes' mobility.

A plane quadrangulation is a plane graph such that each inner face has exactly four edges on its contour. This is a planar dual of a plane graph such that all inner vertices have degree exactly four. A based plane quadrangulation is a plane quadrangulation with one designated edge on the outer face. In this paper we give a simple algorithm to generate all biconnected based plane quadrangulations with at most f faces. The algorithm uses O(f) space and generates such quadrangulations in O(1) time per quadrangulation without duplications. By modifying the algorithm we can generate all biconnected (non-based) plane quadrangulations with at most f faces in O(f3) time per quadrangulation.

Several lifting implementation techniques for invertible deniterlacing are proposed in this paper. Firstly, the invertible deinterlacing is reviewed, and an efficient implementation is presented. Next, two deinterlacer-embedded lifting architectures of discrete wavelet transforms (DWT) is proposed. Performances are compared among several architectures of deinterlacing with DWT. The performance evaluation includes dual-multiplier and single-multiplier architectures. The number of equivalent gates shows that the deinterlacing-embedded architectures require less resources than the separate implementaion. Our experimental evaluation of the dual-multiplier architecture results in 0.8% increase in the gate count, whereas the separate implementation of deinterlacing and DWT requires 6.1% increase from the normal DWT architecture. For the proposed single-multiplier architecture, the gate count is shown to result in 4.5% increase, while the separate counterpart yields 10.7% increase.

A heterogeneous parallel computing environment consisting of different types of workstations and communication links plays an important role in parallel computing. In many applications on the system, collective communication operations are commonly used as communication primitives. Thus, design of the efficient collective communication operations is the key to achieve high-performance parallel computing. But the heterogeneity of the system complicates the design. In this paper, we consider design of an efficient gather operation, one of the most important collective operations. We show that an optimal gather schedule is found in O(n2k-1) time for the heterogeneous parallel computing environment with n processors of k distinct types, and that a nearly-optimal schedule is found in O(n) time if k=2.

This paper proposes a hybrid on-demand content delivery scheme employing modified pyramid broadcasting. Our scheme delivers a fixed-sized head portion of the video content to each client individually via an individual channel and the remaining portion via multiple broadcasting channels by using a modified form of pyramid broadcasting. The feature of this scheme is that it can be used together with forward error correction using block coding. Therefore, it can deliver high-quality content upon request with high network bandwidth efficiency even if data containers, such as Ethernet frames, are lost in the IP network. This is not possible with conventional schemes. Evaluation results show that its network bandwidth performance is still excellent even though it supports well-known FEC schemes using block coding.

A two-qubit system made of electrons running along coupled pairs of quantum wires is described and numerically analyzed. A brief review of the basic gates is given first, based on preliminary investigations, followed by the description of the electron dynamics. A detailed analysis of a conditional phase shifter is carried out by means of a time-dependent Schrodinger solver applied to a two-particle system. A quantum network suitable for creating entanglement is simulated, and results are shown. The physical structure of the proposed network is within the reach of a solid-state implementation. The physical parameters used in the computations have been chosen with reference to silicon quantum wires embedded in silicon dioxide.

In the last three decades of the 20th Century, research in speech recognition has been intensively carried out worldwide, spurred on by advances in signal processing, algorithms, architectures, and hardware. Recognition systems have been developed for a wide variety of applications, ranging from small vocabulary keyword recognition over dial-up telephone lines, to medium size vocabulary voice interactive command and control systems for business automation, to large vocabulary speech dictation, spontaneous speech understanding, and limited-domain speech translation. Although we have witnessed many new technological promises, we have also encountered a number of practical limitations that hinder a widespread deployment of applications and services. On one hand, fast progress was observed in statistical speech and language modeling. On the other hand only spotty successes have been reported in applying knowledge sources in acoustics, speech and language science to improving speech recognition performance and robustness to adverse conditions. In this paper we review some key advances in several areas of speech recognition. A bottom-up detection framework is also proposed to facilitate worldwide research collaboration for incorporating technology advances in both statistical modeling and knowledge integration into going beyond the current speech recognition limitations and benefiting the society in the 21st century.