A two-qubit system made of electrons running along coupled pairs of quantum wires is described and numerically analyzed. A brief review of the basic gates is given first, based on preliminary investigations, followed by the description of the electron dynamics. A detailed analysis of a conditional phase shifter is carried out by means of a time-dependent Schrodinger solver applied to a two-particle system. A quantum network suitable for creating entanglement is simulated, and results are shown. The physical structure of the proposed network is within the reach of a solid-state implementation. The physical parameters used in the computations have been chosen with reference to silicon quantum wires embedded in silicon dioxide.

The potential drop and the self-heating due to the contact resistance at the interface between silicide and silicon are incorporated in the device simulation for ESD protection devices. A transition region is provided at the interface and the resistivity is calculated by scaling the contact resistance by the length of the region. The power density used in the heat conductive equation is calculated by using the potential drop and the contact resistance in the transition region. The validity of the present approach is checked by the Monte Carlo simulations. Using the technique, influence of the contact resistance on self-heating in an ESD protection device with the grounded gate MOSFET structure is simulated.

In a conventional file system, the directory tree is traversed to find the inode number of a file. The inode lookup performance degrades as the size of the directory tree increases. In this letter, a new directory scheme, called direct hashing directory, is proposed. The inode number of a file is the cyclic redundancy code of the file's absolute path name such that the inode number can be computed directly. The average number of disk accesses for inode lookup is 1.08, which is order of magnitude faster than the conventional directory schemes such as hashing, B tree, and sequential directory.

In certain computer and communication systems, the significant number of byte errors are not hard errors, but a few transient bit errors confined to byte regions. This kind of byte errors are called spotty byte errors, meaning, not all, but only 2 or 3 random bits, are corrupted in a byte. Especially, the codewords of memory systems which use recent high density wide I/O data semiconductor DRAM chips are prone to this kind of spotty byte errors. This is because, the presence of strong electromagnetic waves in the environment or the bombardment of an energetic particle on a DRAM chip is highly likely to upset more than just one bit stored in that chip. Under this situation, codes capable of correcting single spotty byte errors are suitable for application in semiconductor memory systems. This paper defines a spotty byte error as a random t-bit error confined to a b-bit byte and proposes a class of codes called Single t/b-error Correcting (St/bEC) codes which are capable of correcting single spotty byte errors occurring in computer and communication systems. For the case where the chip data output is 16 bits, i.e., b=16, the S3/16EC code proposed in this paper requires only 16 check bits, that is, only one chip is required for check bits at practical information lengths such as 64, 128 and 256 bits. Furthermore, this S3/16EC code is capable of detecting more than 95% of all single 16-bit byte errors at information length 64 bits.

Information services for drivers and passengers in land vehicles have been drastically increasing in recent years. Frequency spectra used in vehicle communications cover an extremely wide band ranging from the LF band to the millimeter-wave band. Today, a variety of properties are required of antennas depending on the types of radio systems; more than ten kinds of antennas are installed in land vehicles. Advances in such land vehicle antennas developed in Japan are reviewed in reference to antennas for broadcasting reception and mobile communication systems. Typical antennas are introduced for each system, and the technology and performance are described.

We propose a minimal model of neuronal burst-firing that can be considered as a modification and extention of the Bonhoeffer-van der Pol (BVP) model. By using linear stability analysis we show that one of the equilibrium points of the fast subsystem is a saddle point which divides the phase plane into two regions. In one region all phase trajectories approach a limit cycle and in the other they approach a stable equilibrium point. The slow subsystem describes a slowly varying inward current. Various types of bursting phenomena are presented by using bifurcation analysis. The simplicity of the model and the variety of firing modes are the biggest advantages of our model with obvious applications in understanding underlying mechanisms of generation of neuronal firings and modeling oscillatory neural networks.

In this paper, a novel approach to speaker recognition is proposed. The approach makes use of adaptive boosting (AdaBoost) and classifiers such as Multilayer Perceptrons (MLP) and C4.5 Decision Trees for closed set, text-dependent speaker recognition. The performance of the systems is assessed using a subset of utterances drawn from the YOHO speaker verification corpus. Experiments show that significant improvement in accuracy can be achieved with the application of adaptive boosting techniques. Results also reveal that an accuracy of 98.8% for speaker identification may be achieved using the adaptively boosted C4.5 system.

In the last three decades of the 20th Century, research in speech recognition has been intensively carried out worldwide, spurred on by advances in signal processing, algorithms, architectures, and hardware. Recognition systems have been developed for a wide variety of applications, ranging from small vocabulary keyword recognition over dial-up telephone lines, to medium size vocabulary voice interactive command and control systems for business automation, to large vocabulary speech dictation, spontaneous speech understanding, and limited-domain speech translation. Although we have witnessed many new technological promises, we have also encountered a number of practical limitations that hinder a widespread deployment of applications and services. On one hand, fast progress was observed in statistical speech and language modeling. On the other hand only spotty successes have been reported in applying knowledge sources in acoustics, speech and language science to improving speech recognition performance and robustness to adverse conditions. In this paper we review some key advances in several areas of speech recognition. A bottom-up detection framework is also proposed to facilitate worldwide research collaboration for incorporating technology advances in both statistical modeling and knowledge integration into going beyond the current speech recognition limitations and benefiting the society in the 21st century.

This paper presents an architecture for content internetworking, which we call CRN (Content Routing Network) architecture. The CRN architecture is different from other content internetworking architectures in many respects: the peering of authentication, authorization and accounting systems, hierarchical and policy-driven request routing, and the web-based system to interconnect distinct CDNs. Both requirements and functional architecture of CRN are presented, followed by the description of its prototypical implementation. CRN is designed to satisfy both content provider's service requirements and service provider's economic/operational requirements. A prototypical implementation has been deployed successfully under one of the biggest live-streaming experiments.

One purpose of Quality-of-Service (QoS) routing is to develop polynomial-time heuristic algorithms to tackle the MCP (multi-constrained-path) problem, which is NP-complete. In this paper, we introduce a new QoS routing heuristic framework, which focuses on how to increase the success ratio for finding a feasible path subject to multiple additive constraints. The key issue of this framework is to transform the single source single destination QoS routing problem to a single source multi-destination problem by expanding the destination vertex to its neighboring vertices. After that, the modified problem can be solved by existing source routing heuristic algorithms. The analysis and simulation results demonstrate that the framework can achieve a higher success ratio of finding a feasible path without increasing the computational complexity by setting the expansion operation properly.

A term rewriting system which effectively preserves recognizability (EPR-TRS) has good mathematical properties. In this paper, a new subclass of TRSs, layered transducing TRSs (LT-TRSs) is defined and its recognizability preserving property is discussed. The class of LT-TRSs contains some EPR-TRSs, e.g., {f(x)f(g(x))} which do not belong to any of the known decidable subclasses of EPR-TRSs. Bottom-up linear tree transducer, which is a well-known computation model in the tree language theory, is a special case of LT-TRS. We present a sufficient condition for an LT-TRS to be an EPR-TRS. Also reachability and joinability are shown to be decidable for LT-TRSs.

In this paper, a voltage-controlled linear variable resistor (VCLVR) using a floating-gate MOSFET (FG-MOSFET) is proposed. First, the grounded VCLVR realization is discussed. The proposed circuit consists of only an ordinary MOSFET and an FG-MOSFET. The advantages of the proposed VCLVR are low-power and wide-input range and also the power consumption of the proposed VCLVR is the same as an ordinary passive resistor. The performance of the proposed circuits are confirmed by HSPICE simulations with a standard 0.6 µm CMOS process parameters. Simulations of the proposed VCLVR demonstrate a resistance value of 40 kΩ to 338 kΩ and an input range of 4.34 V within THD of less than 1.1%. Next, we proposed a new floating node linear variable resistor using the proposed VCLVR. The performance of the circuit is also evaluated through HSPICE.

This paper defines the distributed arrangement selection problem in a line network in a distributed context and describes the design of a strictly-time-optimal algorithm which solves the problem with a limited local memory space. The problem is regarded as a combined distributed sorting and k-selection problem, namely a problem of sorting elements that are not larger than the kth minimum element in predetermined processes. The algorithm also provides a solution to a resource allocation problem in a line network in a strictly-optimal time.

This paper introduces a way to realize high-pass, band-stop and all-pass transfer functions using two-integrator loop structure consisting of loss-less and lossy integrators. The basic circuit configuration is constructed with five Operational Transconductance Amplifiers (OTAs) and two grounded capacitors. It is shown that the circuit can realize their circuit transfer functions by choosing the input terminals, and that the circuit parameters can also be independently set by the transconductance gains with the proportional block. Although the basic circuit configuration has been known, it seems that the feature for realizing the high-pass, the band-stop and the all-pass transfer functions makes the structure more attractive and useful. An example is given together with simulated results by PSPICE.

We propose herein a motion detection artificial vision model which uses analog electronic circuits. The proposed model is comprised of four layers. The first layer is a differentiation circuit of the large CR coefficient, and the second layer is a differentiation circuit of the small CR coefficient. Thus, the speed of the movement object is detected. The third layer is a difference circuit for detecting the movement direction, and the fourth layer is a multiple circuit for detecting pure motion output. When the object moves from left to right the model outputs a positive signal, and when the object moves from right to left the model outputs a negative signal. We first designed a one-dimensional model, which we later enhanced to obtain a two-dimensional model. The model was shown to be capable of detecting a movement object in the image. Using analog electronic circuits, the number of connections decrease and real-time processing becomes feasible. In addition, the proposed model offers excellent fault tolerance. Moreover, the proposed model can be used to detect two or more objects, which is advantageous for detection in an environment in which several objects are moving in multiple directions simultaneously. Thus, the proposed model allows practical, cheap movement sensors to be realized for applications such as the measurement of road traffic volume or counting the number of pedestrians in an area. From a technological viewpoint, the proposed model facilitates clarification of the mechanism of the biomedical vision system, which should enable design and simulation by an analog electric circuit for detecting the movement and speed of objects.

In this paper, we propose a floating resistor circuit with positive and negative resistance operating at the low supply voltages 1.5 V. Only two transistors are connected between supply lines in order to operate under the low power supply voltages. In this circuit, current subtraction is carried out at the gate terminal for which input/output voltage is applied. As a result, the proposed circuit can realize the large range of resistance of positive and negative resistances. Therefore, in an application, the proposed circuit is used in neuro-based limit cycle generator as synaptic weights.

To measure temperature dependent complex permittivity of dielectric materials, a rectangular cavity resonator with a heating system has been developed. In the experiment, microwave power with the frequency of 2.45 GHz is applied to heat the dielectric material. In order to reduce the error of the complex permittivity of dielectric material obtained from the perturbation method, an electromagnetic (EM) field simulator is applied which uses the Transmission Line Modeling (TLM) method. The uniformity of the temperature is also discussed by the use of heat transfer equation which applies the results of TLM simulation. It is found from the results that the accurate temperature dependence of complex permittivity of the material can be obtained by the method presented here.

Due to saturable nature of gain or absorption of Er doped fiber, a dynamic grating is formed by standing wave produced by interference between two laser beams traveling in opposite directions in the fiber. In this letter, we propose a variable optical filter using the dynamic grating in Er doped fiber controlled by synthesis of optical coherence function. Simulations and experimental verifications are also shown.

The capability of a high-temperature superconducting sigma-delta modulator was studied by means of circuit simulation and FFT analysis. Parameters for the circuit simulation were extracted from experimental measurements. The present circuit simulation includes thermal-noise effect. Successive FFT analyses were made to evaluate the dynamic range of the sigma-delta modulator. As a result, the dynamic range was evaluated as 60.1 dB at temperature of 20 K and 56.9 dB at temperature of 77 K.

We have designed a 44 Banyan switch using SFQ logic circuits. The switch is composed of three parts; one is an input buffer, the second is a contention solver which checks packet contention in a distribution network, and the third is a packet distribution network which distributes contention-free packets to their destination address. The packet distribution network is composed of Batcher-Banyan switch with the input buffer. The contention solver decides to send a data packet to the distribution network, using only internal routing tags which are added to packets in the switch. As the circuit is composed of two parts, the contention solver and the packet distribution network, the transfer rate is raised because it doesn't need to wait any more while a data packet passes through the distribution network. Simulation results using JSIM show that the switch circuit can operate at a clock frequency of 40 GHz.