A non-isothermal device simulation, consisting of solving heat flow equation three-dimensionally together with other semiconductor equations two-dimensionally, is reported for various arrangements of a pluralty of transistors mounted on a single chip. These arrangements are intended to simulate the real situation in an IC chip whereas a three-dimensional solution of the heat flow equation is aimed at accurately determining the thermal interdependence among individual transistors. As a result, the drain current versus drain voltage characteristics of a miniaturized transistor is found to exhibit a heat-induced negative resistance region.

We present a novel replication technique for parallel applications where instances of the replicated application are active on different group of processors called replicas. The replication technique is based on the FTAG (Fault Tolerant Attribute Grammar) computation model. FTAG is a functional and attribute based model. The developed replication technique implements "active parallel replication," that is, all replicas are active and compute concurrently a different piece of the application parallel code. In our model replicas cooperate not only to detect and mask failures but also to perform parallel computation. The replication mechanisms are supported by FTAG run time system and are fully application-transparent. Different novel mechanisms for checkpointing and recovery are developed. In our model during rollback recovery only that part of the computation that was detected faulty is discarded. The replication technique takes full advantage of parallel computing to reduce overall computation time.

This paper presents a new multi-clustering network for the purpose of intelligent data classification. In this network, the first layer is a self-organized clustering layer and the second layer is a restricted clustering layer with a neighborhood mechanism. A new clustering algorithm is developed in this system for the efficiently use of parallel processors. This parallel algorithm enables the nodes of this network to be independently processed in order to minimize data communication load among processors. Using the parallel processors, the quite low calculation cost can be realized among the conventional networks. For example, a 4-processor parallel computing system has shown its ability to reduce the time taken for data classification to 26.75% of a single processor system without declining its performance.

A digital neural network approach is presented for the multilayer channel routing problem with the objective of crosstalk minimization in this paper. As VLSI fabrication technology advances, the reduction of crosstalk between interconnection wires on a chip has gained important consideration in VLSI design, because of the closer interwire spacing and the circuit operation at higher frequencies. Our neural network is composed of N M L digital neurons with one-bit output and seven-bit input for the N-net-M-track-2L-layer problem using a set of integer parameters, which is greatly suitable for the implementaion on digital technology. The digital neural network directly seeks a routing solution of satisfying the routing constraint and the crosstalk constraint simultaneously. The heuristic methods are effectively introduced to improve the convergence property. The performance is evaluated through solving 10 benchmark problems including Deutsch difficult example in 2-10 layers. Among the existing neural networks, the digital neural network first achieves the lower bound solution in terms of the number of tracks in any instance. Through extensive simulation runs, it provides the best maximum crosstalks of nets for valid routing solutions of the benchmark problems in multilayer channels.

This paper first proposes a new approach to designing high-quality, low-diameter, small mean-internode-distance (MID), k-subcubic-connected cyclic networks. The approach is a modification of the k-cubic-connected cyclic (k-ccc) network in which there are N=k2k-1 instead of N=k2k nodes in the k-ccc network. The special features of this network are: (1) It fills the gap between the number of nodes in k-ccc and (k+1)-ccc networks, but retains a constant number of link (3) per node in the network, (2) it allows higher quality, smaller diameters and mean internode distances hypercube networks with the same numbers of nodes. A second novel approach consists of a k+-sccc network with the same number of nodes as the k-ccc but with smaller diameters and mean internode distances. A generalized k-ccc network formed by nodes N=k2m is introduced for n-cube and k-ccc (modified or normal) networks that allows minimum network quality to be obtained where m may or may not equal to k. A routing algorithm for 4-sccc is also presented.

In this paper, we present an error concealment method to recover damaged blocks for block-based image coding schemes. Imperfect transmission of image data results in damaged blocks in the reconstructed images. Hence recovering damaged image blocks is needed for reliable image communications. To recover damaged blocks is to estimate damaged blocks from the correctly received or undamaged neighborhood information with a priori knowledge about natural images. The recovery problem considered in our method is to estimate a larger block, which consists of a damaged block and the undamaged neighborhood, from the undamaged neighborhood. To find an accurate estimate, a set of the feature vectors is introduced and an estimate is expressed as a linear combination of the feature vectors. The proposed method recoveres damaged blocks by projecting the undamaged neighborhood information onto the feature vectors. The sequential projections onto the feature vectors algorithm is proposed to find the projection coefficients of the feature vectors to minimize the squared difference of an estimate and the undamaged neighborhood information. We tested our algorithm through computer simulations. The experimental results showed the proposed method ourperforms the frequency domain prediction method in the PSNR values by 4.0-5.0dB. Tthe reconstructed images by the proposed method provide a good subjective quality as well as an objective one.

For the solutions of linear systems of equations with unsymmetric coefficient matrices, we propose an improved version of the quasi-minimal residual (IQMR) method by using the Lanczos process as a major component combining elements of numerical stability and parallel algorithm design. For Lanczos process, stability is obtained by a coupled two-term procedure that generates Lanczos vectors scaled to unit length. The algorithm is derived such that all inner products and matrixvector multiplications of a single iteration step are independent and communication time required for inner product can be overlapped efficiently with computation time. Therefore, the cost of global communication on parallel distributed memory computers can be significantly reduced. The resulting IQMR algorithm maintains the favorable properties of the Lanczos process while not increasing computational costs. The efficiency of this method is demonstrated by numerical experimental results carried out on a massively parallel distributed memory computer, the Parsytec GC/PowerPlus.

Advanced scientific and engineering problems require massively parallel computing. Critical to the designand ultimately the performanceof such computing systems is the interconnection network binding the computing elements, just as is the cardiovascular network to the human body. This paper develops a new interconnection network, "Tori connected mESHes (TESH)," consisting of k-ary n-cube connection of supernodes that comprise meshes of lower level nodes. Its key features are the following: it is hierarchical, thus allowing exploitation of computation locality as well as easy expansion (up to a million processors), and it appears to be well suited for 3-D VLSI implementation, for it requires far fewer number of vertical wires than almost all known multi-computer networks. Presented in the paper are the architecture of the new network, node addressing and message routing, 3-D VLSI/ULSI considerations, and application of the network to massively parallel computing. Specifically, we discuss the mapping on to the network of stack filtering, a hardware oriented technique for order statistic image filtering.

The construction of fault-tolerant processor arrays with interconnections of cube-connected cycles (CCCs) by using an advanced spare-connection scheme for k-out-of-n redundancies called "generalized additional bypass linking" is described. The connection scheme uses bypass links with wired OR connections to spare processing elements (PEs) without external switches, and can reconfigure complete arrays by tolerating faulty portions in these PEs and links. The spare connections are designed as a node-coloring problem of a CCC graph with a minimum distance of 3: the chromatic numbers corresponding to the number of spare PE connections were evaluated theoretically. The proposed scheme can be used for constructing various k-out-of-n configurations capable of quick broadcasting by using spare circuits, and is superior to conventional schemes in terms of extra PE connections and reconfiguration control. In particular, it allows construction of optimal r-fault-tolerant configurations that provide r spare PEs and r extra connections per PE for CCCs with 4x PEs (x: integer) in each cycle.

In this paper we study on the stability of an operating points of a nonlinear resistive circuits including transistors. A set of sufficient conditions for the operating point to be unstable are proposed. These conditions are a generalization of the well-known negative difference resistance (NDR) criteria.

Many network protocols for routing messages have been proposed for mobile computing environments. In this paper, we consider the query processing strategy which operates over these network protocols. To begin with, we introduce five fundamental location update methods based on ideas extracted from the representative network protocols. They are the single broadcast notification (SBN), the double broadcast notification (WBN), the single default notification (SDN), the double default notification (WDN), and the no notification (NN). As a network protocol, each method is strong in performance in some system enrivonment, but weak in others. In practical situations, where various kinds of applications are used for various purposes, however, it is required to use a single method. We therefore propose an adaptive query processing strategy where these five location update methods can be dynamically selected. Moreover, we analyze the performance of this adaptive query processing strategy via the Markov chain. We also use the statistical approach to estimate the traffic of individual hosts. Finally, we show the efficiency of our proposed strategy over a wide area of system environments.

We give an explicit formula for the number of n-variable clique function in terms of the parameters based upon the numbers of intersecting antichains of the lower half of the n-cube. We present the numbers of clique functions with up to seven variables through computer evaluation of the parameters.

In order to improve luminance and luminous efficiency of color ac plasma displays (PDPs), absorption characteristics of ultraviolet rays were investigated for dielectric materials from a viewpoint of protecting layer of ac PDPs. The double protecting layer of MgF2 and MgO is clarified to be excellent property to improve the optical performance of color ac PDPs. The double protecting layer of MgF2 and MgO was applied to the barrier-rib electrode color ac PDPs and resulted in high luminance and luminous efficiency of 1030 cd/m2 and 1.0lm/W, respectively.

Recently, the number of users utilizing mobile communication services has increased greatly in many information and communication fields. In the future, the number of mobile communication system users will increase even faster, until the rate of diffusion ultimately reaches that of telephones. The day that each person has his own portable mobile terminal is not so far off. Moreover, the systems will not only be used as telephones but also as mobile computing for multimedia information. Digitalization technologies of mobile communication systems needed to realize such mobile computing will be introduced in this paper.

Introducing a mathematical model of noise in stereo images, we propose a new criterion for intelligent statistical inference about the scene we are viewing by using the geometric information criterion (geometric AIC). Using synthetic and real-image experiments, we demonstrate that a robot can test whether or not the object is located very far away or the object is a planar surface without using any knowledge about the noise magnitude or any empirically adjustable thresholds.

This paper proposes a novel FEC (forward error correction) scheme for high-speed wireless systems aiming at mobile computing applications. The proposed scheme combines inner nonredundant error correction with outer parallel encoding random FEC for differentially detected QPSK (quadrature phase shift keying) signals. This paper, first, examines error patterns after the differential detection with nonredundant error correction and reveals that particular double symbol errors occur with relatively high probability. To improve the outer FEC performance degradation due to the double symbol errors, the proposed scheme uses I and Q channel serial to parallel conversion in the transmission side and parallel to serial conversion in the receiving side. As a result, it enables to use simple FEC for the outer parallel encoding random FEC without interleaving. Computer simulation results show the proposed scheme employing one bit correction BCH coding obtains a required Eb/No improvement of 1.2 dB at a Pe of 10-5 compared to that with the same memory size interleaving in an AWGN environment. Moreover, in a Rician fading environment where directional beam antennas are assumed to be used to improve the degradation due to severe multipath signals, an overall Eb/No improvement at Pe of 10-5 of 3.0 dB is achieved compared to simple differential detection when the condition of delay spread of 5 nsec, carrier to multipath signal power ratio of 20 dB and Doppler frequency at 20 GHz band of 150 Hz.

This paper presents a clock routing technique called Balanced-Mesh Method (BMM) which incorporates the advantages of two famous conventional-clock-routing techniques. One is the balanced-tree method (BTM) where the clock net is routed as a tree so that the delay times of clock signal are balanced, and the other is the fixed-mesh method (FMM) where the clock net is routed as a fixed mesh driven by a large buffer. In BMM, the clock net is routed as a set of relatively small meshes of interconnects driven by relatively small buffers. Each mesh covers an area called a Mesh-Routing Region (MR) in which its delay and skew can be suppressed within a certain range. These small meshes are connected by a balanced tree with the chip clock source as its root. To implement BMM, we developed an MR-partitioning program that partitions the circuit into MR's according to a set of pre-determined constraints on the number of flip-flops and the area in each MR, and a clock-global-routing program that provides each mesh routing and the tree routing connecting meshes. We applied BMM to the design of an MPEG2-encoder LSI and achieved a skew of 210ps. In addition, the experimental results show BMM yields the lowest power dissipation compared to conventional methods.

Maximal-ratio combining (MRC), which maximizes the carrier to noise ratio (CNR) of the combined signal, generally requires envelope detection and multiplication having linear characteristic over a wide dynamic range to generate a weighting factor for each branch. In this paper, we propose a simplified two-branch diversity combining scheme without linear envelope detection. The proposed scheme, called "level comparison weighted combining (LCWC),"is simplified in a manner that its weighting factor for each branch is generated from hard-decision results of comparing signal envelopes between two branches. Performance of LCWC is evaluated by computer simulation and laboratory experiment, which shows that its diversity gain is almost identical to that of MRC in a Rayleigh fading channel.

A digital neuro chip with proliferating neuron architecture is described. This chip simulates a neural network model called the adaptive segmentation of quantizer neuron architecture (ASQA). It has proliferating neurons, and can automatically form the optimum network structure for recognition according to the input data. To develop inexpensive commercial hardware and implement a proliferating neuron architecture, we adopt a virtual neuron system for hardware implementation. Namely, this chip is implemented with only an arithmetic unit for network computations, and the network information such as network structure, synaptic weights and so on, are stored in external memories. We devise our original architecture which can efficiently memorize the network information, and moreover, construct a structured network using the ASQA model. As a result, we can recognize about 3,000 Kanji characters using a single chip and a recognition speed of 4.6 msec/character is achieved on a PC.

This paper presents a 4-valued content-addressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiple-valued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a high-density 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.