This paper proposes a new lossless data compression method, which utilizes a context sorting algorithm. Every symbol in the data can be predicted by taking its immediately preceding characters, or context, into account. The context sorting algorithm sorts a set of all the previous contexts to find the most similar context to the current one. It then predicts the next symbol by sorting previous symbol-context pairs in an order of context similarity. The codeword for the next symbol represents the rank of the symbol in this sorted sequence. The compression performance is evaluated both analytically and empirically. Although the proposed method operates character by character, with no probability distribution used to make a prediction, it has comparable compression performance to the best known data compression utilities.

There are many instances in which character shape of a class changes smoothly to that of another class. Although there are many ways of the change, the most delicate change is curvature feature. The paper treat this problem systematically in both theoretically and experimentally. Specifically some confusing pairs were constructed which are well known in the field of OCR, such as 2 Z and 4 9. A series of samples generated using each model which change subtly were provided to conduct a psychological experiment. The results exhibit a monotone change of recognition rates from nearly 100% to 0% as the shape changes continuously. To imitate the humans' performance, feature of curvature was extracted based on continuous function representation based on Bezier's spline curve. Specifically two methods were tried from theoretical and engineering points of view and very successful results were obtained.

It is well known that the Hopfield Model (HM) for neural networks to solve the TSP suffers from three major drawbacks: (D1) it can converge to non-optimal local minimum solutions; (D2) it can also converge to non-feasible solutions; (D3) results are very sensitive to the careful tuning of its parameters. A number of methods have been proposed to overcome (D1) well. In contrast, work on (D2) and (D3) has not been sufficient; techniques have not been generalized to larger classes of optimization problems with constraint including the TSP. We first construct Extended HMs (E-HMs) that overcome both (D2) and (D3). The extension of the E-HM lies in the addition of a synapse dynamical system cooperated with the corrent HM unit dynamical system. It is this synapse dynamical system that makes the TSP constraint hold at any final states for whatever choices of the HM parameters and an initial state. We then generalize the E-HM further into a network that can solve a larger class of continuous optimization problems with a constraint equation where both of the objective function and the constraint function are non-negative and continuously differentiable.

We present a new method for the self-tuning control (STC) of nonminimum phase continuous-time systems based on the pole-zero placement. The long division method is used to decompose a polynomial into a stable and unstable polynomials. It is also shown that the effect of unstable zeros on the magnitude of the desired output can be cancelled. Finally, the results of computer simulation are presented to illustrate the effectiveness of the proposed method.

In this paper, we give an algorithm which, given a set F of at most n-k faulty nodes, and two sets S={s1, , sk} and T = {t1,, tk}, 1kn, of non-faulty nodes in n-dimensional hypercubes Hn, finds k fault-tree node disjoint paths sitje, where (j1, , Jk) is a permutation of (1, , k), of length at most n + k in O(kn log k) time. The result of this paper implies that n disjoint paths of length at most 2n for set-to-set node disjoint path problem in Hn can be found in O(n2 log n) time.

A calibrating analog-to digital (A/D) converter employing a T-Model neural network is described. The T-Model neural-based A/D converter architecure is presented with particular emphasis on the elimination of local minimum of the Hopfield neural network. Furthermore, a teacher forcing algorithm is presented and used to synthesize the A/D converter and correct errors of the converter due to offset and device mismatch. An experimental A/D converter using standard 5-µm CMOS discrete IC circuits demonstrates high-performance analog-to-digital conversion and calibrating.

This paper investigates some fundamental properties of alternating one-way (or two-way) pushdown automata (pda's) with sublogarithmic space. We first show that strongly (weakly) sublogarithmic space-bounded two-way alternating pda's are more powerful than one-way alternating pda's with the same space-bound. Then, we show that weakly sublogarithmic space-bounded two-way (one-way) alternating pda's are more powerful than two-way (one-way) nondeterministic pda's and alternating pda's with only universal states using the same space, and we also show that weakly sublogarithmic space-bounded one-way nondeterministic Turing machines are incomparable with one-way alternating Turing machines with only universal states using the same space. Furthermore, we investigate several fundamental closure properties, and show that the class of languages accepted by weakly sublogarithmic space-bounded one-way alternating pda's and the class of languages accepted by sublogarithmic space-bounded two-way deterministic pda's (nondeterministic pda's, alternating pda's with only universal states) are not closed under concatenation, Kleene closure, and length preserving homomorphism. Finally, we briefly investigate a relationship between 'strongly' and 'weakly'.

A model for the floating point adder/subtractor which can perform rounding and addition/subtraction operations in parallel is presented. The major requirements and structure to achieve this goal are described and algebraically verified. Processing flow of the conventional floating point addition/subtraction operation consists of alignment, addition/subtraction, normalization, and rounding stages. In general, the rounding stage requires a high speed adder for increment, increasing the overall execution time and occupying a large amount of chip area. Furthermore, it accompanies additional execution time and hardware logics for renormalization stage which may occur by an overflow from the rounding operation. A floating adder/subtractor performing addition/subtraction and IEEE rounding in parallel is designed by optimizing the operational flow of floating point addition/subtraction operation. The floating point adder/subtractor presented does not require any additional execution time nor any high speed adder for rounding operation. In addition, the renormalization step is not required because the rounding step is performed prior to the normalization operation. Thus, performance improvement and cost-effective design can be achieved by this approach.

In this paper, we give an algorithm which, given a set F of at most (n - 1) - k faulty nodes, and two sets S = {s1,..., sk} and T = {t1,..., tk}, 1 k n - 1, of nonfaulty nodes in n-dimensional star graphs Gn, finds k fault-free node disjoint paths si tji, where (j1,..., jk) is a permutation of (1,..., k), of length at most d(Gn) + 5 in O(kn) optimal time, where d(Gn) = 3(n-1)/2 is the diameter of Gn.

Protective layers in AC plasma display panels (PDP) are usually formed by vacuum vapor deposition or sputtering. It is important to study the protective MgO layer by means of screen-printing for fabricating a large size PDP and reducing its cost. With the objectives of enlarging the panel size and reducing cost, we studied the fabrication of the protective MgO layer by means of screen-printing. In this study, we succeeded in lowering the drive voltage by using a MgO powder prepared by vapor phase oxidation instead of conventional decomposition of the magnesium salt. Further, by adding a MgO liquid binder, we attained a good luminous efficiency twice as high as that attained with a sputtered protective layer and lowered the drive voltage. When this protective layer was combined with He-Xe gas enclosure, the half-life of luminance was 5,000 hours. With Ne-Xe gas, the luminance deteriorated no more than 40% after 5,000 hours. A screen-printed protective MgO layer containing no MgO liquid binder showed a short half-life of 800 hours even with the use of Ne-Xe gas. In this case, the discharge voltage changed greatly and some cells did not discharge. It is concluded that the combination of an ultrafine MgO powder prepared by vapor phase oxidation and a MgO liquid binder can clear the way for making AC PDPs with a long lifetime, high efficiency, and low voltage a practical reality.

With increases in the speed of semiconductor devices and integrated circuits, the importance of internal testing with sufficient temporal resolution has been growing. This paper describes recently established electro-optic testing technologies based on pulse lasers and electro-optic crystal probes. Practicability, limitation and future issues are discussed.

In order to establish the advanced and costeffective wet cleaning technology, it is essential to reveal the mechanism of contamination adhesion and removal on Si surfaces in solutions. To reveal the mechanism of noble metal adhesion onto the Si surface in wet processes, the behavior of Cu2+ deposition onto Si surfaces in solutions was investigated. The experimental results reveal the mechanism of electrochemical metallic contamination of noble metals on Si surfaces. Moreover, it was found that, in HF solutions, Si is not directly etched in a form of SiF62- by such an oxidizing agent as Cu2+ but is first turned to oxide and then etched off. For preventing noble metal deposition on Si surfaces, it is necessary not only to keep the noble metals in the solution (i.e. to dissolve noble metals) but also to prevent oxidation/reduction reaction between Si and the noble metal ion. It is found that this oxidation/reduction reaction can be prevented by increasing the redox potential of solutions, injecting surfactants or chelating agents, and making the Si surface covered with oxide. It has been revealed that Cu deposition can be prevented by setting the redox potential of the solution at over 0.75 V vs. NHE. Cu deposition in DHF solutions can be prevented by setting the redox potential at 0.85 V vs. NHE or more. For removing Cu from the Si surface, the same conditions are found to be necessary. Moreover, it is revealed that metallic impurities included in the oxide can be removed only by etching. It is also revealed that chemicals to prevent metal deposition must be used to remove metals such as Cu which easily get redeposited on the bare Si surface. Finally, a new wet cleaning process employing ozonized ultrapure water, NH4OH/H2O2/H2O, and surfactant-injected DHF to replace the conventional RCA cleaning method is proposed.

A new dynamic channel allocation algorithm which is integrated with transmitting power control is proposed. By introducing a new threshold, referred to as TPC threshold (Transmitting Power Control threshold), which is added some margin to the threshold of channel allocation, the subsequent transmitting power control can be performed effectively. This DCA algorithm can achieve a cellular system with both high traffic capacity and high service quality such as interference frequency performance simultaneously. The computer simulation shows that this DCA algorithm improves blocking probability performance 4 times better than that of DECT system at 14 Erlang, while keeping the same interference frequency and forced termination performances.

This paper reports experimental results of a media synchronization mechanism which was proposed by the authors, focusing on the graceful recovery scheme. The proposed method consists of intra-stream and inter-stream synchronization mechanisms. The inter-stream synchronization control is performed after the intra-stream synchronization control over each media unit (MU) such as a video frame. Then, whether the intra-stream synchronization is still maintained or not is checked. In the experimental system, video and voice stored in a source workstation are transferred to a destination workstation via an FDDI network, and then they are synchronized and outputted at the destination (i.e., lip-synch). At the transmission of each MU, we simulate network delay jitters by generating a pseudo-delay which is exponentially distributed. Using the system, we have confirmed the validity of the mechanism. We also clarify how to set the threshold and parameter values defined in the mechanism by evaluating mean square error and average MU rate or by subjective assessment. Furthermore, we demonstrate that the intra-stream synchronization control for each streams in addition to the inter-stream control is necessary for high quality synchronization.

Distributed shared memory is an attractive option for realizing functionally distributed computing in a wide area distributed environment, because of its simplicity and flexibility in software programming. However, up till now, distributed shared memory has mainly been studied in a local environment. In a widely distributed environment, latency of communication greatly affects system performance. Moreover, bandwidth of networks available in a wide area is dramatically increasing recently. DSM architecture using high performance networks must be different from the case of low speed networks being used. In this paper, distributed shared memory models in a widely distributed environment are discussed and evaluated. First, existing distributed shared memory models are examined: They are shared virtual memory and replicated shared memory. Next, an improved replicated shared memory model, which uses internal machine memory, is proposed. In this model, we assume the existence of a seamless, multi-cast wide area network infrastructure - for example, an ATM network. A prototype of this model using multi-thread programming have been implemented on multi-CPU SPARCstations and an ATM-LAN. These DSM models are compared with SCRAMNetTM, whose mechanism is based on replicated shared memory. Results from this evaluation show the superiority of the replicated shared memory compared to shared virtual memory when the length of the network is large. While replicated shared memory using external memory is influenced by the ratio of local and global accesses, replicated shared memory using internal machine memory is suitable for a wide variety of cases. The replicated shared memory model is considered to be suitable particularly for applications which impose real time operation in a widely distributed environment, since some latency hiding techniques such as context switching or data prefetching are not effective for real time demands.

Throughout the paper, the proper operating of the self-routing principle in 2-D shuffle multistage interconnection networks (MINs) is analysed. (The notation 1-D MIN and 2-D MIN is applied for a MIN which interconnects 1-D and 2-D data, respectively.) Two different methods for self-routing in 2-D shuffle MINs are presented: (1) The application of self-routing in 1-D MINs by a switch-pattern preserving transformation of 1-D shuffle stages into 2-D shuffle stages (and vice versa) and (2) the general concept of self-routing in 2-D shuffle MINs based on self-routing with regard to each coordinate which is the original contribution of the paper. Several examples are provided which make the various problems transparent.

A design of current-mode continuous-time filters for low voltage and high frequency applications using complementary bipolar current mirror pairs is presented. The proposed current-mode filters consist of simple bipolar current mirrors and capacitors and are quite suitable for monolithic integration. Since the filters are based on the integrator type of realization, the proposed method can be used for a wide range of applications. The frequency of the filters can easily be changed by the DC controlling current. A fifth-order Butterworth and a thirdorder leapfrog filter with tunable cutoff frequencies from 20 MHz to 100 MHz are designed as examples and simulated by SPICE using standard bipolar parameters.

Recursive Diagonal Torus (RDT) is a class of interconnection network for massively parallel computers with 216 nodes. In this paper, message transfer algorithms on the RDT are proposed and discussed. First, a simple one-to-one message routing algorithm called the vector routing is introduced and its practical extension called the floating vector routing is proposed. In the floating vector routing both the diameter and average distance are improved compared with the fixed vector routing. Next, broadcasting and hypercube emulation algorithm scheme on the RDT are shown. Finally, deadlock-free message routing algorithms on the RDT are discussed. By a simple modification of the e-cube routing and a small numbers of additional virtual channels, both one-to-one message transfer and broadcast can be achieved without deadlock.

New series expressing the radiation fields from both axial and circumferential slots on a circular conducting cylinder are derived. These new series converge rapidly even for near fields. This letter includes useful figures showing characteristics of near fields calculated numerically using the new series.

In this paper we analyze the reliability of a simple broadcasting scheme for hypercubes (HCCAST) with random faults. We prove that HCCAST (n) (HCCAST for the n-dimensional hypercube) can tolerate Θ(2n/n) random faulty nodes with a very high probability although it can tolerate only n - 1 faulty nodes in the worst case. By showing that most of the f-fault configurations of the n dimensional hypercube cannot make HCCAST (n) fail unless f is too large, we illustrate that hypercubes are inherently strong enough for tolerating random faults. For a realistic n, the reliability of HCCAST (n) is much better than that of the broadcasting algorithm described in [6] although the latter can asymptotically tolerate faulty links of a constant fraction of all the links. Finally, we compare the fault-tolerant performance of the two broadcasting schemes for n = 15, 16, 17, 18, 19, 20, and we find that for those practical valuse, HCCAST (n) is very reliable.