Electromagnetic plane wave scattering by a loaded trough on a ground plane has been analyzed by Kobayashi and Nomura's method. The field in each region is expressed first in terms of appropriate eigen functions, whose excitation coefficients are determined by the continuity condition across the aperture of the trough. Simple far field expression which is suitable for numerical calculation for small aperture cases has been derived. Scattering far field patterns and radar cross section are calculated and compared with those obtained by other methods. Good agreements have been observed for all incident angles.

OFDM (Orthogonal Frequency Division Multiplexing) is a useful digital modulation method for terrestrial digital broadcasting systems, both for digital TV broadcasting and digital audio broadcasting. OFDM is a kind of multicarrier modulation and shows excellent performance especially in multipath environments and in mobile reception. Other advantages are its resistance to interference signals and its suitability for digital signal processing. When each carrier of the OFDM signal is modulated with DQPSK, we call it DQPSK-OFDM. DQPSK-OFDM is a basic OFDM system, which is especially suitable for mobile reception. This paper describes how a DQPSK-OFDM system works and shows several experimental and simulation results. The experimental results mainly concern the performance of the DQPSK-OFDM system relative to various disturbances such as multipath (ghost) signals, nonlinearity of the channel, and interference from analog signals. The transmission characteristics of DQPSK-OFDM are investigated and the basic criteria for the system design of DQPSK-OFDM are discussed.

Technology mapping algorithms for LUT (Look Up Table) based FPGAs have been proposed to transfer a Boolean network into logic-blocks. However, since those algorithms take no layout information into account, they do not always lead to excellent results. In this paper, a simultaneous technology mapping, placement and global routing algorithm for FPGAs, Maple, is presented. Maple is an extended version of a simultaneous placement and global routing algorithm for FPGAs, which is based on recursive partition of layout regions and block sets. Maple inherits its basic process and executes the technology mapping simultaneously in each recursive process. Therefore, the mapping can be done with the placement and global routing information. Experimental results for some benchmark circuits demonstrate its efficiency and effectiveness.

A systematic method for locating and computing branches of connecting orbits developed by the authors is outlined. The method is applied to the sine–Gordon and Hodgkin–Huxley equations.

This paper proposes a new class of unidirectional byte error locating codes, called single symmetric bit error correcting and single unidirectional byte error locating codes, or SEC–SUbEL codes. Here, "byte" denotes a cluster of b bits, where b2. First, the necessary and sufficient conditions of the codes are clarified, and then code construction method is demonstrated. The lower bound on check bit length of the SEC–SUbEL codes is derived. Based on this, the proposed codes are shown to be very efficient in some range of the information length. The code design concept presented for the SEC–SUbEL codes induces the generalized unidirectional byte error locating codes with single symmetric bit error correction capability.

The propagation characteristics of dielectric waveguides with slanted grating structure are analyzed by using the combination of the improved Fourier series expansion method and the approximated multilayer method. The slanted grating region is appoximated by a structure with stratified thin modulated index layers. This method is effective to the guiding problems of the planar slanted grating, because the electromagnetic fields in each layer can be expressed by shifting the phase of the solution in the first layer. In this paper, numerical results are given for the grating with the rectangular and the sinusoidal profile for arbitrary slant angle. The radiation efficiencies for the grating with negative and positive slant angle are also discussed.

By addressing design requirements for multicast ATM switching, this paper attempts to provide an integrated view of modular and expandable switch architectures suitable for both unicast and multicast switching for future B-ISDNs. Several large and modular multicast ATM switching architectures are discussed, each of which handles different traffic situations. These architectures consist of multiple shared-buffer copy network modules of adequate size suitable for fabrication on a single chip, and small output memory switch modules. A new modular link-grouped multistage interconnection network is proposed for interconnecting copy network modules and memory switch modules, so that future large multicast ATM switching networks can be built in a modular fashion. The described modular architectures can significantly facilitate signal synchronization in large-scale switching networks.

This paper presents a cost-effective network for very large ATM cross-connects. In order to develop it, we propose the delta network with expanded middle stages. This proposed network is the intermediate network between a nonblocking network and the delta network with respect to the cost of hardware and internal blocking probability. Using this network, we explore the tradeoff between the cost and internal blocking probability, and derive the optimum configuration under temporarily deviating traffic. Internal blocking occurs when input traffic temporarily deviates from its average value. However, we cannot evaluate the internal blocking probability by using conventional traffic models. In this paper, we adopt temporarily deviating traffic such that all traffic is described as the superposition of the paths which are defined by traffic parameters. As can easily be seen, the path corresponds to virtual path (VP) or virtual channel (VC). Therefore, we believe that our model describes actual traffic more exactly than conventional models do. We show that the optimum configuration is the proposed network whose expansion ratio γ=3 when the maximum number of paths that can be accommodated in one link is greater than 22. This network achieves the internal blocking probability of 10-10. As an example of this network, we show that the proposed network of size 7272 is constructed with only 40% of the hardware required by the nonblocking network.

The Paper describes a comprehensive system for image recognition based on the technique of boundary spline matching. It can be used to accurately compare two objects and determine whether they are identical or not. The result is extremely satisfactory for comparing planar objects as revealed from the illustrative example presented in this paper. In real practice, images of the same scene object can easily be considered as belonging to different objects if the objects are viewed from different orientations and ranges. Thus, image recognition calls for choosing the proper geometric transformation functions to match images as the initial step so that recognition by template matching can be done as the second step. However, there are a large variety of transformation functions available and the subsequent evaluation of transformation parameters is a highly nonlinear optimisation procedure which is both time consuming and not solution guaranteed, making real-time estimation impossible. This paper describes a new method that represents the boundary of each of two image objects by B-splines and matches the B-splines of two image objects to determine whether they belong to the same scene object. The algorithm developed in this paper concentrates on solving linear simultaneous equations only when handling the geometric transformation functions, which takes almost negligible computational time by using the standard Gaussian Elimination. Representation of the image boundary by B-splines provides a flexible and continuous matching environment so that the level of accuracy can be freely adjusted subject to the requirement of the user. The non-linear optimisation involves only one parameter, i.e. the starting point of each boundary under B-spline simulation, thus guaranteeing a very high speed computational system. The real time operation is deemed possible even there is a wide choice of proper transformation functions.

The problem of electromagnetic scattering by inductive discontinuities located in rectangular waveguides, in particular when dealing with discontinuous conductors of finite thickness, is analyzed using the modified residue-calculus method, and form of the equation suitable for a numerical calculation is derived. The incident wave is taken to be the dominant mode, and reflection and transmission properties of an asymmetric inductive iris are discussed. After the modal representation of the filed, the modal matching is apply to satisfy the boundary conditions at the discontinuity. And using the modified residue-calculus method, simultaneous infinite equations, which are concerned with the scattered mode coefficients, are derived. Then they are approximated at the thick diaphragm. The solutions obtained take on the form of an infinite product, and a numerical solution based on the method of successive approximations is presented as a technique for concretely determining the reflection coefficients. As confirmation, experiments are also carried out in the X-band and close agreement is shown between the calculated and experimental values.

An efficient full–wave spectral domain moment method is developed to compute the current distribution and the radiation associated with microstrip discontinuities. Two techniques are used to increase the efficiency of the method of moments algorithm so that a transmission line of moderate electrical size can be analyzed in reasonable time.

The new algorithm for VP bandwidth control described and analyzed in this paper is a revised version of the Successive Modification Method. Its operation is based only on call-level performance (call blocking probabilities) measured in real time, without explicitly taking the cell-level performance into account. This algorithm does not need to predict future traffic demand and to perform network-wide optimization according to the predicted traffic. These features are well suited for a B-ISDN environment, with the variety of ATM bearer services and the uncertainty of their traffic demand and other characteristics. This paper describes the relationship between the proposed control and other traffic controls in ATM networks, such as CAC and VP shaping/policing. It also offers a solution to the problem of the competition that arises when several VPs in the same transmission path need increased bandwidth. Evaluation of the transient behavior of the VP bandwidth occupied by VCs shows that there is a lower limit in the control cycle and that this limit can be estimated as the longest average holding time of VCs among all services. Numerical results obtained using a call-by-call simulator show that proposed control is effective in preventing the performance degradation caused by a large traffic imbalance in communications networks. Comparison of the proposed control with a dynamical alternate routing for VC reveals that the VP bandwidth control is effective in relieving only the areas showing serious performance degradation, but that it is not so effective in improving the overall network performance.

With the arrival of B-ISDN, widespread usage of multicast services such as TV broadcasting and video 900 services will increase the possibility of network congestion unless efficient multiple destination routing (MDR) algorithms are used. Current MDR algorithms using link cost based on bandwidth usage or distance to compute the minimum cost routing tree do not take into account the vast amount of information collected by intelligent network (IN) databases. In this paper, we propose a multicast routing algorithm which modifies the way the cost is calculated by using the predicted traffic statistics collected by IN databases. We also show that the traffic handling characteristics vastly improved over conventional MDR algorithms.

ACk is the class of problems solvable by an alternating Turing machine in space O(log n) and alternation depth O(logk n) [S. A. Cook, A taxonomy of problems with fast parallel algorithms, Inform. Contr. vol. 64]. We consider a game played by two persons: each player alternately moves a marker along an edge of a given digraph, and the first palyer who cannot move loses the game. It is shown that the problem to determine whether the first player can win the game on a digraph with n nodes exactly after logk n moves is complete for ACk nuder NC1 reducibility.

The paper discusses properties of YBaCuO thick films produced by screen printing method and followed sintering of a paste made from pre-annealed powder on Yttrium Stabilized Zirconia (YSZ) and MgO substrates. The prepared films have been studied by X-ray diffraction, scanning electron microscopy (SEM) and resistance vs. temperature measurements.

This papter proposes a new type of unidirectional error control codes which indicates the location of unidirectional errors clustered in b-bit length, i.e., unidirectional byte error in b (b2) bits. Single unidirectional b-bit byte error locating codes, called SUbEL codes, are first clarified using necessary and sufficient conditions, and then code construction algorithm is demonstrated. The lower bound on check bit length of the SUbEL codes is derived. Based on this, the proposed codes are shown to be very efficient. Using the code design concept presented for the SUbEL codes, it is demonstrated that generalized unidirectional byte error locating codes are easily constructed.

Recently, a lot of research works have been carried out regarding intelligent communication. If the final information sink is assumed as a human being, a communication channel can be used more effectively when encoders/decoders work "intelligently" or take into account of the semantics of information to be sent. We have been studying error-controlling systems based on different importance of segmental information. The system divides the information input into segments to which individual importance can be assigned. The segments are individually encoded by appropriate error-correcting codes (ECCs) which correspond to their importance among codes with different error-correcting capabilities. For the information that difference of the importance is systematically aligned, conventional UEP (unequal error protection) codes can be applied, but we treat the case that alignment of the importance of the information source is not systematically aligned. Since the system uses multiple ECCs with different (n,k,d) parameters, information regarding what length of the next codeword is required for decoding. We propose error controlling schemes using mulriple ECCs; the first scheme and the second scheme use the obvious codelength identifying information. In the second scheme, information bits are sorted so that segments with the same importance can be encoded by an ECC with the same error-correcting capability. The third scheme is a main proposal in this paper and uses Variable Capability Coding scheme (VCC) which uses some ECCs having different error-correcting capabilities and codelengths. A sequence encoded by the VCC is separable into appropriate segments without obvious codelength identifying information when the channel error probability is low. Subsequently, we evaluate these schemes by coderate when (1) error correcting capability (2) codelength identifying capability are the same. One of the feature of VCC is the capability of resuming from propagative errors because errors beyond the codelength identifying capability occur and the proper beginning of the codeword is lost in the decoder. We also evaluate this capability as (3) resynchronizing capability.

Circuit techniques for realizing fast cycle time of DRAM are described. 1) A high-speed and high-efficiency word-line level Vpp supply can be obtained by a unique static CMOS double-boosted level generator (SCDB) which controls the Vpp charge supply gate. 2) A new write-control scheme eliminates the timing overhead of a read access time after write cycle in a fast page mode operation. 3) A floor plan that minimizes the load of signal paths by employing the lead-on-chip (LOC) assembly technique. These techniques are implemented in an address-multiplexed 16 Mbit CMOS DRAM using a 0.5-µm CMOS technology. A 31-ns RAS cycle time and a 19-ns fast page mode cycle time at Vcc3.3 V, and also even at Vcc1.8 V, a 53-ns RAS cycle time and a 32-ns fast page mode cycle time were achieved. This DRAM is applicable to battery-operated computing tools.

Fabrication of all-epitaxial high-Tc SIS tunnel junctions requires an atomically flat superconducting thin film to be grown and a proper insulating material to be selected. First, we study the initial growth mode of YBCO thin films and show that reducing the growth rate results in a very smooth surface. Second, perovskite-related compound oxides, PrGaO3 and NdGaO3, which have a small lattice mismatch with YBCO and good wetability, are shown to be promising insulating materials for all-epitaxial SIS tunnel junctions. We believe that these concepts will be useful in the development of all-epitaxial high-Tc SIS tunnel junctions with good electrical properties.

In this paper we propose a new algorithm for recognizing 3-D objects from 2-D images. The algorithm takes the multiple view approach in which each 3-D object is modeled by a collection of 2-D projections from various viewing angles where each 2-D projection is called an object model. To select the candidates for the object model that has the best match with the input image, the proposed algorithm computes the surface matching score between the input image and each object model by using Hopfield nets. In addition, the algorithm gives the final matching error between the input image and each candidate model by the error of the pose-transform matrix proposed by Hong et al. and selects an object model with the smallest matching error as the best matched model. The proposed algorithm can be viewed as a combination of the algorithm of Lin et al. and the algorithm of Hong et al. However, the proposed algorithm is not a simple combination of these algorithms. While the algorithm of Lin et al. computes the surface matching score and the vertex matching score berween the input image and each object model to select the candidates for the best matched model, the proposed algorithm computes only the surface matching score. In addition, to enhance the accuracy of the surface matching score, the proposed algorithm uses two Hopfield nets. The first Hopfield net, which is the same as that used in the algorithm of Lin et al., performs a coarse matching between surfaces of an input image and surfaces of an object model. The second Hopfield net, which is the one newly proposed in this paper, establishes the surface correspondences using the compatibility measures between adjacent surface-pairs of the input image and the object model. the results of the experiments showed that the surface matching score obtained by the Hopfield net proposed in this paper is much more useful for the selectoin of the candidates for the best matched model than both the sruface matching score obtained by the first Hopfield net of Lin et al. and the vertex matching score obtained by the second Hopfield net of Lin et al. and, as the result, the object recognition algorithm of this paper can perform much more reliable object recognition than that obtained by simply combining the algorithm of Lin et al. and the algorithm of Hong et al.