In modern cryptographic systems, physical unclonable functions (PUFs) are efficient mechanisms for many security applications, which extract intrinsic random physical variations to generate secret keys. The classical PUFs mainly exhibit static challenge-response behaviors and generate static keys, while many practical cryptographic systems need reconfigurable PUFs which allow dynamic keys derived from the same circuit. In this paper, the concept of reconfigurable multi-port PUFs (RM-PUFs) is proposed. RM-PUFs not only allow updating the keys without physically replacement, but also generate multiple keys from different ports in one clock cycle. A practical RM-PUFs construction is designed based on asynchronous clock and fabricated in TSMC low-power 65 nm CMOS process. The area of test chip is 1.1 mm2, and the maximum clock frequency is 0.8 GHz at 1.2 V. The average power consumption is 27.6 mW at 27. Finally, test results show that the RM-PUFs generate four reconfigurable 128-bit secret keys, and the keys are secure and reliable over a range of environmental variations such as supply voltage and temperature.

This paper proposes a low-power 100Gb/s four-level pulse amplitude modulation driver (PAM-4 Driver) based on linear distortion compensation structure for thin-film Lithium Niobate (LiNbO3) modulators, which manages to achieve high linearity in the output. The inductive peaking technology and open drain structure enable the overall circuit to achieve a 31-GHz bandwidth. With an area of 0.292 mm2, the proposed PAM-4 driver chip is designed in a 65-nm process to achieve power consumption of 37.7 mW. Post-layout simulation results show that the power efficiency is 0.37 mW/Gb/s, RLM is more than 96%, and the FOM value is 8.84.

This paper proposes a design of high-speed interconnection between optical modules and electrical modules via bonding-wires and coplanar waveguide transmission lines on printed circuit boards for 400 Gbps 4-channel optical communication systems. In order to broaden the interconnection bandwidth, interdigitated capacitors were integrated with GSG pads on chip for the first time. Simulation results indicate the reflection coefficient is below -10 dB from DC to 53 GHz and the insertion loss is below 1 dB from DC to 45 GHz. Both indicators show that the proposed interconnection structure can effectively satisfy the communication bandwidth requirements of 100-Gbps or even higher data-rate PAM4 signals.

This paper investigates suitable indexing techniques to enable efficient content-based audio retrieval in large acoustic databases. To make an index-based retrieval mechanism applicable to audio content, we investigate the design of Locality Sensitive Hashing (LSH) and the partial sequence comparison. We propose a fast and efficient audio retrieval framework of query-by-content and develop an audio retrieval system. Based on this framework, four different audio retrieval schemes, LSH-Dynamic Programming (DP), LSH-Sparse DP (SDP), Exact Euclidian LSH (E2LSH)-DP, E2LSH-SDP, are introduced and evaluated in order to better understand the performance of audio retrieval algorithms. The experimental results indicate that compared with the traditional DP and the other three compititive schemes, E2LSH-SDP exhibits the best tradeoff in terms of the response time, retrieval accuracy and computation cost.

Reed-Solomon (RS) codes are widely used in digital communication and storage systems. Unlike usual VLSI approaches, this paper presents a high throughput fully programmable Reed-Solomon decoder on a multi-core processor. The multi-core processor platform is a 2-Dimension mesh array of Single Instruction Multiple Data (SIMD) cores, and it is well suited for digital communication applications. By fully extracting the parallelizable operations of the RS decoding process, we propose multiple optimization techniques to improve system throughput, including: task level parallelism on different cores, data level parallelism on each SIMD core, minimizing memory access, and route length minimized task mapping techniques. For RS(255, 239, 8), experimental results show that our 12-core implementation achieve a throughput of 4.35 Gbps, which is much better than several other published implementations. From the results, it is predictable that the throughput is linear with the number of cores by our approach.

In this paper, a cost-efficient LDPC decoder for DVB-S2 is presented. Based on the Normalized Min-Sum algorithm and the turbo-decoding message-passing (TDMP) algorithm, a dual line-scan scheduling is proposed to enable hardware reusing. Furthermore, we present the solution to the address conflict issue caused by the characteristic of the parity-check matrix defined by DVB-S2 LDPC codes. Based on SMIC 0.13 µm standard CMOS process, the LDPC decoder has an area of 12.51 mm2. The required operating frequency to meet the throughput requirement of 135 Mbps with maximum iteration number of 30 is 105 MHz. Compared with the latest published DVB-S2 LDPC decoder, the proposed decoder reduces area cost by 34%.

The cyclic autocorrelation of common digital modulation is researched, and the relationship between the cyclic autocorrelation and the delay, corresponding to the symbol rate, is deduced, then a searching algorithm for the symbol rate is proposed. Theoretical analyses and simulation results show that this method has less computation complexity and is also quite accurate. The estimation result is almost immune to the stationary noise. It's of practical value to modulation recognition and blind demodulation.

In this paper, we focus on a centralized spectrum access strategy in a cognitive radio network, in which a single licensed spectrum with one primary user (PU) and several secondary users (SUs) (multiple input streams) are considered. We assume the spectrum can be divided into multiple channels and the packets from variable SUs can arrive at the system simultaneously. Taking into account the priority of the PU, we suppose that one PU packet can occupy the whole licensed spectrum, while one SU packet will occupy only one of the channels split from the licensed spectrum when that channel is not used. Moreover, in order to reduce the blocking ratio of the SUs, a buffer with finite capacity for the SUs is set. Regarding the packet arrivals from different SUs as multiple input streams, we build a two-dimensional Markov chain model based on the phase of the licensed spectrum and the number of SU packets in the buffer. Then we give the transition probability matrix for the Markov chain. Additionally, we analyze the system model in steady state and derive some important performance measures for the SUs, such as the average queue length in the buffer, the throughput and the blocking ratio. With the trade-off between different performance measures, we construct a net benefit function. At last, we provide numerical results to show the change trends of the performance measures with respect to the capacity of the SU buffer under different network conditions, and optimize the capacity of the SU buffer accordingly.

In this paper, we propose the use of a discrete-time connection oriented Internet service system with a release delay for broadband, high-speed, high-capacity and high-reliability Internet requirements. The release delay called close-delay is set before the release process of a connection. An upper limit length T called timer length is set as a system parameter for the close-delay period. We build a batch arrival Geom*/G/1 queue model with a setup/close-delay/close-down strategy to characterize the system operation. By using a discrete-time imbedded Markov chain approach, we derive the stationary distribution of the system, and present the formula for Probability Generation Functions of the queue length, waiting time, busy period and busy cycle. Correspondingly, we describe the performance measures for the packet response time, setup ratio, and utility of connection. We also develop a cost model to determine the optimal timer length and its expected optimal cost. Based on numerical results, we discuss the influence of the timer length for the close-delay period on the system performance and investigate the minimum timer length and the minimum cost for different offered loads and different burst degrees, and show that the choice of the timer length is significant in improving the system performance.

The automatic defect detection for fabric images is an essential mission in textile industry. However, there are some inherent difficulties in the detection of fabric images, such as complexity of the background and the highly uneven scales of defects. Moreover, the trade-off between accuracy and speed should be considered in real applications. To address these problems, we propose a novel model based on YOLOv4 to detect defects in fabric images, called Feature Augmentation YOLO (FA-YOLO). In terms of network structure, FA-YOLO adds an additional detection head to improve the detection ability of small defects and builds a powerful Neck structure to enhance feature fusion. First, to reduce information loss during feature fusion, we perform the residual feature augmentation (RFA) on the features after dimensionality reduction by using 1×1 convolution. Afterward, the attention module (SimAM) is embedded into the locations with rich features to improve the adaptation ability to complex backgrounds. Adaptive spatial feature fusion (ASFF) is also applied to output of the Neck to filter inconsistencies across layers. Finally, the cross-stage partial (CSP) structure is introduced for optimization. Experimental results based on three real industrial datasets, including Tianchi fabric dataset (72.5% mAP), ZJU-Leaper fabric dataset (0.714 of average F1-score) and NEU-DET steel dataset (77.2% mAP), demonstrate the proposed FA-YOLO achieves competitive results compared to other state-of-the-art (SoTA) methods.

In this paper, we present an exact analysis and an efficient matrix-analytic procedure to numerically evaluate the performance of cellular mobile networks with hand-off. In high-capacity micro-cell cellular radio communication networks, a cell boundary crossed by moving users can generate many hand-off attempts. This paper considers such a priority scheme that some channels and buffers are reserved for hand-off calls to reduce the forced termination of calls in progress. Performance characteristics we obtained include blocking probability, channel utilization, average queue length and average waiting time for hand-off calls. Using the matrix-analytic solution for the stationary state probability distribution, we also derive the probability distribution of the waiting time of a hand-off call. Numerical results show how priority can be provided to hand-off calls according to the number of reserved channels and buffer size. They also clarify the effect of the hand-off priority scheme on the standard deviation of waiting time of a hand-off call.

To satisfy huge service demand and multi-traffic requirements with limited bandwidth, this paper proposes two different procedures of multi-channel multiple access schemes with the slotted ALOHA operation for both data and voice traffic and presents an exact analysis to numerically evaluate the performance of the systems. In scheme I, there is no limitation on access between data transmissions and voice transmissions, i.e., all channels can be accessed by all transmissions. In scheme II, a channel reservation policy is applied, where a number of channels are used exclusively for voice packets while the remaining channels are used for both data packets and voice packets. We call the system using scheme I "Non-reservation system" and call the system using scheme II "Reservation system. " Performance characteristics we obtained include loss probability for voice traffic, average packet delay for data traffic and channel utilization for both traffic. The performance of the schemes and the effects of the design parameters are numerically evaluated and compared to a wide-bandwidth conventional single-channel slotted ALOHA system with single data traffic. The analysis presented in this paper will be not only useful for the performance evaluation and the optimum design of multi-channel multi-traffic systems in wireless environments, but also applicable to evaluate other performance measures in priority networks, cellular mobile radio networks or multi-hop wireless networks.

In this paper, we consider the transmission needs of communication networks for two classes of secondary users (SUs), named SU1 and SU2 (lowest priority) in cognitive radio networks (CRNs). In such CRNs, primary users (PUs) have preemptive priority over both SU1's users (SU1s) and SU2's users (SU2s). We propose a preemptive scheme (referred to as the P Scheme) and a non-preemptive scheme (referred to as the Non-P Scheme) when considering the interactions between SU1s and SU2s. Focusing on the transmission interruptions to SU2 packets, we present a probabilistic returning scheme with a returning probability to realize feedback control for SU2 packets. We present a Markov chain model to develop some formulas for SU1 and SU2 packets, and compare the influences of the P Scheme and the Non-P Scheme in the proposed probabilistic returning scheme. Numerical analyses compare the impact of the returning probability on the P Scheme and the Non-P Scheme. Furthermore, we optimize the returning probability and compare the optimal numerical results yielded by the P Scheme and the Non-P Scheme.

Reliable wireless communication often requires accurate knowledge of the underlying multipath channels. Numerous measurement campaigns have shown that physical multipath channels tend to exhibit a sparse structure. Conventional blind channel identification (BCI) strategies such as the least squares, which are known to be optimal under the assumption of rich multipath channels, are ill-suited to exploiting the inherent sparse nature of multipath channels. Recently, l1-norm regularized least-squares-type approaches have been proposed to address this problem with a single parameter governing all coefficients, which is equivalent to maximum a posteriori probability estimation with a Laplacian prior for the channel coefficients. Since Laplace prior is not conjugate to the Gaussian likelihood, no closed form of Bayesian inference is possible. Following a different approach, this paper deals with blind channel identification of a single-input multiple-output (SIMO) system based on sparse Bayesian learning (SBL). The inherent sparse nature of wireless multipath channels is exploited by incorporating a transformative cross relation formulation into a general Bayesian framework, in which the filter coefficients are governed by independent scalar parameters. A fast iterative Bayesian inference method is then applied to the proposed model for obtaining sparse solutions, which completely eliminates the need for computationally costly parameter fine tuning, which is necessary in the l1-norm regularization method. Simulation results are provided to demonstrate the superior effectiveness of the proposed channel estimation algorithm over the conventional least squares (LS) scheme as well as the l1-norm regularization method. It is shown that the proposed algorithm exhibits superior estimation performance compared to both LS and l1-norm regularization methods.

This paper presents an efficient implementation of OFDM inner receiver on a programmable multi-core processor platform with CMMB as an application. The platform consists of an array of programmable SIMD processors interconnected in a 2-D mesh network, which can provide high performance and is quite suitable for wireless communication applications. Implemented on one cluster with 8 cores, the receiver includes symbol timing, carrier frequency offset and sampling frequency offset synchronization, channel estimation and equalization. Multiple optimization techniques are explored to improve system throughput such as: task-level parallelism on many cores, data-level parallelism on SIMD cores, minimization of memory access and route-length-minimization task mapping techniques. Besides, efficient memory strategy and specific instructions for complex computation increase the performance. The simulation results show that the inner receiver could achieve a throughput of up to 120 Mbps when operating at 750 MHz.

Manufacturing defects in the deep sub-micron VLSI process and aging resulted problems of devices during lifecycle are inevitable, and fault-tolerant routing algorithms are important to provide the required communication for NoCs in spite of failures. The proposed algorithm, referred to as scalable and reconfigurable fault-tolerant distributed routing (RFDR), partitions the system into nine regions using the concept of divide-and-conquer. It is a distributed algorithm, and each router guarantees fault-tolerance within one's own region and the system can be still sustained with multiple fault areas. The proposed RFDR has excellent scalability with hardware cost keeping constant independent of system size. Also it is completely reconfigurable when new nodes fail. Simulations under various synthetic traffic patterns show its better performance compared to Extended-XY routing algorithm. Moreover, there is almost no hardware overhead compared to Logic-Based Distributed Routing (LBDR), but the fault-tolerance capacity is enhanced in the proposed algorithm. Hardware cost is reduced 37% compared to Reconfigurable Distributed Scalable Predictable Interconnect Network (R-DSPIN) which only supports single fault region.

Wireless LANs have been used for realizing fully-distributed users in a multimedia environment that has the ability to provide real-time bursty traffic (such as voice or video) and data traffic. In this paper, we present a new realistic and detailed system model and a new effective analysis for the performance of wireless LANs which support multimedia communication with non-persistent carrier sense multiple access with collision avoidance (CSMA/CA) protocol. In this CSMA/CA model, a user with a packet ready to transmit initially sends some pulse signals with random intervals within a collision avoidance period before transmitting the packet to verify a clear channel. The system model consists of a finite number of users to efficiently share a common channel. Each user can be a source of both voice traffic and data traffic. The time axis is slotted, and a frame has a large number of slots and includes two parts: the collision avoidance period and the packet transmission period. A discrete-time Markov process is used to model the system operation. The number of slots in a frame can be arbitrary, dependent on the chosen lengths of the collision avoidance period and packet transmission period. Numerical results are shown in terms of channel utilization and average packet delay for different packet generation rates. They indicate that the network performance can be improved by adequate choice of ratios between the collision avoidance period and transmission period, and the pulse transmission probability.