We measure neutron-induced Single Event Upsets (SEUs) and Multiple Cell Upsets (MCUs) on Flip-Flops (FFs) in a 65-nm bulk CMOS process in order to evaluate dependence of MCUs on cell distance and well-contact density using four different shift registers. Measurement results by accelerated tests show that MCU/SEU is up to 23.4% and it is exponentially decreased by the distance between latches on FFs. MCU rates can be drastically reduced by inserting well-contact arrays between FFs. The number of MCUs is reduced from 110 to 1 by inserting well-contact arrays under power and ground rails.

A 60-GHz CMOS transmitter with on-chip antenna for high-speed short-range wireless interconnections is presented. The radiation gain of the on-chip antenna is doubled using helium-3 ion irradiation technique. The transmitter core is composed of a resistive-feedback RF amplifier, a double-balanced passive mixer, and an injection-locked oscillator. The wideband and power-saving design of the transmitter core guarantees the low-power and high-data-rate characteristic. The transmitter fabricated in a 65-nm CMOS process achieves 5-Gb/s data rate with an EVM performance of $-$12 dB for BPSK modulation at a distance of 1,mm. The whole transmitter consumes 17,mW from a 1.2-V supply and occupies a core area of 0.64,mm$^{2}$ including the on-chip antenna. The gain-enhanced antenna together with the wideband and power-saving design of the transmitter provides a low-power low-cost full on-chip solution for the short-range high-data-rate wireless communication.

A class-E power amplifier (PA) with novel dynamic biasing scheme is proposed to enhance power added efficiency (PAE) over a wide power range. A look-up table (LUT) adjusts input power and drain supply voltage simultaneously to keep switch mode condition of a power transistor and to optimize the PAE. Experimental results show that the class-E PA using the proposed scheme with harmonic suppression filter gives the PAE higher than 80% over 8.5,dB range with less than 40,dBc harmonic suppression.

At Indocrypt 2005, Coglianese and Goi [1] suggested a new public key cryptosystem, MaTRU, which is a variant of NTRU. MaTRU is defined over ring M of k×k matrices whose elements are in the quotient ring R = Z[X]/(Xn-1). In addition, five example parameter sets suitable for this new structure were proposed. In this paper, we prove that it is impossible to generate appropriate key pairs for four parameter sets among the five proposed in [1] according to the key generation procedure described in [1]. The only parameter set where key pair generation is possible is when p, one of the parameters of MaTRU, is 2 and df, another parameter, is odd. Even with this parameter set, however, the decryption operation defined in [1] cannot recover an original plaintext from a given ciphertext because the value of another parameter, q, has been defined too small in [1]. Therefore, we propose an alternative method for key generation and suggest corrected parameter sets. In addition, a refined analysis for the key security of MaTRU is provided, and it is demonstrated that the key security may be significantly lower than that of the original analysis.

In this letter, we propose an energy-efficient in-network processing method for continuous grouped aggregation queries in wireless sensor networks. As in previous work, in our method sensor nodes partially compute aggregates as data flow through them to reduce data transferred. Different from other methods, our method considers group information of partial aggregates when sensor nodes forward them to next-hop nodes in order to maximize data reduction by same-group partial aggregation. Through experimental evaluation, we show that our method outperforms the existing methods in terms of energy efficiency.

Distributed file systems, which manage large amounts of data over multiple commercially available machines, have attracted attention as management and processing systems for Big Data applications. A distributed file system consists of multiple data nodes and provides reliability and availability by holding multiple replicas of data. Due to system failure or maintenance, a data node may be removed from the system, and the data blocks held by the removed data node are lost. If data blocks are missing, the access load of the other data nodes that hold the lost data blocks increases, and as a result, the performance of data processing over the distributed file system decreases. Therefore, replica reconstruction is an important issue to reallocate the missing data blocks to prevent such performance degradation. The Hadoop Distributed File System (HDFS) is a widely used distributed file system. In the HDFS replica reconstruction process, source and destination data nodes for replication are selected randomly. We find that this replica reconstruction scheme is inefficient because data transfer is biased. Therefore, we propose two more effective replica reconstruction schemes that aim to balance the workloads of replication processes. Our proposed replication scheduling strategy assumes that nodes are arranged in a ring, and data blocks are transferred based on this one-directional ring structure to minimize the difference in the amount of transfer data for each node. Based on this strategy, we propose two replica reconstruction schemes: an optimization scheme and a heuristic scheme. We have implemented the proposed schemes in HDFS and evaluate them on an actual HDFS cluster. We also conduct experiments on a large-scale environment by simulation. From the experiments in the actual environment, we confirm that the replica reconstruction throughputs of the proposed schemes show a 45% improvement compared to the HDFS default scheme. We also verify that the heuristic scheme is effective because it shows performance comparable to the optimization scheme. Furthermore, the experimental results on the large-scale simulation environment show that while the optimization scheme is unrealistic because a long time is required to find the optimal solution, the heuristic scheme is very efficient because it can be scalable, and that scheme improved replica reconstruction throughput by up to 25% compared to the default scheme.

Negative feedback technique employing high DC gain operational amplifier (op-amp) is one of the most important techniques in analog circuit design. However, high DC gain op-amp is difficult to realize in scaled technology due to a decrease of intrinsic gain. In this paper, high DC gain op-amp using common-gate topology with high power efficiency is proposed. To achieve high DC gain, large output impedance is required but input transistors' drain conductance decreases output impedance of conventional topology such as folded cascode topology with complementary input. This is because bias current of the output side transistors is not separated from the bias current of the input transistors. On the other hand, proposed circuit can suppress a degradation of output impedance by inserting common-gate topology between input and output side. This architecture separates bias current of the input transistors from that of the output side, and hence the effect of the drain conductance of input transistors is reduced. As the result, proposed circuit can increase DC gain about 10,dB compared with the folded cascode topology with complementary input in 65,nm CMOS process. Moreover, power consumption can be reduced because input NMOS and PMOS share bias current. According to the simulation results, for the same power consumption, in the proposed circuit gain-bandwidth product (GBW) is improved by approximately 30% and noise is also reduced in comparison to the conventional topology.

In this paper, we propose an analog cancellation scheme for multipath self-interference channels in full-duplex wireless orthogonal frequency-division multiplexing (OFDM) systems. The conventional approaches emulate the radio-frequency (RF) self-interference signals by passing the RF transmit signals through delay lines and programmable attenuators. By contrast, our proposed scheme computes the phase-rotated and weighted versions of the baseband transmit signals in the baseband domain, which are simply upconverted to obtain the emulated RF self-interference signals. Numerical results are presented to verify the suppression performance of the proposed scheme.

This paper presents an inductive coupling interface using a relay transmission scheme and a low-skew 3D clock distribution network synchronized with an external reference clock source for 3D chip stacking. A relayed transmission scheme using one coil is proposed to reduce the number of coils in a data link. Coupled resonation is utilized for clock and data recovery (CDR) for the first time in the world, resulting in the elimination of a source-synchronous clock link. As a result, the total number of coils required is reduced to one-fifth of the conventional number required, yielding a significant improvement in data rate, layout area, and energy consumption. A low-skew 3D clock distribution network utilizes vertically coupled LC oscillators and horizontally coupled ring oscillators. The proposed frequency-locking and phase-pulling scheme widens the lock range to $pm$ 10%. Two test chips were designed and fabricated in 0.18 $mu$m CMOS. The bandwidth of the proposed interface using relay transmission ThruChip Interface (TCI) is 2.7 Gb/s/mm$^2$; energy consumption per chip is 0.9 pJ/b/chip. Clock skew is less than 18- and 25- ps under a 1.8- and 0.9- V supply. The distributed RMS jitter is smaller than 1.72 ps.

Monopulse is a classical technique for radar angle estimation and still adopted for fast angle estimation in phased array antenna. The classical formula can be applied to a 2-dimentional phased array antenna if two conditions---the unbiasedness and the independence of the azimuth and the elevation estimate---are satisfied. However, if the sum and difference beams are adapted to suppress the interference under jamming condition, they can be severely distorted. Thus the difference beams become highly correlated and violate the conditions. In this paper, we show the numerical implementation of the generalized monopulse estimation using the distorted and correlated beams, especially for a subarray configured antenna. Because we use the data from the measured subarray patterns rather than the mathematical model, this numerical method can be easily implemented for the complex array configuration and gives good performance for the uncertainty of the real system.

A constant multiplier performs a multiplication of a data-input with a constant value. Constant multipliers are essential components in various types of arithmetic circuits, such as filters in digital signal processor (DSP) units, and they are prevalent in modern VLSI designs. This study presents an efficient algorithm and fast hardware implementation for performing multiply-by-(1+2k) operation with additions. No multiplications are needed. The value of (1+2k)N can be computed by adding N to its k-bit left-shifted value 2kN. The additions can be performed by the full-adder-based (FA-based) ripple carry adder (RCA) for simple architecture. This paper introduces the unit cells for additions (UCAs) to construct the UCA-based RCA which achieves 35% faster than the FA-based RCA in speed performance. Further, in order to improve the speed performance, a simple and modular hybrid adder is presented with the proposed UCA concept, where the carry lookahead adder (CLA) as a module and many of the CLA modules are serially connected in a fashion similar to the RCA. Results show that the hybrid adder significantly improves the speed performance.

Content-Centric Networking (CCN) has an in-network caching mechanism, which can reduce the traffic volume along the route to the destination host. This traffic volume reduction on the transit link can decrease inter-ISP transit cost. However, the memory space for caching in CCN routers is small relative to content volume. In addition, any initial access to the content requested by a user must use the transit link, even when a nearby CCN router outside the route has the cached content. In this paper, we propose a method of cooperative cache sharing among CCN routers in multiple ISPs. It aims to attain a further reduction in the inter-ISP transit cost by improving the cache hit ratio. In the proposed method, the CCN routers share the memory space for caching of non-overlapping cache content. We evaluate the proposed method by simulation experiments using the IP-level network topology of actual ISP, and show that the inter-ISP transit traffic can be reduced by up to 28% compared with normal caching behavior of CCN.

It is important to reduce the power consumption of complementary metal oxide semiconductor (CMOS) logic circuits, especially those used in mobile devices. A CMOS logic circuit consists of metal-oxide-semiconductor field-effect transistors (MOSFETs), which consume electrical power dynamically when they charge and discharge load capacitance that is connected to their output. Load capacitance mainly exists in wiring or buses, and transitions between logic 0 and logic 1 cause these charges and discharges. Many methods have been proposed to reduce these transitions. One novel method (called segmentation coding) has recently been proposed that reduces power consumption of CMOS buses carrying band-limited signals, such as audio data. It improves performance by employing dedicated encoders for the upper and lower bits of transmitted data, in which the transition characteristics of band-limited signals are utilized. However, it uses a conventional majority voting circuit in the encoder for lower bits, and the circuit uses many adders to count the number of 1s to calculate the Hamming distance between the transmitted data. This paper proposes segmentation coding with pseudo-majority voting. The proposed pseudo-majority voting circuit counts the number of 1s with fewer circuit resources than the conventional circuit by further utilizing the transition characteristics of band-limited signals. The effectiveness of the proposed method was demonstrated through computer simulations and experiments.

In this paper, Proxy Mobile IPv6 (PMIPv6), which is a network-based mobility management protocol, is adapted to the OpenFlow architecture. Mobility-related signaling is generally performed by network entities on behalf of a mobile node, but in standard PMIPv6, the control and data packets are delivered and processed over the same network entities, which prevents the separation of the control and the data planes. In addition, IP tunneling inherent to PMIPv6 imposes excessive overhead for the network entities. In order to adapt PMIPv6 to the OpenFlow architecture, the mobility management function is separated from the PMIPv6 components, and components are reconstructed to take advantage of the offerings of the OpenFlow architecture. The components configure the flow table of the switches located in a path, which comprise the OpenFlow controller. Mobility-related signaling can then be performed at the dedicated secure channel, and all of the data packets can be sent normally in accordance with the flow table of the OpenFlow switches. Consequently, the proposed scheme eliminates IP tunneling when user traffic is forwarded and separates the data and the control planes. The performance analysis revealed that the proposed scheme can outperform PMIPv6 in terms of the signaling cost, packet delivery cost, and handover latency.

Accessing a geo-location database is one of the approaches for a secondary user (SU) to obtain the list of available channels for its operation. Channel availability is calculated based on information stored in the geo-location database and information submitted by the SU so that primary users (PU) are protected from harmful interference. The available channel checking process is modeled as a number of intersection tests between the protected contours of PUs and the operation area of the SU regarding to all potential channels. Existing studies indicated that these intersection tests consume time and introduce overhead to the database, especially when the contours or the operation areas are represented by n-polygons and the number of vertices n is a large number. This paper presents a novel method of determining available channels which reduces the number of intersection tests. By submitting SU's preferred channels or the number of channels to be checked to the database, the calculation time and database's load will be reduced significantly. This paper also presents analysis and simulation results of the database workload and the average number of channels obtained per query on different query methods. Suitable query method can be selected based on the number of similar channels in neighbor areas and the maximum number of intersection tests.

This paper presents a new methodology for realizing a Rice channel in BAN Over-The-Air (OTA) testing using a fading emulator with a dynamic phantom. For the proposed apparatus to be effective, the fading emulator must be provided with an appropriate K-factor that represents the actual propagation environment indoors. Further, an implementation of the Rice channel to the proposed fading emulator in a BAN situation is presented. Thereafter, a calibration method for the fading emulator to adjust the actual K-factor of the on-body Rice channel is advanced. This calibration method is validated by analyzing the variations in the instantaneous K-factor attributed to the arm-swinging motion. Finally, an experiment is conducted for a continuous human walking motion with the fading emulator using an arm-swinging dynamic phantom. The results show that the developed fading emulator allows BAN-OTA testing to replicate the actual Rice channel propagation environment with the consideration of the dynamic characteristics of human walking motion.

We analyze the error performance of coding for ordered random variables with side information at the decoder, where encoder input as well as side information are deliberately extracted from the output of correlated sources. A tight upper bound on error probability is derived for linear encoding, and minimum distance decoding for a binary source and Gaussian distributed side information. Some features caused by the signal extraction are discussed.

The field electron emission characteristics of a p-type Si emitter sharpened by a spirally scanned Ga focused-ion-beam milling process were investigated. Saturated Fowler--Nordheim (F--N) plots, which are unique phenomena of p-type semiconductor emitters, were observed. The slight increase of the emission current in the saturated F--N plots region was discussed in terms of the depletion layer width in which electron generation occurs. The temperature dependence of the field electron emission current was also discussed. The activation energy of carrier generation was determined to be 0.26,eV, ascribable to the surface states that accompany the defects introduced by the Ga ion beam. When the emitter was irradiated by a 650-nm-wavelength laser, the increase in the emission current, i.e., the photoexcited emission current, was observed in the saturated region of the F--N plots. The photoexcited emission current was proportional to the laser intensity.

Recommendation systems have been widely used in E-commerce sites, social media and etc. An important recommendation task is to predict items that a user will perform actions on with users' historical data, which is called top-K recommendation. Recently, there is huge amount of emerging items which are divided into a variety of categories and researchers have argued or suggested that top-K recommendation of item category could be very beneficial for users to make better and faster decisions. However, the traditional methods encounter some common but crucial problems in this scenario because additional information, such as time, is ignored. The ranking algorithm on graphs and the increasingly growing amount of online user behaviors shed some light on these problems. We propose a construction method of time-aware graphs to use ranking algorithm for personalized recommendation of item category. Experimental results on real-world datasets demonstrate the advantages of our proposed method over competitive baseline algorithms.