Privacy preserving association rule mining algorithms have been designed for discovering the relations between variables in data while maintaining the data privacy. In this article we revise one of the recently introduced schemes for association rule mining using fake transactions (fs). In particular, our analysis shows that the fs scheme has exhaustive storage and high computation requirements for guaranteeing a reasonable level of privacy. We introduce a realistic definition of privacy that benefits from the average case privacy and motivates the study of a weakness in the structure of fs by fake transactions filtering. In order to overcome this problem, we improve the fs scheme by presenting a hybrid scheme that considers both privacy and resources as two concurrent guidelines. Analytical and empirical results show the efficiency and applicability of our proposed scheme.

A 0.9-V 12-bit 40-MSPS pipeline ADC with I/Q amplifier sharing technique is presented for wireless receivers. To achieve high linearity even at 0.9-V supply, the clock signals to sampling switches are boosted over 0.9 V in conversion stages. The clock-boosting circuit for lifting these clocks is shared between I-ch ADC and Q-ch ADC, reducing the area penalty. Low supply voltage narrows the available output range of the operational amplifier. A pseudo-differential (PD) amplifier with two-gain-stage common-mode feedback (CMFB) is proposed in views of its wide output range and power efficiency. This ADC is fabricated in 90-nm CMOS technology. At 40 MS/s, the measured SNDR is 59.3 dB and the corresponding effective number of bits (ENOB) is 9.6. Until Nyquist frequency, the ENOB is kept over 9.3. The ADC dissipates 17.3 mW/ch, whose performances are suitable for ADCs for mobile wireless systems such as WLAN/WiMAX.

This paper introduces several techniques for achieving RF and analog CMOS circuits for wireless communication systems under ultra-low-voltage supply, such as 0.5 V. Forward body biasing and inverter-based circuit techniques were applied in the design of a feedforward Δ-ΣA/D modulator operating with a 0.5 V supply. Transformer utilization is also presented as an inductor area reduction technique. In addition, application of stochastic resonance to A/D conversion is discussed as a future technology.

Recently some attempts have been made in the literature to give simple proofs of Jury test for real polynomials. This letter presents a similar result for complex polynomials. A simple proof of Jury test for complex polynomials is provided based on the Rouche's Theorem and a single-parameter characterization of Schur stability property for complex polynomials.

Capacitance charging modeling efficiently captures power supply currents in dynamic operations of a CMOS digital circuit and accurately expresses their interaction with on- and off-chip impedance networks. Derivation of such models is generally defined for combinational and sequential logic functions. Simulated substrate and power noises due to sequential logic operation show clear dependency on the size of circuits as well as the internal activity of logic gates. Furthermore, it is experimentally found that the inclusion of impedance networks of a silicon substrate, a package, and an evaluation board, is substantially effective to improve the accuracy of noise analysis. Quantitative correlation among simulation with on-chip noise measurements is demonstrated in a 90-nm 1.2-V CMOS technology.

We propose the multi-domain adaptive learning that enables us to find a point meeting possibly time-varying specifications simultaneously in multiple domains, e.g. space, time, frequency, etc. The novel concept is based on the idea of feasibility splitting -- dealing with feasibility in each individual domain. We show that the adaptive projected subgradient method (Yamada, 2003) realizes the multi-domain adaptive learning by employing (i) a projected gradient operator with respect to a ‘fixed’ proximity function reflecting the time-invariant specifications and (ii) a subgradient projection with respect to ‘time-varying’ objective functions reflecting the time-varying specifications. The resulting algorithm is suitable for real-time implementation, because it requires no more than metric projections onto closed convex sets each of which accommodates the specification in each domain. A convergence analysis and numerical examples are presented.

Multi-user multiple input multiple output (MU-MIMO) systems have attracted much attention as a technology that enhances the total system capacity by generating a virtual MIMO channel between a base station and multiple terminal stations. Extensive evaluations are still needed because there are many more system parameters in MU-MIMO than in single user (SU)-MIMO and the MU-MIMO performance in actual environments is still not well understood. This paper describes the features and effectiveness of a 1616 MU-MIMO testbed in an actual indoor environment. Moreover, we propose a simple adaptive modulation scheme for MU-MIMO-OFDM transmission that employs a bit interleaver in the frequency and space domains. We evaluate the frequency efficiency by obtaining the bit error rate of this testbed in an actual indoor environment. We show that 1644-user MU-MIMO transmission using the proposed modulation scheme achieves the frequency utilization of 870 Mbps and 1 Gbps (respective SNRs: 31 and 36 dB) with a 20-MHz bandwidth.

We propose a new Internet group management protocol (IGMP) which can be used in passive optical network (PON) especially for IPTV services which dramatically reduces the channel change response time caused by traditional IGMP. In this paper, the newly proposed IGMP is introduced in detail and performance analysis is also included. Simulation results demonstrated the performance of the newly proposed IGMP, whereby, viewers can watch the shared IPTV channels without the channel change response time when channel request reaches a threshold.

Fractals are mathematical or natural objects that are made of parts similar to the whole in certain ways. In this paper a software reliability forecasting method of software failure is proposed based on predictability of fractal time series. The empirical failure data (three data sets of Musa's) are used to demonstrate the performance of the reliability prediction. Compared with other methods, our method is effective.

We propose an optical switch control procedure for the Active Optical Access System (AOAS). Optical switches are used in AOAS instead of optical splitters in PON. In the proposed procedure, an OLT determines the switching schedules of optical switches on OSW (Optical Switching Unit) which is installed between OLT and ONU, and informs the OSW of them with a switch control frame preceding of data frame transmission. Then the switch controller on OSW controls the optical switches based on the switching schedules. We developed the prototype systems of OSW, OLT, and ONU. We implemented the optical switch control function with logic circuits on the prototype systems. We demonstrate the proposed procedure works effectively with logic circuits. We also evaluate the 10 Gps optical signal transmission between OLT and ONU. We demonstrate the receiver sensibility on OLT and ONU achieves the distance of 40 km for optical signals transmission with FEC (Forward Error Correction). These receivers are applicable for both AOAS and 10G-EPON.

We analyze the beat noise cancellation in two-dimensional optical code-division multiple-access (2-D OCDMA) systems using an optical hard-limiter (OHL) array. The Gaussian shape of optical pulse is assumed and the impact of pulse propagation is considered. We also take into account the receiver noise and multiple access interference (MAI) in the analysis. The numerical results show that, when OHL array is employed, the system performance is greatly improved compared with the cases without OHL array. Also, parameters needed for practical system design are comprehensively analyzed.

We propose a surface profiling algorithm by white-light interferometry that extends sampling interval to twice of the widest interval among those used in conventional algorithms. The proposed algorithm uses a novel function called an in-phase component of an interferogram to detect the peak of the interferogram, while conventional algorithms used the squared-envelope function or the envelope function. We show that the in-phase component has the same peak as the corresponding interferogram when an optical filter has a symmetric spectral distribution. We further show that the in-phase component can be reconstructed from sampled values of the interferogram using the so-called quadrature sampling technique. Since reconstruction formulas used in the algorithm are very simple, the proposed algorithm requires low computational costs. Simulation results show the effectiveness of the proposed algorithm.

Recent advanced technology makes digital circuits small and the number of digital functional blocks that can be integrated on a single chip is increasing rapidly. On the other hand, reduction in the size of analog circuits has been insufficient. This means that the analog circuit area is relatively large, and reducing analog circuit area can be effective to make a low cost radio receiver. In this paper, a new wireless receiver architecture that occupies small analog area is proposed, and measured results of the core analog blocks are described. To reduce the analog area, a balanced 3-phase analog system is adopted and the functions of analog baseband filters and VGAs are moved to the digital domain. The test chip consists of a 3-phase downconverter and a 3-phase ADC. There is no analog baseband filter on the chip and the analog filter is assumed to be replaced with a digital filter. The downconverter and ADC occupy 0.28 mm2. The measured results show the possibility that the requirements for IMT-2000 are fulfilled even with a small chip area.

The selection of effective features is especially important in achieving highly accurate speech recognition. Although the mel-cepstrum is a popular and effective feature for speech recognition, it is still unclear that the filterbank adopted in the mel-cepstrum always produces the optimal performance regardless of the phonetic environment of any specific speech recognition task. In this paper, we propose a new cepstral domain feature extraction approach utilizing the entropic distance-based filterbank for highly accurate speech recognition. Experimental results showed that the cepstral features employing the proposed filterbank reduce the relative error by 31% for clean as well as noisy speech compared to the mel-cepstral features.

In this paper, Cellular Neural Networks using genetic algorithm (GA-CNNs) are designed for CMOS image noise reduction. Cellular Neural Networks (CNNs) could be an efficient way to apply to the image processing technique, since CNNs have high-speed parallel signal processing characteristics. Adaptive CNNs structure is designed for the reduction of Photon Shot Noise (PSN) changed according to the average number of photons, and the design of templates for adaptive CNNs is based on the genetic algorithm using real numbers. These templates are optimized to suppress PSN in corrupted images. The simulation results show that the adaptive GA-CNNs more efficiently reduce PSN than do the other noise reduction methods and can be used as a high-quality and low-cost noise reduction filter for PSN. The proposed method is designed for real-time implementation. Therefore, it can be used as a noise reduction filter for many commercial applications. The simulation results also show the feasibility to design the CNNs template for a variety of problems based on the statistical image model.

In this paper, we propose a novel noncoherent maximum likelihood detection (NMLD) method for differential spatial multiplexing (SM) multiple-input multiple-output (MIMO) systems. Unlike the conventional maximum likelihood detection (MLD) method which needs the knowledge of channel state information (CSI) at the receiver, NMLD method has no need of CSI at either the transmitter or receiver. After repartitioning the observation block of multiple-symbol differential detection (MSDD) and following a decision feedback process, the decision metric of NMLD is derived by reforming that of MSDD. Since the maximum Doppler frequency and noise power are included in the derived decision metric, estimations of both maximum Doppler frequency and noise power are needed at the receiver for NMLD. A fast calculation algorithm (FCA) is applied to reduce the computational complexity of NMLD. The feasibility of the proposed NMLD is demonstrated by computer simulations in both slow and fast fading environments. Simulation results show that the proposed NMLD has good bit error rate (BER) performance, approaching that of the conventional coherent MLD with the extension of reference symbols interval. It is also proved that the BER performance is not sensitive to the estimation errors in maximum Doppler frequency and noise power.

Recently, the marginalized particle filter (MPF) has been applied to blind symbol detection problems over selective fading channels. The MPF can ease the computational burden of the standard particle filter (PF) while offering better estimates compared with the standard PF. In this paper, we investigate the application of the blind MPF detector to more realistic situations where the systems suffer from analog imperfections which are non-linear signal distortion due to the inaccurate analog circuits in wireless devices. By reformulating the system model using the widely linear representation and employing the auxiliary variable resampling (AVR) technique for estimation of the imperfections, the blind MPF detector is successfully modified to cope with the analog imperfections. The effectiveness of the proposed MPF detector is demonstrated via computer simulations.

This paper describes a flash ADC using interpolation (IP) and cyclic background self-calibrating techniques. The proposed IP technique that is cascade of capacitor IP and gate IP with dynamic double-tail latched comparator reduces non-linearity, power consumption, and occupied area. The cyclic background self-calibrating technique periodically suppresses offset mismatch voltages caused by static fluctuation and dynamic fluctuation due to temperature and supply voltage changes. The ADC has been fabricated in 90-nm 1P10M CMOS technology. Experimental results show that the ADC achieves SNDR of 6.07 bits without calibration and 6.74 bits with calibration up to 500 MHz input signal at sampling rate of 600 MSps. It dissipates 98.5 mW on 1.2-V supply. FoM is 1.54 pJ/conv.

The precise noise modeling of complementary metal oxide semiconductor image sensor (CMOS image sensor: CIS) is a significant key in understanding the noise source mechanisms, optimizing sensor design, designing noise reduction circuit, and enhancing image quality. Therefore, this paper presents an accurate random telegraph signal (RTS) noise analysis model and a novel quantitative evaluation method in motion picture for the visual sensory evaluation of CIS. In this paper, two main works will be introduced. One is that the exposure process of a video camera is simulated, in which a Gaussian noise and an RTS noise in pinned-photodiode CMOS pixels are modeled in time domain and spatial domain; the other is that a new video quality evaluation method for RTS noise is proposed. Simulation results obtained reveal that the proposed noise modeling for CIS can approximate its physical process and the proposed video quality evaluation method for RTS noise performs effectively as compared to other evaluation methods. Based on the experimental results, conclusions on how the spatial distribution of an RTS noise affects the quality of motion picture are carried out.

A new low voltage operation of high voltage switching technique, which is capable of reducing leakage current by an order of three compared to conventional circuits, has been developed for sub-1.8 V low voltage mobile NAND flash memory. In addition, by using the proposed high voltage switch, chip size scaling can be realized due to reduced a minimum required space between the N-wells of selected and unselected blocks for isolation. The proposed scheme is essential to achieve low power operation NAND Flash memory, especially for mobile electronics.