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13621-13640hit(20498hit)

  • A Nonblocking Optical Switching Network for Crosstalk-Free Permutation

    Xiaohong JIANG  Md. Mamun-ur-Rashid KHANDKER  Hong SHEN  Susumu HORIGUCHI  

     
    PAPER-Switching

      Vol:
    E86-B No:12
      Page(s):
    3580-3589

    Vertical stacking is a novel technique for building switching networks, and packing multiple compatible connections together is an effective strategy to reduce network hardware cost. In this paper, we study the crosstalk-free permutation capability of an optical switching network built on the vertical stacking of optical banyan networks to which packing strategy is applied. We first look into the nonblocking condition of this optical switching network. We then study the crosstalk-free permutation in this network by decomposing a permutation evenly into multiple crosstalk-free partial permutations (CFPPs) and realizing each CFPP in a stacked plane of the network such that a crosstalk-free permutation can be performed in a single pass. We present a rigorous proof of CFPP decomposability of a permutation and also a complete algorithm for CFPP decomposition. The possibility of a tradeoff between the number of passes and the number of planes required for realizing a crosstalk-free permutation in this network is also explored in this paper.

  • Removing Unnecessary Buffers and Timers in EDF Scheduler with Regulators in Fixed-Sized Packet Networks

    Kihyun PYUN  Junehwa SONG  Heung-Kyu LEE  

     
    LETTER-Network

      Vol:
    E86-B No:12
      Page(s):
    3646-3650

    Among the many scheduling algorithms which can guarantee delay bounds of sessions, the EDF scheduler with regulators has received wide attention since it can admit a very high number of sessions. However, due to regulators, EDF with regulators has difficulty in scalable implementation. To implement a regulator, a buffer and a timer are needed to restrict the incoming traffics. Given N number of sessions, N regulators are required. Moreover, due to regulators, the entire scheduling algorithm is not work-conserving. To enforce work-conserveness, it is known in the literature that additional buffers and a complex mechanism are required to bypass regulators. Thus, scalable implementation becomes much more difficult in the case of the work-conserving EDF with regulators. In this paper, however, we show that the buffers and timers used to implement regulators are unnecessary to guarantee delay bounds of admitted sessions in fixed-sized packet networks. Then, we can remove those unnecessary buffers and timers. By the removal, the resulting scheduling algorithm can be implemented in a scalable way and becomes work-conserving for free.

  • A New Fast Image Retrieval Using the Condensed Two-Stage Search Method

    JungWon CHO  SeungDo JEONG  GeunSeop LEE  SungHo CHO  ByungUk CHOI  

     
    LETTER-Multimedia Systems

      Vol:
    E86-B No:12
      Page(s):
    3658-3661

    In a content-based image retrieval (CBIR) system, both the retrieval relevance and the response time are very important. This letter presents the condensed two-stage search method as a new fast image retrieval approach by making use of the property of Cauchy-Schwarz inequality. The method successfully reduces the overall processing time for similarity computation, while maintaining the same retrieval relevance as the conventional exhaustive search method. By the extensive computer simulations, we observe that the condensed two-stage search method is more effective as the number of images and dimensions of the feature space increase.

  • Red-Black Interval Trees in Device-Level Analog Placement

    Sarat C. MARUVADA  Karthik KRISHNAMOORTHY  Florin BALASA  Lucian M. IONESCU  

     
    PAPER-Analog Design

      Vol:
    E86-A No:12
      Page(s):
    3127-3135

    The traditional way of approaching device-level placement problems for analog layout is to explore a huge search space of absolute placement representations, where cells are allowed to illegally overlap during their moves. This paper presents a novel exploration technique for analog placement, operating on a subset of tree representations of the layout, where the typical presence of an arbitrary number of symmetry groups of devices is directly taken into account during the search of the solution space. The efficiency of the novel approach is due to the use of red-black interval trees, data structures employed to support operations on dynamic sets of intervals.

  • Modified Backoff Algorithm with Station Number Adaptiveness for IEEE 802.11 Wireless LANs

    Huirae CHO  Sin-Chong PARK  

     
    LETTER-Wireless Communication Technology

      Vol:
    E86-B No:12
      Page(s):
    3626-3629

    The IEEE 802.11 WLAN standards adopt CSMA/CA protocol with a backoff algorithm as medium access control technique. When the number of stations which attempt to access a network increases, the throughput efficiency of the standard goes down. In this paper, we propose a modified backoff algorithm which adaptively selects the Contention Window (CW) size according to the variation of the number of contending stations and present the results of simulation analysis.

  • Adaptability Check during Software Installation in Software Defined Radio

    Yasuo SUZUKI  Hiroshi HARADA  Kazuhiro UEHARA  Teruya FUJII  Yukio YOKOYAMA  Koji ODA  Ryoichi HIDAKA  

     
    PAPER

      Vol:
    E86-B No:12
      Page(s):
    3401-3407

    This paper presents the summarized achievements of "Study Group on Software Technology for Radio Equipment" held at TELEC from April 2000 to March 2003. The Study Group specified the essential issues on Software Defined Radio (SDR), and discussed desirable methods to evaluate conformity to technical regulations in radios that can change RF characteristics only by changing software. The biggest objective in SDR is to build the architecture to allow users to install software exclusively in the combination of hardware and software that have passed the certification test. The Study Group has reached a solution by introducing the idea of "tally." This paper explains the concept of tally, and proposes two types of systems to use tallies in checking adaptability in combinations of hardware and software.

  • Multi-Cycle Path Detection for Sequential Circuits and Its Application to Real Designs

    Hiroyuki HIGUCHI  

     
    PAPER-Logic and High Level Synthesis

      Vol:
    E86-A No:12
      Page(s):
    3176-3183

    This paper proposes a fast multi-cycle path detection method for large sequential circuits. The proposed method is based on ATPG techniques, especially on implication techniques, to use circuit structures and multi-cycle path conditions directly. The method also checks whether or not a multi-cycle path may be invalidated by static hazards at the inputs of flip-flops. Then we explain how to apply the proposed algorithm to real industrial designs. Experimental results show that our method is much faster than conventional ones and that it is efficient enough to handle large industrial designs.

  • A Novel Timing-Driven Global Routing Algorithm Considering Coupling Effects for High Performance Circuit Design

    Jingyu XU  Xianlong HONG  Tong JING  Yici CAI  Jun GU  

     
    PAPER-Place and Routing

      Vol:
    E86-A No:12
      Page(s):
    3158-3167

    As the CMOS technology enters the very deep submicron era, inter-wire coupling capacitance becomes the dominant part of load capacitance. The coupling effects have brought new challenges to routing algorithms on both delay estimation and optimization. In this paper, we propose a timing-driven global routing algorithm with consideration of coupling effects. Our two-phase algorithm based on timing-relax method includes a heuristic Steiner tree algorithm to guarantee the timing performance of the initial solution and an optimization algorithm based on coupling-effect-transference. Experimental results are given to demonstrate the efficiency and accuracy of the algorithm.

  • Dependability Evaluation with Fault Injection Experiments

    Piotr GAWKOWSKI  Janusz SOSNOWSKI  

     
    PAPER-Verification and Dependability Analysis

      Vol:
    E86-D No:12
      Page(s):
    2642-2649

    In the paper we evaluate program susceptibility to hardware faults using fault injector. The performed experiments cover many applications with different features. The effectiveness of software techniques improving system dependability is analyzed. Practical aspects of embedding these techniques in real programs are discussed. They have significant impact on the final fault robustness.

  • Wide-Input Range Variable Resistor Circuit Using an FG-MOSFET

    Muneo KUSHIMA  Koichi TANNO  Okihiko ISHIZUKA  

     
    LETTER-Analog Signal Processing

      Vol:
    E86-A No:12
      Page(s):
    3294-3296

    In this letter, a linear variable resistor circuit using an FG-MOSFET (floating-gate MOSFET) is proposed. This is based on Schlarmann's variable resistor and is very simple. The advantage of the proposed circuit is a wide-input range. The utility of the proposed circuit was confirmed by HSPICE simulation with 1.2 µm CMOS process parameters. The simulation results are reported in this letter.

  • Cached Shortest-Path Tree: An Approach to Reduce the Influence of Intra-Domain Routing Instability

    Shu ZHANG  Katsuyoshi IIDA  Suguru YAMAGUCHI  

     
    PAPER-Network

      Vol:
    E86-B No:12
      Page(s):
    3590-3599

    Because most link-state routing protocols, such as OSPF and IS-IS, calculate routes using the Dijkstra algorithm, which poses scalability problems, implementors often introduce an artificial delay to reduce the number of route calculations. Although this delay directly affects IP packet forwarding, it can be acceptable when the network topology does not change often. However, when the topology of a network changes frequently, this delay can lead to a complete loss of IP reachability for the affected network prefixes during the unstable period. In this paper, we propose the Cached Shortest-path Tree (CST) approach, which speeds up intra-domain routing convergence without extra execution of the Dijkstra algorithm, even if the routing for a network is quite unstable. The basic idea of CST is to cache shortest-path trees (SPTs) of network topologies that appear frequently, and use these SPTs to instantly generate a routing table when the topology after a change matches one in the caches. CST depends on a characteristic that we found from an investigation of routing instability conducted on the WIDE Internet in Japan. That is, under unstable routing conditions, both frequently changing Link State Advertisements (LSAs) and their instances tend to be limited. At the end of this paper, we show CST's effectiveness by a trace-driven simulation.

  • A Dynamically Adaptive Hardware on Dynamically Reconfigurable Processor

    Hideharu AMANO  Akiya JOURAKU  Kenichiro ANJO  

     
    INVITED PAPER

      Vol:
    E86-B No:12
      Page(s):
    3385-3391

    A framework of dynamically adaptive hardware mechanism on multicontext reconfigurable devices is proposed, and as an example, an adaptive switching fabric is implemented on NEC's novel reconfigurable device DRP (Dynamically Reconfigurable Processor). In this switch, contexts for the full crossbar and alternative hadware modules, which provide larger bandwidth but can treat only a limited pattern of packet inputs, are prepared. Using the quick context switching functionality, a context for the full crossbar is replaced by alternative contexts according to the packet inputs pattern. If the context corresponding to requested alternative hadware modules is not inside the chip, it is loaded from outside chip to currently unused context memory, then replaced with the full size crossbar. If the traffic includes a lot of packets for specific destinations, a set of contexts frequently used in the traffic is gathered inside the chip like a working set stored in a cache. 4 4 mesh network connected with the proposed adaptive switches is simulated, and it appears that the latency between nodes is improved three times when the traffic between neighboring four nodes is dominant.

  • A New Flexible Symbol-Timing Synchronization Method for Multi-Mode Software Radio Technology

    Hiroshi HARADA  Hiroki NAKAMURA  Tetsushi IKEGAMI  Masayuki FUJISE  

     
    PAPER

      Vol:
    E86-B No:12
      Page(s):
    3521-3529

    A flexible symbol-timing synchronization met-hod is a one that uses a common sampling clock to find synchronization points for radio communication systems that have different symbol rates. This method estimates synchronization points from state patterns calculated using the symbol rate, sampling clock, and number of observed symbols. Decreasing the number of state patterns is one of best ways to reduce the amount of device resources needed to store the patterns. In this paper, we propose a new pattern generation method in which the number of generated patterns does not increase when the sampling clocks of the communications systems are different. To show the feasibility of this method for symbol-timing synchronization, we analyzed a relationship between the number of samples and the number of state patterns and calculated the BER (bit error rate) in AWGN (additive white Gaussian noise) and one-path flat Rayleigh fading environments by computer simulation.

  • An Algorithm to Use in Adaptive Wideband Duplexer for Software Radio

    Shyama KANNANGARA  Michael FAULKNER  

     
    PAPER

      Vol:
    E86-B No:12
      Page(s):
    3452-3455

    This paper proposes a new algorithm to control an adaptive duplexer for multiband software radio. It uses a wideband low isolation device combined with a two-tap/two-loop adjustable canceller to eliminate the need for multiple switched high isolation duplexers. The taps are adjusted to provide isolation peaks in the transmit and receive bands. The algorithm is based on the superposition of squared errors and achieved 66 dB isolation of the transmit signal and a 37 dB cancellation of the transmitter noise in the receiver band.

  • Technical Regulation Conformity Evaluation System for Software Defined Radio

    Yasuo SUZUKI  Koji ODA  Ryoichi HIDAKA  Hiroshi HARADA  Tatsuaki HAMAI  Tokihiko YOKOI  

     
    PAPER

      Vol:
    E86-B No:12
      Page(s):
    3392-3400

    Interest in the regulatory issues for Software Defined Radio (SDR) is spreading worldwide since the Federal Communications Commission (FCC) recently recognized SDR and created a new category for SDR authorization. SDR technology will bring enormous benefits to the field of wireless services. However, in order to ensure such benefits, revisions of the radio law and/or related ordinances are required regardless of standardization of the software downloading and other implementation details. In order to define the issues peculiar to SDR and to investigate how conformity evaluation should be conducted for radio equipments whose RF characteristics can be altered by software changes in the field, "Study Group on Software Technology for Radio Equipment" was organized by the Telecom Engineering Center (TELEC) in 2000. This paper summarizes a report of the Study Group that was published in March 2003 including the proposal for "Technical regulation conformity evaluation system," the principal output of the study, which proposes how to prevent unauthorized changes to radio equipment in the field.

  • A Transparent Transient Faults Tolerance Mechanism for Superscalar Processors

    Toshinori SATO  

     
    PAPER-Dependable Systems

      Vol:
    E86-D No:12
      Page(s):
    2508-2516

    In this paper, we propose a fault-tolerance mechanism for microprocessors, which detects transient faults and recovers from them. The investigation of fault-tolerance techniques for microprocessors is driven by two issues: One regards deep submicron fabrication technologies. Future semiconductor technologies could become more susceptible to alpha particles and other cosmic radiation. The other is the increasing popularity of mobile platforms. Cellular telephones are currently used for applications which are critical to our financial security, such as mobile banking, mobile trading, and making airline ticket reservations. Such applications demand that computer systems work correctly. In light of this, we propose a mechanism which is based on an instruction reissue technique for incorrect data speculation recovery and utilizes time redundancy, and evaluate our proposal using a timing simulator.

  • Irredundant Low Power Address Bus Encoding Techniques Based on Adaptive Codebooks

    Satoshi KOMATSU  Masahiro FUJITA  

     
    PAPER-Power Optimization

      Vol:
    E86-A No:12
      Page(s):
    3001-3008

    The power dissipation at the off-chip bus has become a significant part of the overall power dissipation in micro-processor based digital systems. This paper presents irredundant address bus encoding methods which reduce signal transitions on the instruction address buses by using adaptive codebook methods. These methods are based on the temporal locality and spatial locality of instruction address. Since applications tend to JUMP/BRANCH to limited sets of addresses, proposed encoding methods assign the least signal transition codes to the addresses of JUMP/BRANCH operations in the past. In addition, our methods can be easily applicable for conventional digital systems since they are irredundant encoding methods. Our encoding methods reduce the signal transitions on the instruction address buses, which results in the reduction of total power dissipation of digital systems. Experimental results show that our methods can reduce the signal transition by an average of 88%.

  • Numerical Simulation for Interstitial Heating of Actual Neck Tumor Based on MRI Tomograms by Using a Coaxial-Slot Antenna

    Kazuyuki SAITO  Hiroyuki YOSHIMURA  Koichi ITO  

     
    PAPER-Medical Application

      Vol:
    E86-C No:12
      Page(s):
    2482-2487

    Hyperthermia is one of the modalities for cancer treatment, utilizing the difference of thermal sensitivity between tumor and normal tissue. In this treatment, the tumor or target cancer cell is heated up to the therapeutic temperature between 42 and 45 without overheating the surrounding normal tissues. Particularly, the authors have been studying the coaxial-slot antenna for interstitial microwave hyperthermia. At that time, we analyzed the heating characteristics of the coaxial-slot antenna under the assumption that the human body is a homogeneous medium. In this paper, we analyzed the heating characteristics of the coaxial-slot antenna inside an actual neck tumor by using numerical calculations. The models of calculations consist of MRI tomograms of an actual patient. As a result of the calculations, we observed almost uniform temperature distributions inside the human body including the actual neck tumor, which are similar to the results obtained for a homogeneous medium.

  • Synthesis of Serial Local Clock Controllers for Asynchronous Circuit Design

    Nattha SRETASEREEKUL  Hiroshi SAITO  Euiseok KIM  Metehan OZCAN  Masashi IMAI  Hiroshi NAKAMURA  Takashi NANYA  

     
    PAPER-IP Design

      Vol:
    E86-A No:12
      Page(s):
    3028-3037

    Asynchronous controllers effectively control high concurrence of datapath operations for high speed. Signal Transition Graphs (STGs) can effectively represent these concurrent events. However, highly concurrent STGs cause the state explosion problem in asynchronous synthesis tools. Many small but highly concurrent STGs cannot be synthesized to obtain control circuits. Moreover, STGs also lead to some control-time overhead of the four-phase handshake protocol. In this paper, we propose a method for deriving the serial control nodes from Control Data Flow Graphs (CDFGs) such that the concurrence of datapath operations is still preserved. The STGs derived from the serialized control nodes are serial STGs which are simpler for synthesis than the concurrent STGs. We also propose an implementation using these serialized controllers to generate local clocks at any necessary times. The implementation results in very small control-time overhead. The experimental results show that the number of synthesis states is proportional to the number of control signals, and the circuits with satisfiable small control-time overhead are obtained.

  • Predictive Resource Reservation in Wireless Cellular Networks

    Ruay-Shiung CHANG  Hsuan-Yan LU  

     
    PAPER-Wireless Communication Technology

      Vol:
    E86-B No:12
      Page(s):
    3538-3543

    Recently, wireless networks have become a major sector in the telecommunication industry. More and more applications seek to become wireless. However, a major obstacle in adapting wired applications to wireless is the quality of service problem. Although the wireless bandwidth is improving at a fast pace, it still is not enough for modern multimedia applications. Even if we solve the bandwidth problem, the mobility of users also poses challenges for QoS provision. If the user moves randomly, how and where can resources be reserved in advance for roaming users to move smoothly and seamlessly? In this paper, we propose a method for predictive resource reservation in wireless networks. Resources reserved but not used will seriously affect the system performance. Therefore, we also have mechanisms to release the reserved resources when it is not used within a time limit and allow resources to be used temporarily by another mobile user. We compare the performance of our method with those of fixed allocation scheme and shadow cluster scheme. The results indicate its effectiveness and feasibility.

13621-13640hit(20498hit)