High frequency and low power 128/129 dual modulus prescaler ICs are developed for mobile communication applications, using 0.5 µm GaAs MESFET technology. Provided with an on-chip voltage regulator, a prescaler IC with an input amplifier operates in a wide frequency range from 200 MHz to 1,500 MHz at input power from -15 dBm to +17 dBm at the temperature of -30 to +120 with supply voltage of 2.7 V, 3.0 V and 5.0 V. At the same time, it demonstrated its low power characteristics consuming 3.68 mA with 3.0 V at +30 in operation, 0.16 mA while powered-off. Another prescaler IC without an input amplifier operates up to 1,650 MHz with Vdd=2.7 V, 3.0 V and 5.0 V at +30, dissipating 2.74 mA/3.0 V.

Public switching systems are intensively realtime and multi-processing, very large, long-lived, and frequently modified. Programs that control switching systems are therefore required not only to have run-time efficiency but also to be easy to maintain and extend. This paper proposes a Concurrent Object Model and an Object-Oriented Switching Program Structure. The Concurrent Object Model ensures simple and efficient real-time multi-processing. This model allows logical switching components to be implemented as "objects" in software, and the structure of the program coincides with the structure of the logical model. The program structure proposed here uses distributed call processing, which allows building-block-structured switching systems. A prototype switching program proved the effectiveness of this approach and showed that the static and dynamic overheads are within the capacity of present VLSI technology.

In this paper we propose a new timing verification technique named coded time-symbolic simulation, CTSS. Our interest is on simulation of logic circuits consisting of gates whose delay is specified only by its minimum and maximum values. Conventional logic simulation based on min/max delay model leads to over-pessimistic results. In our new method, the cases of possible delay values of each gate are encoded by binary vectors. The circuit behavior for all the possible combinations of the delay values are simulated based on symbolic simulation by assigning Boolean variables to the binary vectors. This simulation technique can deal with logic circuits containing feedback loops as well as combinational circuits. We implemented an efficient simulator by using shared binary decision diagrams (SBDD's) as internal representation of Boolean functions. We also propose novel techniques of analyzing the results of CTSS.

This paper proposes a test case generation method for testing concurrent programs as a black box. Typical applications are system testing for switching systems and inter-operability testing for OSI products. We adopt a two-step approach: first generate the control flow graph which represents global behaviors of a given concurrent program, and then apply conventional test case generation methods for the control flow graph. To generate a control flow graph without state space explosion, the black-box equivalence between system behaviors is introduced. The proposed algorithm generates a minimal control flow graph which consists of representatives of equivalence classes. Two practical techniques for the second step are discussed for a case study using a commercial digital PBX. The results show the feasibility of the proposed method.

It is well known that the multiple-valued signed-digit (SD) arithmetic circuits have the attractive features of compactness and high-speed operation. However, both of these features have yet to be utilized fully. In this paper, we consider the application of a parallel-structure-based VLSI processor. A high-performance parallel-structure-based multiple-valued VLSI processor using the radix-2 SD number system is proposed. Its compactness makes the parallelism high under chip size limitations in comparison with the ordinary binary arithmetic circuits. Moreover, the speed of the single arithmetic module is very high in the SD arithmetic circuits, so that we can take advantage of the high-speed operation in the parallel-structure-based VLSI processor chip. The multiple-valued bidirectional current-mode technology is used not only in high-speed small sized arithmetic circuits, but also in reducing the number of connections in the parallel-structure-based VLSI processor. The proposed processor is specially developed for real-time digital control, where the performance is evaluated by delay time. Performance estimation using SPICE simulators shows that the delay time of proposed processor for matrix operations such as matrix multiplication is greatly reduced in comparison with a conventional binary processor.

The quality of polycrystalline silicon films and electrical characteristics of polycrystalline silicon gate metal-oxide-semiconductor (MOS) capacitors were investigated under various processing conditions, including phosphorus doping. The stresses observed in Si films deposited in the amorphous phase show complex behavior during thermal treatment. The stresses in as-deposited Si films are compressive. They change to tensile with annealing at 800, and to compressive after an additional annealing at 900. The kind of charges trapped in the SiO2 film during the negative constant current stress in Polycrystalline silicon gate MOS capacitors differ with the maximum process temperature. The trapped charges of samples annealed at 800 were negative, while those of samples annealed at 900 were positive.

A hybrid integrated optical module composed of a silica-based planar lightwave circuit (PLC), a laser diode with an integrated monitor-photodiode, and a pin-photodiode is fabricated for use in high-performance, compact and cost-effective fiber optic subscriber systems. Its applicability to a wavelength-division-multiplex (WDM) system with a 1.3-µm bi-directional signal and a 1.5-µm one-way signal is demonstrated. The PLC was fabricated by a combination of flame hydrolysis deposition (FHD) and reactive ion etching (RIE), and it simultaneously achieved 1.3-µm/1.5-µm multi/demultiplexing and 1.3-µm Y-branching functions. The optical module exhibited insertion losses of 4.1dB at 1.31µm (including a Y-branch circuit loss of 3dB) and 0.5dB at 1.53µm. An optical output power of more than -4dBm was obtained from the optical module and the crosstalk was sufficiently low at less than -20dB between wavelengths of 1.3µm and 1.5µm. Temperature cycle tests on the optical module showed reliable and stable operation with an optical power fluctuation of less than 0.3dB for 500 cycles.

The characteristics of an optical functional integrated circuit and its applications are discussed. This circuit is based upon a Mach-Zehnder interferometer type waveguide device employing thermo-optic effect. This circuit is compact, cost-effective and practical. One proposed application is an optical loopback circuit to test both OCU loop 1 and DSU loop C. This optical loopback circuit with an attenuator and space switches is formed on a common silicon substrate, and using this circuit both loopback and line tests are independently available at the same access point. The other is an optical selector. This optical selector with WDM-MUX/DMUX and space switches is formed on a common silicon substrate, and using this selector, wavelength selection from medium density WDM (MDWDM) signal can be performed. Each MDWDM signal carries both AM and FM-FDM video signals modulated by Subcarrier Multiplexing (SCM) techniques. This selector can be wired in point-to-multipoint configurations to home video appliances.

Recently most of the singularities of the equivalent edge currents for flat plates were eliminated by the authors using the paths of most rapid phase variation. A unique direction on the plate was determined for given incidence and observer. This paper extends this method for arbitrary angle wedges and presents the new expressions of the equivalent edge currents. The resultant expressions are valid for any incidence and observation aspects and have no false singularities. Diffraction patterns and radar cross sections of 3-D objects composed of wedges are calculated by using these currents. They show good agreements with experimental data or the results by the other methods.

In case of the system identification problem, such as an echo canceller, estimated impulse response obtained by the frequency-domain adaptive filter based on the circular convolution has estimation error because the unknown system is based on the linear convolution in the time domain. In this correspondence, we consider a sufficient condition to reduce the estimation error.

This paper proposes the GDV system, which provides a format-independent interface with which to access documents in various formats. It also proposes a new approach for document representation to be used in the GDV system. In this approach, a document is represented by a chain of objects, each of which belongs to a certain class and transforms access operations according to the class-specific transformation rule. A user's request is interpreted as a request to the uppermost object of the chain, transformed by objects in the chain successively, and executed by the lowermost object in the chain. The initial state of a document is an object chain containing an unidentified object. As the unidentified object identifies and divides itself, classification (and chain generation) proceeds step by step.

The mechanisms for executing concurrent applications proposed so far fall into one of three groups: processes, kernel-level threads, and user-level threads. Each of them is insufficient in terms of either parallelism, the flexibility to combine separately developed programs at run-time, or costs of operations such as creation, switching, and termination. A thread facility in the XERO operating system overcomes this problem and provides a uniform framework for executing concurrent applications. To achieve parallelism of threads, the flexibility to combine separately developed programs at run-time, and fast thread operations, the operating system kernel and a thread management module in a user address space manage threads cooperatively. We implemented the cooperative thread management mechanism and measured its performance to examine the effectiveness of our approach.

This paper describes the integration of a qualitative method and a quantitative method by Bottleneck Diagnosis/Improvement Expert Systems for Synchronized queueing network (BDES-S and BIES-S). On the basis of qualitative reasoning, BDES-S can carry out parameter tuning in order to diagnose and improve bottlenecks of synchronized queueing networks. BDES-S can produce several alternative qualitative improvement plans for one bottleneck server. BIES-S can produce quantitative improvement equations for each qualitative improvement plan. Our method using BDES-S and BIES-S can integrate both quantitative and qualitative methods for parameter tuning on complicated queueing synchronized networks.

A 1/2 frequency divider using resonant-tunneling hot electron transistors (RHETs) has been proposed and demonstrated. The circuit make the best use of negative differential conductance, a feature of RHETs, and contains one half transistors than used in conventional circuits. The RHETs were fabricated using self-aligned InGaAs RHETs and WSiN thin-film resistors on a single chip. The RHETs have an i-InGaAlAs/i-InGaAs collector barrier that improves the current gain at low collector-base voltages. Circuit operation was confirmed at 77 K.

Experimental results on the superconducting three-terminal devices Using Bi-system High-Tc Superconductors were reported. The VCJJ (Variabel critical-current-type Josephson junction devices) using the thermal effect (VCJJ) and a dual gate Josephson device of a new current-injection type are described. The basic technology and problems for high-Tc three-terminal devices are briefly discussed.

Sandwich-type Josephson junctions with the structure Bi2Sr2Ca1Cu2Ox/Bi2Sr2Cu1Oy/Bi2Sr2Ca1Cu2Oz (BSCCO/BSCO/BSCCO), have been fabricated and their characterstics determined. The BSCO barrier layer, which is characterized by a crystal structure close to that of the BSCCO electrode layer, is a normal conductor at 4.2 K. Superconductor/normal-conductor/superconductor (S/N/S) type current-voltage characteristics are obtained with these junctions. Distinctive Shapiro steps are observed when they are exposed to microwave radiation. An oscillating behavior of each step in their I-V characteristics are confirmed for increased microwave power. The critical current, Ic, is found to be proportional to (1-T/Tc)2 in the neighborhood of Tc. These results coincide with the ones observed with conventional S/N/S junctions.

The authors design a simple feed system for a planar slotted waveguide array. A waveguide π-junction with negligible reflection is cascaded to compose a multiple-way power divider. The frequency characteristics of the power divided to each port and the reflection at the feed point are discussed and high performances are predicted. The maximum number of cascaded junctions in this system can be determined in terms of a desired frequency bandwidth and allowable deviation in divided power.

This paper describes the structure and properties of superconductive small antennas with thin-film matching circuits. These circuits make it possible to realize small antennas, 38 mm20 mm16 mm in size. This is one quarter the length of our previously reported ceramic antennas. The actual gain of this antennas was -4.5 dBi at 470 MHz. This value is 5.5 dB higher than that of Cu antennas with exactly the same structure.

This paper describes on the transmission properties of the superconducting coplanar waveguide on LiNbO3 (LN) substrates, fabricated by YBa2Cu3Oy (YBCO) superconducting films. The films have been prepared by the reactive co-evaporation method and patterned by a wet etching process. The surface resistance of the obtained film was 0.04 Ω at 18 GHz and 77 K. It was confirmed from X-ray diffraction (XRD) that these films were highly oriented to the direction of c-axis without a secondary phase. The microwave transmission properties of these YBCO coplanar waveguides were investigated at frequencies up to 20 GHz and compared with that of the aluminum coplanar waveguide. The characteristic impedances of both coplanar waveguides were designed to be 50 Ω. It was found that the attenuation constants of these samples at 77 K were less than that of the aluminum coplanar waveguide for frequencies below 18 GHz.

Among the many fabrication methods for oxide superconductor films, metal organic chemical vapor deposition (MOCVD) is particularly suitable for industrial application because of its mass productivity and the low growth temperature. Therefore we have studied this technique using the horizontal cold wall furnace type MOCVD method to obtain high quality superconducting films. As the result, we have succeeded in fabricating YBa2Cu3Oy films which have high critical temperatures (over 80 K) under substrate temperatures as low as 700 without post-annealing. But, in the course of our experiments, it was found that the thicknesses of YBa2Cu3Oy films fabricated by MOCVD were not uniform. The cause of this non-uniformity is believed to be that the deposition rate exponentially falls off along the flow direction because of the decrease of the source gas concentration through the reaction. In this paper, this non-uniformity is analytically studied. It is shown that the deposition rate decrease can be controlled with a tapered inner tube, and that these theoretical results are in good agreement with the results of experiment. In addition, it is indicated that the superconducting property of the films has less dependence on substrate position as a result of the tapered inner tube.