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4221-4240hit(4258hit)

  • Bipolar Transistor Circuit Analysis by Waveform Relaxation Method with Consideration of the Operation Point

    Koichi HAYASHI  Mitsuru KOMATSU  Masakatsu NISHIGAKI  Hideki ASAI  

     
    LETTER

      Vol:
    E75-A No:7
      Page(s):
    914-916

    This letter describes the waveform relaxation algorithm with the dynamic circuit partitioning technique based on the operation point of bipolar devices. Finally, we verify its availability for the simulation of the digital bipolar transistor circuit.

  • Effects of Cleaning by Sulfuric Acid and Hydroperoxide Mixture on Thin SiO2 Film Properties

    Masashi MAEKAWA  Shigeo OHNISHI  Keizo SAKIYAMA  

     
    PAPER

      Vol:
    E75-C No:7
      Page(s):
    796-799

    Effects of cleaning by H2SO4: H2O2 on thin SiO2 film was investigated. The cleaning increases Fowler-Nordheim currents by about 14%, shifts the dielectric breakdown distribution to lower electric field intensity and degrades TDDB characteristics. These results are due to the oxidation and commensurate roughening of the silicon srface by the cleaning solution. When the cleaning is done at higher temperature and with higher concentration of hydroperoxide, microroughness of silicon surface increases. Therfore, the trade-off between the cleaning effect and the roughening effect of H2SO4: H2O2 should be found out.

  • Heuristic Subcube Allocation in Hypercube Systems

    O Han KANG  Soo Young YOON  Hyun Soo YOON  Jung Wan CHO  

     
    PAPER-Computer Systems

      Vol:
    E75-D No:4
      Page(s):
    517-526

    The main objective of this paper is to propose a new top-down subcube allocation scheme which has complete subcube recognition capability with quick response time. The proposed subcube allocation scheme, called Heuristic Subcube Allocation (HSA) strategy, is based on a heuristic and undirected graph, called Subcube (SC)-graph, whose vertices represent the free subcubes, and edge represents inter-relationships between free subcubes. It helps to reduce the response time and internal/external fragmentation. When a new subcube is released, the higher dimension subcube is generated by the cycle detection in the SC-graph, and the heuristic is used to reduce the allocation time and to maintain the dimension of the free subcube as high as possible. It is theoretically shown that the HSA strategy is not only statically optimal but also it has a complete subcube recognition capability in a dynamic environment. Extensive simulation results show that the HSA strategy improves the performance and significantly reduces the response time compared to the previously proposed schemes.

  • Voyager Radio Science: Observations and Analysis of Neptune's Atmosphere

    Ei-ichi MIZUNO  Nobuki KAWASHIMA  Tadashi TAKANO  Paul A. ROSEN  

     
    PAPER-Antennas and Propagation

      Vol:
    E75-B No:7
      Page(s):
    665-672

    Voyager Neptune radio science data were collected using three antennas on Earth on August 25, 1989. A parabolic antenna at Canberra, Australia, of 70 meter diameter received 2.3GHz and 8.4GHz carriers. The 64 meter parabolic antennas at Parkes. Australia and Usuda, Japan, received only the 8.4GHz and only the 2.3GHz carriers, respectively. It is necessary to reduce the frequency variation in the received signal carrier to extract accurate information on physically interesting objects such as Neptune's atmosphere, ionosphere, or the rings. After the frequency stabilization process, the frequency drift was reduced from 180Hz down to a maximum of 5Hz, making it possible to reduce the data bandwidth and, consequently, the data volume, by a factor of 30. The uncertainty of the signal frequency estimates were also reduced from 5 down to 510-3Hz/sec above the atmosphere, from 5 down to 0.5Hz/sec in the atmosphere, and from 50 down to 3Hz/sec at the beginning and the end of the atmospheric occultation. Much of the remaining uncertainty is due to scintillations in Neptune's atmosphere and cannot be reduced further. The estimates are thus meaningfully accurate and suitable for scientific analysis and coherent arraying of data from different antennas. Two results based on these estimates are shown: a preliminary temperature-pressure (T-p) profile of Neptune's atmosphere down to a pressure level of 2 bar computed using the Usuda 2.3GHz data, and a multipath phenomenon in the atmosphere seen in Canberra 8.4GHz data. Our T-p profile shows good agreement with the results presented by Lindal et al. within 1K below 100mbar pressure level, even though our result is based on an independent data set and processing. A comparison of the multipath phenomena at Neptune with that at Uranus implies that it was created by a cloud layer with a smaller scale height than the atmosphere above and below it. The processing methods described were developed in part with the interest to coherently array Canberra, Parkes and Usuda data. In this sense, while this paper does not extend any science results, the observations and results are derived independently from other published results, and in the case of Usuda, are completely new.

  • ACE: A Syntax-Directed Editor Customizable from Examples and Queries

    Yuji TAKADA  Yasubumi SAKAKIBARA  Takeshi OHTANI  

     
    PAPER

      Vol:
    E75-D No:4
      Page(s):
    487-498

    Syntax-directed editors have several advantages in editing programs because programming is guided by the syntax and free from syntax errors. Nevertheless, they are less popular than text editiors. One of the reason is that they force a priori specified editing structures on the user and do not allow him to use his own structure. ACE (Algorithmically Customizable syntax-directed Editor) provides a solution for this problem by using a technique of machine learning; ACE has a special function of customizing the grammar algorithmically and interactively based on the learning method for grammars from examples and queries. The grammar used in the editor is customized through interaction with the user so that the user can edit his program in a more familiar structure. The customizing function has been implemented based on the methods for learning of context-free grammars from structural examples, for which the correctness and the efficiency are proved formally. This guarantees the soundness and the efficiency of customization. Furthermore, ACE can be used as an algorithmic and interactive tool to design grammars, which is required for several purposes such as compiler design and pretty-printer design.

  • A Method of Generating Tests for Combinational Circuits with Multiple Faults

    Hiroshi TAKAHASHI  Nobukage IUCHI  Yuzo TAKAMATSU  

     
    PAPER-Fault Tolerant Computing

      Vol:
    E75-D No:4
      Page(s):
    569-576

    The single fault model is invalid in many cases. However, it is very difficult to generate tests for all multiple faults since an m-line circuit may have 3m --1 multiple faults. In this paper, we describe a method for generating tests for combinational circuits with multiple stuck-at faults. An input vector is a test for a fault on a target line, if it find the target line to be fault-free in the presence of undetected or undetectable lines. The test is called a robust test for fault on a target line. It is shown that the sensitizing input-pair for a completely single sensitized path can be a robust test-pair. The method described here consists of two procedures. We label these as SINGLE_SEN" procedure and DECISION" procedure. SINGLE_SEN generates a single sensitized path including a target line on it by using a PODEM-like method which uses a new seven-valued calculus. DECISION determines by utilizing the method proposed by H. Cox and J. Rajski whether the single sensitizing input-pair generated by the SINGLE_SEN is a robust test-pair. By using these two procedures the described method generates robust test-pairs for the combinational circuit with multiple stuck-at faults. Finally, we demonstrate by experimental results on the ISCAS85 benchmark circuits that SINGLE_SEN is effective for an algorithmic multiple fault test generation for circuits not including many XOR gates.

  • Advanced Dimensioning Tool for Circuit-Switched Networks

    Masaaki SHINOHARA  

     
    PAPER

      Vol:
    E75-B No:7
      Page(s):
    594-600

    We have developed an advanced tool for dimensioning circuit-switched networks, called CNEP (Circuit-Switched Network Evaluation Program) , for effective design of digital networks. CNEP features a high-reliability network structure (node dispersion, double homing, etc) , both-way circuit operation, and circuit modularity (or big module size), all of which are critical for digital networks. CNEP also solves other dimensioning problems such as the cost difference between existing and newly installed circuits, and handles multi-hour traffic conditions, dynamic routing, and multiple-switching-unit nodes. Operations Research techniques are applied to produce exact and heuristic algorithms for these problems. Algorithms with good time-performance trade-off characteristics are chosen for CNEP.

  • Design of Circularly Symmetric Two-Dimensional R Lowpass Digital Filters With Constant Group Delay Using McClellan Transformations

    Kiyoshi NISHIKAWA  Russell M. MERSEREAU  

     
    PAPER-Design and Implementation of Multidimensional Digital Filters

      Vol:
    E75-A No:7
      Page(s):
    830-836

    We present a successful method for designing 2-D circularly symmetric R lowpass filters with constant group delay. The procedure is based on a transformation of a 1-D prototype R filter with constant group delay, whose magnitude response is the 2-D cross-sectional response. The 2-D filter transfer function has a separable denominator and a numerator which is obtained from the prototype numerator by means of a series of McClellan transformations whose free parameters can be optimized by successive procedure. The method is illustrated by an example.

  • Practical Network Planning Support System--PIGEON

    Atsushi MINEGISHI  Yoshihiro DOI  Hikaru MIYAMOTO  

     
    PAPER

      Vol:
    E75-B No:7
      Page(s):
    601-608

    This paper discusses a computer-aided network planning support system called PIGEON that has been developed primarily for advancing countries implementing the applicability to various types of networks and the supportability to the sensitivity analysis. For the implementation of the applicability, the customization by reflecting existing network facilities and their accompanying restrictive conditions into a design result is focused. A case study on the customization shows the effectiveness of the reflection. The procedures are given of the sensitivity analysis in order to examine and to evaluate the effect of the uncertain factors in network planning. In particular, a method called "network modification" is proposed for the sensitivity analysis for uncertain factors associated with a partial network. The network modification efficiently integrates network planner's judgments into a design result by the interactive method. In addition, this paper describes the importance of streamlining the data input and the evaluation of design results, showing the operating time required for each work phase in network planning.

  • Contamination Control in Low-Pressure Process Equipment

    Koichi TSUZUKI  

     
    PAPER

      Vol:
    E75-C No:7
      Page(s):
    860-865

    The motion of particles in low-pressure chemical vapor deposition (LPCVD) (0.4 Torr) equipment has been investigated by a numerical simulation. The effects of wafer orientation, electrostatic forces, and thermophoresis were evaluated. Horizontal surface-down processing and vertical processing can reduce particulate contamination remarkably compared with horizontal surface-up processing. Static electricity control is essential. Weakly charged wafers (several V to several 10 V) can significantly increase submicron particle deposition. In the absence of electrical forces, thermophoresis prevents deposition of particles in the size range 0.03 µmDp0.6 µm, when the temperature difference between the wafer surface and the gas inlet temperature exceeds 100. Deposition of particles smaller than 0.03 µm still occurs by diffusion.

  • A New CMOS Neuron Circuit Based on a Cross-Coupled Current Comparator Structure

    Kyoko TSUKANO  Takahiro INOUE  Shoichi KOGA  Fumio UENO  

     
    PAPER-Neural Networks

      Vol:
    E75-A No:7
      Page(s):
    937-943

    A new CMOS neuron circuit suitable for VLSI implementation of artificial neural networks is proposed. A cross-coupled current comparator structure is adopted to obtain large differential neuron signals for high-speed multi-input/multi-output neuron operations. In addition, the shape of the output function of the proposed neuron circuit can be modified by simply varying the value of the auxiliary current sources. To estimate the performance of the proposed circuit as an element in a neural network, a 15-bit associative memory based on the Hopfield neural network was designed. The performances of a single 7-input neuron and of the 15-neuron associative memory are confirmed by SPICE simulations.

  • The Dynamics of Recurrent Neuron

    Toshihide TSUBATA  Hiroaki KAWABATA  Yoshiaki SHIRAO  Masaya HIRATA  Toshikuni NAGAHARA  Yoshio INAGAKI  

     
    LETTER

      Vol:
    E75-A No:7
      Page(s):
    923-927

    This letter describes one neuron's dynamics. This neuron provides its own feedback input. We call this neuron the recurrent neuron and investigate its nonlinear dynamics.

  • Realization of Immittance Floatator Using Nullors

    Masami HIGASHIMURA  Yutaka FUKUI  

     
    PAPER-Analog-IC Circuit Analysis and Synthesis

      Vol:
    E75-A No:6
      Page(s):
    644-649

    This paper treats the synthesis of immittance floatator using nullors. Eight sets of circuit equations for realizing immittance floatators and their nullor (nullator-norator) representations are given. By replacing nullors with active elements such as biporlar junction transistors (BJTs), current conveyors (CCIIs), operational amplifiers (OAs) and operational transconductance amplifiers (OTAs), the immittance floatators can be derived. The development is important because it enables one to convert the present wealth of knowledge concerning grounded immittance simulation networks into floating immittance simulation networks. Using immittance floatators, we can obtain not only the floating form of 1-port but also that of 2-port networks. Novel circuits use solely minus-type norators. Using one-type (minus- or plus-type) norators greatly simplifies the simulation circuit. In the case of an immittance floatator using CCIIs as the active elements, the effects of nonideal CCIIs and sensitivities are given. Many circuits can be systematically derived using nullor technique.

  • Current-Mode Analog Fuzzy Hardware with Voltage Input Interface and Normalization Locked Loop

    Mamoru SASAKI  Nobuyuki ISHIKAWA  Fumio UENO  Takahiro INOUE  

     
    PAPER-Analog-IC Circuit Analysis and Synthesis

      Vol:
    E75-A No:6
      Page(s):
    650-654

    In this paper, voltage-input current-output Membership Function Circuit (MFC) and Normalization Locked Loop (NLL) are proposed. They are useful building blocks for the current-mode analog fuzzy hardware. The voltage-input current-output MFC consists of one source coupled type Operational Transconductance Amplifier (OTA). The MFC is used in the input parts of the analog fuzzy hardware system. The fuzzy hardware system can execute the singleton fuzzy control algorithm. In the algorithm, the weighted average operation is processed. When the weighted average operation is directly realized by analog circuits, a divider must be implemented. Here, the NLL circuit, which can process the weighted average operation without the divider, is implemented using one source coupled type OTA. The proposed circuits were designed by using 2 µm CMOS design rules and its operations were confirmed using SPICE simulations.

  • Improving Current Mode DC-DC Converter Design in Chaotic Working Conditions

    Salvatore BAGLIO  Luigi FORTUNA  

     
    LETTER-Nonlinear Phenomena and Analysis

      Vol:
    E75-A No:6
      Page(s):
    744-746

    In this letter, introducing a highly accurate model for a real current mode DC-DC converter, an innovative design strategy is proposed in order to optimize circuit behavior in cases in which chaotic effects are present.

  • Silicon Nitride Passivated Ultra Low Noise InAlAs/InGaAs HEMT's with n+-InGaAs/n+-InAlAs Cap Layer

    Yohtaro UMEDA  Takatomo ENOKI  Kunihiro ARAI  Yasunobu ISHII  

     
    PAPER

      Vol:
    E75-C No:6
      Page(s):
    649-655

    Noise characteristics of InAlAs/InGaAs HEMT's passivated by SiN are investigated to ascertain their suitability for practical applications in circuit such as MMIC's. A 0.18-µm-gate-length device with 125-µm-gate width and 8-gate fingers showed the lowest minimum noise figure of 0.43 dB at 26 GHz with an associated gain of 8.5 dB of any passivated device ever reported. This value is also comparable to the lowest reported minimum noise figure obtained by bare InAlAs/InGaAs HEMT's in spite of increased parasitic capacitances due to the SiN passivation. Thes excellent noise performance was achieved by employing non-alloyed ohmic contact, a T-shaped gate geometry and a multi-finger gate pattern. To reduce the contact resistance of the non-alloyed ohmic contact, a novel n+-InGaAs/n+-InAlAs cap layer was used resulting in a very low contact resistance of 0.09 Ωmm and a low sheet resistance for all layers of 145 Ω/sq. No increase in these resistances was observed after SiN passivation, and a very low source resistance of 0.16 Ωmm was obtained. An analysis of equivalent circuit parameters revealed that the T-shaped gate and multi-finger gate pattern drastically decrease gate resistance.

  • A Dual Transformation Approach to Current-Mode Filter Synthesis

    WANG Guo-Hua  Kenzo WATANABE  Yutaka FUKUI  

     
    PAPER-Electronic Circuits

      Vol:
    E75-C No:6
      Page(s):
    729-735

    A dual transformation incorporating the frequency-dependent scaling factor with the impedance dimension is proposed to synthesize the current-mode counterpart of a voltage-mode original. A general class of current-mode active-RC biquadratic filters and a switched-capacitor low-pass biquad are derived to demonstrate the synthesis procedure. Their simulation and test results show that the current transfer functions are the same as the voltage transfer functions of the originals, and thus confirm the validity of the procedure. The dual trasformation described herein is general in that with the scaling factor chosen appropriately it can meet a wide variety of circuit transformation, and thus useful also for circuit classification and identification.

  • Characteristics Analysis of Fibonacci Type SC Transformer

    Ikko HARADA  Fumio UENO  Takahiro INOUE  Ichirou OOTA  

     
    PAPER-Analog-IC Circuit Analysis and Synthesis

      Vol:
    E75-A No:6
      Page(s):
    655-662

    For a realization of a DC-DC converter using no magnetic devices, a new switched capacitor (SC) transformer is introduced, which gives voltage ratios by Fibonacci series corresponding to the stages. This transformer is connected in cascade by each basic block which is assembled by a capacitor and three MOSFET switches. This operates on a simple two-phase clock and has a large step-up or step-down voltage ratio in spite of its simple configuration. The characteristics of this transformer with n stages of basic block are derived and calculated by means of a 4 4 cascade matrix. The optimal arrangement of each stage's capacitances is shown to reduce the SC resistance by about 20%. The simulation results are compared with the characteristics of a prototype transformer with four stages (8 times step-up ratio). Its power efficiency achieves 88% in case of 97 V output voltage, 0.2 A output current, and 100 kHz switching frequency. Lastly, the proposed SC transformer is compared and discussed with other typical SC transformers.

  • A Self-Consistent Linear Theory of Gyrotrons

    Kenichi HAYASHI  Tohru SUGAWARA  

     
    PAPER-Microwave and Millimeter Wave Technology

      Vol:
    E75-C No:5
      Page(s):
    610-616

    A new set of self-consistent linear equations is presented for the analysis of the startup characteristics of gyrotron oscillators with an open cavity consisting of weakly irregular waveguides. Numerical results on frequency detuning and oscillation starting current for a whispering-gallery-mode gyrotron are described in which these equations were utilized. Experiments for making a check on the effectiveness of the derived equations showed that they well express the operation of gyrotrons in comparison with the linear theory using an empty cavity field as the wave field.

  • A Testable Design of Sequential Circuits under Highly Observable Condition

    WEN Xiaoqing  Kozo KINOSHITA  

     
    PAPER-Fault Tolerant Computing

      Vol:
    E75-D No:3
      Page(s):
    334-341

    The outputs of all gates in a circuit are assumed to be observable unber the highly observable condition, which is mainly based on the use of E-beam testers. When using the E-beam tester, it is desirable that the test set for a circuit is small and the test vectors in the test set can be applied in a successive and repetitive manner. For a combinational circuit, these requirements can be satisfied by modifying the circuit into a k-UCP circuit, which needs only a small number of tests for diagnosis. For a sequential circuit, however, even if the combinational portion has been modified into a k-UCP circuit, it is impossible that the test vectors for the combinational portion can always be applied in a successive and repetitive manner because of the existence of feedback loops. To solve this problem, the concept of k-UCP scan circuits is proposed in this paper. It is shown that the test vectors for the combinational portion in a k-UCP scan circuit can be applied in a successive and repetitive manner through a specially constructed scan-path. An efficient method of modifying a sequential circuit into a k-UCP scan circuit is also presented.

4221-4240hit(4258hit)