In this letter, an area-efficient architecture for the hardware implementation of the real-time prime factor Fourier transform (PFFT) is presented. In the proposed architecture, a prime length DFT module with the one-point-per-cycle (OPPC) property is implemented by the parallel distributed arithmetic (DA), and a cyclic convolution feature is exploited to simplify the structure of the DA cells. Based on the proposed architecture, a real-time 65-point PFFT processor is designed, and the synthesis results show that it saves over 8% gates compared to the existing real-time 64-point DFT designs.

3D Mesh segmentation has become an important research field in computer graphics during the past few decades. Many geometry based and semantic oriented approaches for 3D mesh segmentation has been presented. However, only a few algorithms based on Markov Random Field (MRF) has been presented for 3D object segmentation. In this letter, we present a definition of mesh segmentation according to the labeling problem. Inspired by the capability of MRF combining the geometric information and the topology information of a 3D mesh, we propose a novel 3D mesh segmentation model based on MRF and Graph Cuts. Experimental results show that our MRF-based schema achieves an effective segmentation.

This paper shows a design method for a regular expression matching circuit based on a decomposed automaton. To implement a regular expression matching circuit, first, we convert a regular expression into a non-deterministic finite automaton (NFA). Then, to reduce the number of states, we convert the NFA into a merged-states non-deterministic finite automaton with unbounded string transition (MNFAU) using a greedy algorithm. Next, to realize it by a feasible amount of hardware, we decompose the MNFAU into a deterministic finite automaton (DFA) and an NFA. The DFA part is implemented by an off-chip memory and a simple sequencer, while the NFA part is implemented by a cascade of logic cells. Also, in this paper, we show that the MNFAU based implementation has lower area complexity than the DFA and the NFA based ones. Experiments using regular expressions form SNORT shows that, as for the embedded memory size per a character, the MNFAU is 17.17-148.70 times smaller than DFA methods. Also, as for the number of LCs (Logic Cells) per a character, the MNFAU is 1.56-5.12 times smaller than NFA methods. This paper describes detail of the MEMOCODE2010 HW/SW co-design contest for which we won the first place award.

The analytical derivation of the diversity-multiplexing tradeoff (DMT) for a half-duplex dynamic decode and forward (DDF) MIMO relay protocol has been regarded as an open problem. Recently, however, a minimization problem setting has been found, the solution of which corresponds to the DMT function for a half-duplex DDF MIMO relay protocol. In this paper, the DMT functions for three special half-duplex DDF MIMO relay protocols using two antennas at two of three nodes, source, relay, and destination nodes, and a single antenna at the other node are derived first. Then, the DMT function for a special half-duplex DDF MIMO relay protocol using two antennas at every node is derived. These DDF MIMO relay protocols are compared with one another and with some NAF MIMO relay protocols by simulation.

This paper proposes a differential fault analysis on the stream cipher MUGI, which uses two kinds of update functions of an intermediate state. MUGI was proposed by Hitachi, Ltd. in 2002 and is specified as ISO/IEC 18033-4 for keystream generation. Differential fault analysis (DFA) is a type of fault analysis, which is considered to be a serious threat against secure devices such as smart cards. DFA on MUGI was first proposed at ICISC 2010 [25]; however, the attack condition for the successful attack such as the position into which the fault is injected was restricted. In this paper, we extend the attack methods which are more practical, based on a one-byte and a multi-byte fault models using the relationship between two kinds of update functions that are mutually dependent. In the proposed attack, the attacker can know the position affected by the fault injection even if he has no control of the timing of the fault injection. As a result, a 128-bit secret key can be recovered using 13 pairs of correct and faulty outputs on average.

In spectrum sensing, if the primary user (PU) signal and the channel noise both follow Gaussian distribution and neither of their probability distribution functions (PDFs) are known, the traditional approaches based on entropy or Likelihood Ratio Test (LRT) etc., become infeasible. To address this problem, we propose a spectrum sensing method that exploits the similarity of PDFs of two time-adjacent detected data sets with cross entropy, while accounting for achieving the detection performance of LRT which is Neyman-Pearson optimal in detecting the primary user. We show that the detection performance of the proposed method asymptotically approximates that of LRT in detecting the PU. The simulation results confirm our analysis.

This paper presents an adaptive FFE/DFE receiver with an algorithm that measures the data-dependent jitter. The proposed adaptive algorithm determines the compensation level by measuring the input data-dependent jitter. The adaptive algorithm is combined with a clock and data recovery phase detector. The receiver is fabricated in with 0.13 µm CMOS technology, and the compensation range of equalization is up to 26 dB at 2 GHz. The test chip is verified for a 40 inch FR4 trace and a 53 cm flexible printed circuit channel. The receiver occupies an area of 440 µm 520 µm and has a power dissipation of 49 mW (excluding the I/O buffers) from a 1.2 V supply.

This letter proposes a method for choosing the best quantized beamforming vector that represents a subcarrier group, for coordinated beamforming in the downlink of multiuser multiple input multiple output-orthogonal frequency division multiplexing systems. The correlation between subcarriers is exploited for reducing the feedforward overhead, while maximizing the sum rate.

In this letter, dynamic decode-and-forward (DDF) protocol and static decode-and-forward (SDF) protocol are considered in a two-way half-duplex fading system, where two sources are equipped with multiple antennas and a relay is equipped with a single antenna. Their closed-form expressions of diversity multiplexing tradeoff (DMT) are derived, respectively. From the results, DDF always outperforms SDF in terms of DMT, achieves DMT gain over nonorthogonal amplify-and-forward (NAF) in low spectral efficiency scenarios, but is inferior to NAF in high spectral efficiency scenarios.

This letter has retrained an MQDF classifier on the retraining set, which is constructed by samples locating near classification boundary. The method is evaluated on HCL2000 and HCD Chinese handwriting sets. The results show that the retrained MQDF outperforms MQDF and cascade MQDF on all test sets.

The probability of making mistakes on the decoded signals at the relay has been used for the maximum-likelihood (ML) decision at the receiver in the decode-and-forward (DF) relay network. It is well known that deriving the probability is relatively easy for the uncoded single-antenna transmission with M-pulse amplitude modulation (PAM). However, in the multiplexing multiple-input multiple-output (MIMO) transmission, the multi-dimensional decision region is getting too complicated to derive the probability. In this paper, a high-performance near-ML decoder is devised by applying a well-known pairwise error probability (PEP) of two paired-signals at the relay in the MIMO DF relay network. It also proves that the near-ML decoder can achieve the maximum diversity of MSMD+MR min (MS,MD), where MS, MR, and MD are the number of antennas at the source, relay, and destination, respectively. The simulation results show that 1) the near-ML decoder achieves the diversity we derived and 2) the bit error probability of the near-ML decoder is almost the same as that of the ML decoder.

An analysis and design of a CMOS differential pair and a common source amplifier for shaping a triangular signal into 0-π/4 segments of sine and cosine waveforms are presented. By multiplexing these two shaped outputs, low distortion full sine and cosine signals can be produced at one fourth the frequency of the triangular input. These two circuits can be combined with one DAC and a phase accumulator to form a compact quadrature direct digital frequency synthesizer (Q-DDFS) suitable for generating low distortion sinusoidal signals at low frequency. The shapers are biased by two current generators specially designed to compensate for process parameter variations. MOS dimensional mismatch is also studied. The analog part of the Q-DDFS is synthesized using 0.18-micron n-well CMOS technology. A simulation shows that the circuit consumes 1.3 mW and can generate 19.96 mV 50 kHz sine and cosine signals with spurious free dynamic range (SFDR) of around 50 dBc from a Q-DDFS running at 1.6 MHz.

In a two-way half-duplex system where source nodes are equipped with multiple antennas and a relay with a single antenna, we study the diversity multiplexing tradeoff (DMT) achieved by orthogonal decode-and-forward (ODF), orthogonal amplify-and-forward (OAF), non-orthogonal decode-and-forward (NDF) and non-orthogonal amplify-and-forward (NAF), respectively. Their closed-form DMT are derived with given transmission time of each terminal, and optimized by allocating the transmission time. From these analyses, NDF achieves the best performance in terms of DMT in low spectral efficiency scenarios, while NAF outperforms other protocols in high spectral efficiency scenarios.

A new transmission scheme for OFDM systems that uses the odd discrete Fourier transform to provide frequency diversity gain is proposed. Odd DFT allows the transmission of data subcarriers in frequencies that are centred between those employed by the traditional DFT. This fact is exploited to transmit data subcarriers on the group of frequencies that gives better performance using either traditional DFT or odd DFT. As an example, by using this approach a diversity gain up to 5.3 dB at a BER of 10-4 in a typical indoor channel model can be achieved.

In this letter, we derive another exact bit error rate (BER) for decode-and-forward (DF) relay systems over Rayleigh fading channels. At first, our focus is on fixed-DF (FDF) relay schemes in which the probability density function (PDF) is derived based on error-events at relay nodes. Some insight into how erroneous detection and transmission at relay nodes affect both the combined signal-to-noise ratio (SNR) and the averaged BER is obtained, and cooperative diversity is observed from the closed-form BER expression. In addition, the developed analytical method is extended to adaptive-DF (ADF) schemes and the exact BER expressions are derived. Simulation results are finally presented to validate the analysis.

We consider a stabilization problem of a class of input-delayed nonlinear systems that have not only feedforward, but also some non-feedforward nonlinearity. While there are some existing results that deal with input-delayed non-feedforward nonlinear systems, they often assume a small input delay. It has been often the case that for a large input delay, the results are limited to only feedforward systems. In this letter, combined with the LMI approach in [3] and the reduction method in [5], we show that some feedforward and non-feedforward systems with a large delay in the input can be stabilized via the proposed controller.

We present the recovery of 2.5 Gb/s synchronous 16-point quadrature amplitude modulation data in real-time for an linewidth-times-symbol-duration ratio of 0.00048 after transmission over 1.6 km standard single mode fiber.

This paper proposes a new method that reduces the computational cost of the phase-only correlation (POC)-based methods for displacement estimation in old film sequences. Conventional POC-based methods calculate all the points of the POC and only use the highest peak of the POC and its neighboring points to estimate the displacement with subpixel accuracy. Our proposed method reduces the computational cost by calculating the POC in a small region, instead of all the points of the POC. The proposed method combines a displacement pre-estimation with a modified inverse discrete Fourier transform (IDFT). The displacement pre-estimation uses the 1-D POCs of frame projections to pre-estimate the displacement with pixel accuracy and chooses a small region in the POC including the desired points for displacement estimation. The modified IDFT is then used to calculate the points in this small region for displacement estimation. Experimental results show that use of the proposed method can effectively reduce the computational cost of the POC-based methods without compromising the accuracy.

We describe a series of system measurements investigating the performance of a burst-mode or transient-suppressed (TS)-EDFA, specifically designed to reduce the impact of gain transients in dynamic optical networks. We assess the performance of this TS-EDFA in a variety of network contexts. We compare the performance of the TS-EDFA with conventional amplifiers (C-EDFAs) and show its compatibility with supplementary gain control techniques. Finally, we measure gain-transient accumulation along long links using a recirculating transmission loop and show that, for packet-transmission, the number of hops is limited by accumulated transients for a C-EDFA, but limited by accumulated noise for the TS-EDFA.

Digital RF solutions have been shown to be advantageous in various design aspects, such as accurate modeling, design reuse, and scaling when migrating to the next CMOS process node. Consequently, the majority of new low-cost and feature cell phones are now based on this approach. However, another equally important aspect of this approach to wireless transceiver SoC design, which is instrumental in allowing fast and low-cost productization, is in creating the inherent capability to assess performance and allow for low-cost built-in calibration and compensation, as well as characterization and final-testing. These internal capabilities can often rely solely on the SoCs existing processing resources, representing a zero cost adder, requiring only the development of the appropriate algorithms. This paper presents various examples of built-in measurements that have been demonstrated in wireless transceivers offered by Texas Instruments in recent years, based on the digital-RF processor (DRPTM) technology, and highlights the importance of the various types presented; built-in self-calibration and compensation, built-in self-characterization, and built-in self-testing (BiST). The accompanying statistical approach to the design and productization of such products is also discussed, and fundamental terms related with these, such as 'soft specifications', are defined.