Based on the similarity in current-voltage characteristics of resonant-tunneling diodes (RTDs) and tunneling-type superconductive Josephson junctions, novel current-mode logic circuits consisting of four RTDs have been proposed. NAND and NOR functions, as well as AND and OR, can be obtained in a simple circuit configuration. SPICE simulation showed that the present circuits can operate at a clock frequency as high as 200 GHz.

In this paper, an adaptive microphone array system with a two-stage adaptation mode controller (AMC) is proposed for high-quality speech acquisition in real environments. The proposed system includes an adaptive array algorithm, a time-delay estimator and a newly proposed AMC. To ensure proper adaptation of the adaptive array algorithm, the proposed AMC uses not only temporal information, but also spatial information. The proposed AMC is constructed with two processing stages: an initialization stage and a running stage. In the initialization stage, a sound source localization technique is adopted, and a signal correlation characteristic is used in the running stage. For the adaptive array algorithm, a generalized sidelobe canceller with an adaptive blocking matrix is used. The proposed algorithm is implemented as a real-time man-machine interface module of a home-agent robot. Simulation results show 13 dB SINR improvement with the speaker sitting 2 m distance from the home-agent robot. The speech recognition rate is also enhanced by 32% when compared to the single channel acquisition system.

In many new high performance designs, the leakage component of power consumption is comparable to the switching component. Reports indicate that 40% or even higher percentage of the total power consumption is due to the leakage of transistors. This percentage will increase with technology scaling unless effective techniques are introduced to bring leakage under control. This article focuses on circuit optimization and design automation techniques to accomplish this goal. The first part of the article provides an overview of basic physics and process scaling trends that have resulted in a significant increase in the leakage currents in CMOS circuits. This part also distinguishes between the standby and active components of the leakage current. The second part of the article describes a number of circuit optimization techniques for controlling the standby leakage current, including power gating and body bias control. The third part of the article presents techniques for active leakage control, including use of multiple-threshold cells, long channel devices, input vector design, transistor stacking to switching noise, and sizing with simultaneous threshold and supply voltage assignment.

This paper investigates the application of the computational model of Cellular Automata (CA) for pattern classification of real valued data. A special class of CA referred to as Fuzzy CA (FCA) is employed to design the pattern classifier. It is a natural extension of conventional CA, which operates on binary string employing boolean logic as next state function of a cell. By contrast, FCA employs fuzzy logic suitable for modeling real valued functions. A matrix algebraic formulation has been proposed for analysis and synthesis of FCA. An efficient formulation of Genetic Algorithm (GA) is reported for evolution of desired FCA to be employed as a classifier of datasets having attributes expressed as real numbers. Extensive experimental results confirm the scalability of the proposed FCA based classifier to handle large volume of datasets irrespective of the number of classes, tuples, and attributes. Excellent classification accuracy has established the FCA based pattern classifier as an efficient and cost-effective solutions for the classification problem.

We have proposed diffusion-type flow control as a solution for the extremely time-sensitive flow control required for high-speed networks. In our method of flow control, we design in advance simple and appropriate rules for action at the nodes, and these automatically result in stable and efficient network-wide performance through local interactions between nodes. Specifically, we design the rules for the flow control action of each node that simulates the local interaction of a diffusion phenomenon, in order that the packet density is diffused throughout the network as soon as possible. However, in order to make a comparison with other flow control methods under the same conditions, the evaluations in our previous studies used a closed network model, in which the number of packets was unchanged. This paper investigates the performance of our flow control method for an end-to-end flow, in order to show that it is still effective in more realistic networks. We identify the key issues associated with our flow control method when applied to an open network model, and demonstrate a two-step solution. First, we consider the rule for flow control action at the boundary node, which is the ingress node in the network, and propose a rule to achieve smooth diffusion of the packet density. Secondly, we introduce a shaping mechanism, which keeps the number of packets in the network at an appropriate level.

This paper discusses performance limitation of on-chip interconnects. On-chip global interconnects are considered to be a bottleneck of high-performance LSIs. To overcome this issue, high-speed signaling and large throughput interconnection using electrical wires have been studied. However the limitation of on-chip interconnects has not been examined sufficiently. This paper reveals the maximum performance of on-chip global interconnects based on derived analytic expressions and detailed circuit simulation. We derive trade-off curves among bit rate, interconnect length, and eye opening both for single-end and for differential signaling. The results show that differential signaling improves signaling performance several times compared with conventional single-end signaling, and demonstrate that 80 Gbps differential signaling on 10 mm interconnects is promising.

VLSI architecture of IEEE802.11i cipher algorithms is devised dedicatedly for embedded implementation of IEEE802.11a/g wireless communication systems. The proposed architecture consists mainly of RC4 unit for WEP/TKIP and AES unit. The RC4 unit successfully adopts packed memory accessing architecture. As for the AES unit, overlapped pipeline scheme of CBC-MAC and Counter-Mode is exploited in order to conceal processing latency. The cipher core has been implemented with 18 Kgates in 0.18 µm CMOS technology, which achieves the maximum transmission rate of IEEE802.11a/g at 60 MHz clock frequency while consuming 14.5 mW of power.

This paper proves that for every positive integers n,k and any positive number ε, we can explicitly construct a DAG G with n+O(k1+ε) vertices and a constant degree such that even after removing any k vertices from G, the remaining digraph still contains an n-vertex dipath. This paper also proves that for every positive integers n,k and any positive number ε, we can explicitly construct a graph H with n+O(k2+ε) vertices and a constant degree such that even after removing any k vertices from H, the remaining graph still contains an n-vertex 2-dimensional square mesh.

Peer-to-peer (P2P) web caching has been studied recently as it can exploit local caches of peers for web caching without additional infrastructure. However, dynamic join/leave behaviors or local caching strategies of the peers due to their autonomy in a P2P network may limit the performance of P2P web caching. To overcome these limitations, we propose an effective directory-based P2P web caching system under dynamic participation of peers. We introduce the object lifetime in a P2P network considering the lifetimes of both an object in the local cache of a peer and a peer who owns the object, and utilize this object lifetime information for neighbor selection and storage management in the P2P web caching framework. For the neighbor selection, the proposed system utilizes the object lifetimes in selecting accurately a neighbor who would still retain the requested object and still remain in the P2P network. To improve the storage management, the proposed system uses efficiently the entire cache storage of the P2P network in such a way that the object is stored selectively in the local cache of the peer who requested it, considering the object lifetime. The trace-driven simulation results show that the proposed system has higher accuracy and fewer redirection failures than the conventional directory-based P2P web caching system in the feasible P2P network.

A packet diversity scheme is introduced to increase uplink channel efficiency in a wireless network where forward error correction is used. The packet diversity allows neighbor base stations to receive uplink packets from a mobile terminal in order to increase the efficiency of the uplink channel. By allowing multiple base stations to receive the same packets, we can improve the error correction capability in an uplink channel. By incorporating the packet diversity we can reduce the parity overhead of each packet for a given tolerable loss probability, which improves the link efficiency.

In this letter, we study dynamic multicasting in GMPLS networks with unequal branching capability. An overlapped multicasting tree is proposed to reduce blocking probability, which can utilize the branching capabilities more efficiently than the traditional Steiner tree. A nearest node branch first heuristic is developed to find such an overlapped tree.

Broadband fixed wireless access (BFWA) systems with multi-hop mesh topologies have attracted considerable attention as a promising technology for next generation, high quality, high capacity, and high density access infrastructures. The primary advantages of mesh network topologies are an improvement of capacity by means of traffic engineering throughout the networks. This paper discusses an adaptive traffic load balancing method that maximizes the capacity for the mesh BFWA networks. Taking into account the variation of network conditions such as traffic demand distributions and qualities of wireless links, the adaptive traffic load balancing method attempts to equalize the utilization of capacity for each wireless link. To avoid deteriorating the performance of TCP communications, the proposed method implements flow-based traffic load balancing. Performance of the proposed adaptive traffic load balancing method is demonstrated and validated using the experimental mesh network environments with wired networks with up to sixteen nodes that emulates the variation of the wireless link capacity.

The 2-vertex-connectivity augmentation problem of a graph with degree constraints, 2VCA-DC, is defined as follows: "Given an undirected graph G = (V,E) and an upper bound a(v;G) Z+{} on vertex-degree increase for each v V, find a smallest set E′ of edges such that (V,E E′) has at least two internally-disjoint paths between any pair of vertices in V and such that vertex-degree increase of each v V by the addition of E′ to G is at most a(v;G), where Z+ is the set of nonnegative integers." In this paper we show that checking the existence of a feasible solution and finding an optimum solution to 2VCA-DC can be done in O(|V|+|E|) time.

This paper describes a speed-oriented ultralow-voltage and low-power SOI circuit technique based on a differential enhancement- and depletion-mode (ED)-MOS circuit. Combining an ED-MOS circuit block for critical paths and a multi-Vth CMOS circuit block for noncritical paths, that is, the so-called differential ED-CMOS/SOI circuit, makes it possible to achieve low-power and ultrahigh-speed operation of over 1 GHz at a supply voltage of less than 0.5 V. As two applications of the differential ED-CMOS/SOI circuit, a multi-stage frequency divider that uses the ED-MOS circuit in a first-stage frequency divider and a pipelined adder with a CMOS pipeline register are described in detail. To verify the effectiveness of the ED-CMOS/SOI circuit scheme, we fabricated a 1/8 frequency divider and a 32-bit binary look-ahead carry (BLC) adder using the 0.25-µm MTCMOS/SOI process. The frequency divider operates down to 0.3 V with a maximum operating frequency of 3.6 GHz while suppressing power dissipation to 0.3 mW. The 32-bit adder operates at a frequency of 1 GHz at 0.5 V.

The role of electric field in metal-induced lateral crystallization (MILC) of amorphous Si (a-Si) under limited Ni-supply condition has been investigated. The nominal lateral-growth rate was increased from 3.6 µm/h (no-electric field) to 23 µm/h at the positive electrode side and reduced to 2.8 µm/h at the negative electrode side in presence of the electric field of 20 V/cm. However, spontaneously nucleated needle-like Si crystals were observed in the enhanced positive electrode side, which have been found to be independent of the MILC. Further investigation under the condition where Ni in the supply region was removed on the way of crystallization revealed that the electric field enhanced crystallization greatly reduced. These results indicate that the electric field does not enhance the MILC growth but enhances the diffusion of Ni in a-Si which takes place prior to the MILC growth.

Bayesian combining of confidence measures is proposed for speech recognition. Bayesian combining is achieved by the estimation of joint pdf of confidence feature vector in correct and incorrect hypothesis classes. In addition, the adaptation of a confidence score using the pdf is presented. The proposed methods reduced the classification error rate by 18% from the conventional single feature based confidence scoring method in isolated word Out-of-Vocabulary rejection test.

A distributed authentication platform (DAP) architecture is described that addresses the problems of fast user authentication and secure data transmission in large-scale ubiquitous networks. The user space is divided into domains, each containing an agent engine (AE), to enable rapid response to authentication requests. Dedicated channels are used for quick synchronization of the AE databases. Also described is a user-information-based model with QoS-ensured end-to-end secure-path setup. In this model, the user specifies the QoS requirement at the terminal, and the AE analyzes the information embedded in the control packet and initiates the signaling sequence to set up the path. This model is highly suitable for emerging peer-to-peer services, such as ensured-delivery e-mail, account information exchange, PDA file backup, and fixed-time data delivery. Evaluation of the AE performance demonstrated that the localization of authentication requests by using domains is an effective way of reducing the authentication processing time in a large-scale ubiquitous network. Simulated secure-path setup using three workstations demonstrated that a secure route satisfying such user specifications as priority, encryption, and bandwidth can be set up within 4.02 ms, much faster than with previous approaches.

This paper proposes a channel allocation principle that prevents TCP throughput degradation in multihop transmissions in a mesh network based on the carrier sense multiple access with collision avoidance (CSMA/CA) MAC protocol. We first address the relationship between the network topology of wireless nodes and the TCP throughput degradation based on computer simulations. The channel allocation principle is discussed in terms of resolution into a coloring problem based on throughput degradation. The number of required channels for the proposed channel allocation principle is evaluated and it is shown that two channels are sufficient for more than 96% simulated multihop patterns. The proposed channel allocation principle is extendable to generic mesh networks. We also clarify the number of required channels for mesh networks. The simulation results show that three channels are sufficient for more than 98% patterns in the generic mesh networks when the number of nodes is less than 10.

Broadband fixed wireless access (BFWA) systems with multi-hop mesh topologies have attracted considerable attention as a promising technology for next generation, high quality, high capacity, and high density access infrastructures. The primary advantages of mesh network topologies are an improvement of availability in connectivity between pairs of nodes by means of diversity routes. This paper discusses wireless node architecture that enables the integrated control of route diversity and traffic engineering together with the control of wireless links whose quality and performance could be affected by radio propagation conditions. Taking into account the functional requirements for multi-hop mesh BFWA networks, such as adaptive link configuration with multiple channels, distributed network management, and traffic engineering in mesh networks, the entity called network control unit (NCU) is designed and developed on a common UNIX based server computer. Implemented functions and their performance are demonstrated using the experimental environments with wired networks.

This paper describes the special demands of conversational speech in the context of corpus-based speech synthesis. The author proposed the CHATR system of prosody-based unit-selection for concatenative waveform synthesis seven years ago, and now extends this work to incorporate the results of an analysis of five-years of recordings of spontaneous conversational speeech in a wide range of actual daily-life situations. The paper proposes that the expresion of affect (often translated as 'kansei' in Japanese) is the main factor differentiating laboratory speech from real-world conversational speech, and presents a framework for the specification of affect through differences in speaking style and voice quality. Having an enormous corpus of speech samples available for concatenation allows the selection of complete phrase-sized utterance segments, and changes the focus of unit selection from segmental or phonetic continuity to one of prosodic and discoursal appropriateness instead. Samples of the resulting large-corpus-based synthesis can be heard at http://feast.his.atr.jp/AESOP.