In wireless sensor networks, or WSNs, a malicious node is able to cover itself by switching between good and bad behaviors. Even when running under a reputation mechanism, such a node can still behave maliciously now and then so long as its reputation is within the acceptable level. To address this inconsistent behavior issue, a combined approach of statistic reputation and time series is proposed in this study, in which the negative binomial reputation is applied to rate the nodes' reputation and concept of time series is borrowed to analyze the reputation results. Simulations show that the proposed method can effectively counter inconsistent behavior nodes and thus improves the overall system performance.

The mappings from independent binary variables to quadrature amplitude modulation (QAM) symbols are developed. Based the proposed mappings and the existing binary mutually uncorrelated complementary sequence sets (MUCSSs), a construction producing QAM periodic complementary sequence sets (PCSSs) is presented. The resultant QAM PCSSs have the same numbers and periods of sub-sequences as the binary MUCSSs employed, and the family size of new sequence sets is increased with exponent of periods of sub-sequences. The proposed QAM PCSSs can be applied to CDMA or OFDM communication systems so as to suppress multiple access interference (MAI) or to reduce peak-to-mean envelope power ratio (PMEPR), respectively.

Information-theoretic limits of a multi-way relay channel with direct links (MWRC-DL), where multiple users exchange their messages through a relay terminal and direct links, are discussed in this paper. Under the assumption that a restricted encoder is employed at each user, an outer bound on the capacity region is derived first. Then, a decode-and-forward (DF) strategy is proposed and the corresponding rate region is characterized. The explicit outer bound and the achievable rate region for the Gaussian MWRC-DL are also derived. Numerical examples are provided to demonstrate the performance of the proposed DF strategy.

Recently, Gan and Luo have proposed a direction-of-arrival estimation method for uncorrelated and coherent signals in the presence of multipath propagation [3]. In their method, uncorrelated and coherent signals are distinguished by rotational invariance techniques and the property of the moduli of eigenvalues. However, due to the limitation of finite number of sensors, the pseudo-inverse matrix derived in this method is an approximate one. When the number of sensors is small, the approximation error is large, which adversely affects the property of the moduli of eigenvalues. Consequently, the method in [3] performs poorly in identifying uncorrelated signals under such circumstance. Moreover, in cases of small number of snapshots and low signal to noise ratio, the performance of their method is poor as well. Therefore, in this letter we first study the approximation in [3] and then propose an improved method that performs better in distinguishing between uncorrelated signals and coherent signals and in the aforementioned two cases. The simulation results demonstrate the effectiveness and efficiency of the proposed method.

Secret sharing (SS) has been extensively studied as for both secure data storage and a fundamental building block for multiparty computation (MPC). Recently, Kikuchi et al. proposed a passively and unconditionally secure conversion protocol that converts from a share of a ramp scheme to another of homomorphic SS scheme. The share-size of the ramp scheme is small, and the homomorphic SS scheme is a class of SS schemes that includes Shamir's and replicated SS schemes, which are convenient for MPC. Therefore, their protocol is a conversion from an SS scheme whose share-size is small to MPC-friendly SS schemes, and can be applied to reduce the amount of data storage while maintaining extendibility to MPC. We propose five unconditionally and actively secure protocols in the honest majority. In this paper, we consider a privacy and correctness as security requirement and does not consider a robustness: A cheat caused by an active adversary must be detected. These protocols consist of two conversion protocols, two reveal protocols and a protocol generating specific randomness. Main protocols among them are two conversion protocols for bilateral conversion between a ramp scheme and linear SS scheme, and the others are building blocks of the main protocols. Linear SS scheme is a subset of homomorphic SS scheme but includes both Shamir's and replicated SS schemes. Therefore, these main protocols are conversions between an SS scheme whose share-size is small to MPC-friendly SS schemes. These main protocols are unconditionally and actively secure so if MPC protocols used after the conversion are actively secure, the whole system involving SS scheme, conversion, and MPC protocols can be unconditionally and actively secure by using our main protocols. One of our two main protocols is the first to convert from MPC-friendly SS schemes to the ramp scheme. This enhances applications, such as secure backup, of the conversion protocol. Other than the two main protocols, we propose a protocol for generating specific randomnesses and two reveal protocols as building blocks. The latter two reveal protocols are actively and unconditionally secure in the honest majority and requires O(n||F||)-bit communication per revealing, and we believe that it is independently interest.

Network traffic load usually differs significantly at different times of a day due to users' different time-preference. Network congestion may happen in traffic peak times. In order to prevent this from happening, network service providers (NSPs) can either over-provision capacity for demand at peak times of the day, or use dynamic time-dependent pricing (TDP) scheme to reduce the demand at traffic peak times. Since over-provisioning network capacity is costly, many researchers have proposed TDP schemes to control congestion as well as to improve the revenue of NSPs. To the best of our knowledge, all the studies on TDP schemes consider only the monopoly or duopoly NSP case. In our previous work, the duopoly NSP case has been studied with the assumption that each NSP has complete information of quality of service (QoS) of the other NSP. In this paper, an oligopoly NSP case is studied. NSPs try to maximize their overall revenue by setting time-dependent price, while users choose NSPs by considering their own time preference, congestion status in the networks and the price set by the NSPs. The interactions among NSPs are modeled as an oligopoly Bertrand game. Firstly, assuming that each NSP has complete information of QoS of all NSPs, a unique Nash equilibrium of the game is established under the assumption that users' valuation of QoS is uniformly distributed. Secondly, the assumption of complete information of QoS of all NSPs is relaxed, and a learning algorithm is proposed for NSPs to achieve the Nash equilibrium of the game. Analytical and experimental results show that NSPs can benefit from TDP scheme, however, not only the competition effect but also the incomplete information among NSPs causes revenue loss for NSPs under the TDP scheme.

This paper shows a method to find a linear transformation that reduces the number of variables to represent a given incompletely specified index generation function. It first generates the difference matrix, and then finds a minimal set of variables using a covering table. Linear transformations are used to modify the covering table to produce a smaller solution. Reduction of the difference matrix is also considered.

For the High Efficiency Video Coding (HEVC) standard, a fast transform unit (TU) decision method is proposed. HEVC defines the TU representing a region sharing the same transformation, and it supports various transform sizes from 4×4 to 32×32 by using a quadtree of TUs. The various sizes of TUs can provide good coding efficiency, whereas it may dramatically increase encoding complexity. Assuming that a TU with highly compacted energy is unlikely to be split, the proposed method determines an appropriate TU size according to the position of the last non-zero transform coefficient. Experimental results show that this reduces encoding run time by 17.2% with a negligible coding loss of 0.78% BD-rate for the random-access scenario.

In this paper, we propose a new encoding method applicable to any linear codes over arbitrary finite field whose computational complexity is O(δ*n) where δ* and n denote the maximum column weight of a parity check matrix of a code and the code length, respectively. This means that if a code has a parity check matrix with the constant maximum column weight, such as LDPC codes, it can be encoded with O(n) computation. We also clarify the relation between the proposed method and conventional methods, and compare the computational complexity of those methods. Then we show that the proposed encoding method is much more efficient than the conventional ones.

This paper introduces a partially parallel inter-chip link architecture for asynchronous multi-chip Network-on-Chips (NoCs). The multi-chip NoCs that operate as a large NoC have been recently proposed for very large systems, such as automotive applications. Inter-chip links are key elements to realize high-performance multi-chip NoCs using a limited number of I/Os. The proposed asynchronous link based on level-encoded dual-rail (LEDR) encoding transmits several bits in parallel that are received by detecting the phase information of the LEDR signals at each serial link. It employs a burst-mode data transmission that eliminates a per-bit handshake for a high-speed operation, but the elimination may cause data-transmission errors due to cross-talk and power-supply noises. For triggering data retransmission, errors are detected from the embedded phase information; error-detection codes are not used. The throughput is theoretically modelled and is optimized by considering the bit-error rate (BER) of the link. Using delay parameters estimated for a 0.13 µm CMOS technology, the throughput of 8.82 Gbps is achieved by using 10 I/Os, which is 90.5% higher than that of a link using 9 I/Os without an error-detection method operating under negligible low BER (<10-20).

Gait-based owner authentication using accelerometers has recently been extensively studied owing to the development of wearable electronic devices. An actual gait signal is always subject to change due to many factors including variation of sensor attachment. In this research, we tackle to the practical sensor-orientation inconsistency, for which signal sequences are captured at different sensor orientations. We present an iterative signal matching algorithm based on phase-registration technique to simultaneously estimate relative sensor-orientation and register the 3D acceleration signals. The iterative framework is initialized by using 1D orientation-invariant resultant signals which are computed from 3D signals. As a result, the matching algorithm is robust to any initial sensor-orientation. This matching algorithm is used to match a probe and a gallery signals in the proposed owner authentication method. Experiments using actual gait signals under various conditions such as different days, sensors, weights being carried, and sensor orientations show that our authentication method achieves positive results.

In collaborative software developments, many change processes implementing change requests are executed concurrently by different workers. The fact that the workers do not have sufficient information about the others' work and complicated dependencies among artifacts can lead to unexpected inconsistencies among the artifacts impacted by the changes. Most previous studies concentrated only on concurrent changes and considered them separately. However, even when the changes are not concurrent, inconsistencies may still happen if a worker does not recognize the impact of the changes made by other workers on his changes or the impact of his changes on other workers' changes. In addition, the changes in a change process are related to each other through their common target of realizing the change request and the dependencies among the changed artifacts. Therefore, to handle inconsistencies more effectively, we concentrate on both concurrent and non-concurrent changes, and the context of a change, i.e. the change process containing the change, rather than the ongoing changes only. In this paper, we present an inconsistency awareness mechanism and a Change Support Workflow Management System (CSWMS) that realizes this mechanism. By monitoring the progress of the change processes and the ongoing changes in the client workspaces, CSWMS can notify the workers of a (potential) inconsistency in advance along with the context of the inconsistency, that is, the changes causing the inconsistency and the change processes containing these changes. Based on the information provided by CSWMS, the workers can detect and resolve inconsistencies more easily and quickly. Therefore, our research can contribute to building a safer and more efficient collaborative software development environment.

Conventional CPM signals employ information sequence with time-unlimited phase shaping pulse (PSP) to achieve power and bandwidth efficient transmission. On the contrary, information sequence using time-limited PSP was believed to produce power-wasting data-independent discrete spectral lines in CPM spectra, and was suggested to be avoided. In this paper, we revisit this problem and adopt the time-limited PSP to replace the one with time-unlimited, it turns out to have an alternative solution to the CPM scheme. We first modify the spectral computing formula for the CPM with time-limited PSP (or CPM-TL) from conventional CPM formula and show that the discrete spectral lines appeared in the power density spectrum of CPM-TL signals can be diminished or become negligible by appropriately choosing PSP. We also show that this class of CPM can use any real number modulation index (h) and the resultant trellis structure of CPM guarantees the maximum constraint length allowed by the number of states in the MLSD receiver. Finally, the energy-bandwidth performance of CPM using time-limited PSP is investigated and compared with conventional CPM with time-unlimited PSP. From numerical results we show that, under the same number of states in the MLSD receiver and bandwidth occupancy, this subclass of CPM could outperform the conventional CPM up to 6dB coding gain, for h<1, in many cases.

In this paper, we propose a chromatic adaptation model based on the adapting degree according to the level of adapting luminance and chromaticity in various surround illuminants. In the proposed model, first maximum adapted cone responses are calculated through the estimation of adapting degree for viewing conditions then corresponding colors are reproduced from original colors using the ratio of maximum adapted cone responses between different viewing conditions. The purpose of this study is to produce chromatic adaptation transform applied to environment-adaptive color display system. As a result, our proposed model can give better estimation performance than prior models and be embodied easily as a linear model in display systems. So it is confirmed that the implemented system can predict corresponding-color data very well under a variety of viewing conditions.

In this paper, we present a novel class of long quasi-cyclic low-density parity-check (QC-LDPC) codes. Each of the codes in this class has a structure formed by concatenating single-parity-check codes and QC-LDPC codes of shorter lengths, which allows for efficient, high throughput encoder/decoder implementations. Using a code in this class, we design a forward error correction (FEC) scheme for optical transmission systems and present its high throughput encoder/decoder architecture. In order to demonstrate its feasibility, we implement the architecture on a field programmable gate array (FPGA) platform. We show by both FPGA-based simulations and measurements of an optical transmission system that the FEC scheme can achieve excellent error performance and that there is no significant performance degradation due to the constraint on its structure while getting an efficient, high throughput implementation is feasible.

This paper presents a digitally error-corrected pipeline analog-to-digital converter (ADC) using linearization of incomplete settling errors. A pre-charging technique is used for residue amplifiers in order to reduce the incomplete settling error itself and linearize the input signal dependency of the incomplete settling error. A technique with charge redistribution of divided capacitors is proposed for pre-charging capacitors without any additional reference sources. This linearized settling error is corrected by a first-order error approximation in digital domain with feasible complexity and cost. Simulation results show that the ADC achieves SNDR of 70 dB, SFDR of 79 dB at nyquist input frequency in a 65 nm CMOS process under 1.2 V power supply voltage for 1.2 Vp-p input signal swing. The estimated power consumption of the 12b 200 MS/s pipeline ADC using the proposed digital error correction of incomplete settling errors is 7.6 mW with a small FOM of 22 fJ/conv-step.

A rectangular drawing is a plane drawing of a graph in which every face is a rectangle. Rectangular drawings have an application for floorplans, which may have a huge number of faces, so compact code to store the drawings is desired. The most compact code for rectangular drawings needs at most 4f-4 bits, where f is the number of inner faces of the drawing. The code stores only the graph structure of rectangular drawings, so the length of each edge is not encoded. A grid rectangular drawing is a rectangular drawing in which each vertex has integer coordinates. To store grid rectangular drawings, we need to store some information for lengths or coordinates. One can store a grid rectangular drawing by the code for rectangular drawings and the width and height of each inner face. Such a code needs 4f-4 + f⌈log W⌉ + f⌈log H⌉ + o(f) + o(W) + o(H) bits*, where W and H are the maximum width and the maximum height of inner faces, respectively. In this paper we design a simple and compact code for grid rectangular drawings. The code needs 4f-4 + (f+1)⌈log L⌉ + o(f) + o(L) bits for each grid rectangular drawing, where L is the maximum length of edges in the drawing. Note that L ≤ max{W,H} holds. Our encoding and decoding algorithms run in O(f) time.

High Efficiency Video Coding (HEVC) outperforms H.264 High Profile with bitrate saving of about 43%, mostly because block sizes for hybrid prediction and residual encoding are recursively chosen using a quadtree structure. Nevertheless, the exhaustive quadtree-based partition is not always necessary. This paper takes advantage of all-zero residual blocks at every quadtree depth to accelerate the prediction and residual encoding processes. First, we derive a near-sufficient condition to detect variable-sized all-zero blocks (AZBs). For these blocks, discrete cosine transform (DCT) and quantization can be skipped. Next, using the derived condition, we propose an early termination technique to reduce the complexity for motion estimation (ME). More significantly, we present a two-dimensional pruning technique based on AZBs to constrain prediction units (PU) that contribute negligibly to rate-distortion (RD) performance. Experiments on a wide range of videos with resolution ranging from 416240 to 4k2k, show that the proposed scheme can reduce computational complexity for the HEVC encoder by up to 70.46% (50.34% on average), with slight loss in terms of the peak signal-to-noise ratio (PSNR) and bitrate. The proposal also outperforms other state-of-the-art methods by achieving greater complexity reduction and improved bitrate performance.

In this paper, through extrinsic information transfer (EXIT) band chart analysis, an adaptive iterative decoding approach (AIDA) is proposed to reduce the iterative decoding complexity and delay for finite-length differentially encoded Low-density parity-check (DE-LDPC) coded systems with multiple-symbol differential detection (MSDD). The proposed AIDA can adaptively adjust the observation window size (OWS) of the MSDD soft-input soft-output demodulator (SISOD) and the outer iteration number of the iterative decoder (consisting of the MSDD SISOD and the LDPC decoder) instead of setting fixed values for the two parameters of the considered systems. The performance of AIDA depends on its stopping criterion (SC) which is used to terminate the iterative decoding before reaching the maximum outer iteration number. Many SCs have been proposed; however, these approaches focus on turbo coded systems, and it has been proven that they do not well suit for LDPC coded systems. To solve this problem, a new SC called differential mutual information (DMI) criterion, which can track the convergence status of the iterative decoding, is proposed; it is based on tracking the difference of the output mutual information of the LDPC decoder between two consecutive outer iterations of the considered systems. AIDA using the DMI criterion can adaptively adjust the out iteration number and OWS according to the convergence situation of the iterative decoding. Simulation results show that compared with using the existing SCs, AIDA using the DMI criterion can further reduce the decoding complexity and delay, and its performance is not affected by a change in the LDPC code and transmission channel parameters.

REMUS-II (REconfigurable MUltimedia System 2) is a coarse-grained dynamically reconfigurable computing system for multimedia and communication baseband processing. This paper proposes a real-time H.264 baseline profile encoder on REMUS-II. First, we propose an overall mapping flow for mapping algorithms onto the platform of REMUS-II system and then illustrate it by implementing the H.264 encoder. Second, parallel and pipelining techniques are considered for fully exploiting the abundant computing resources of REMUS-II, thus increasing total computing throughput and solving high computational complexity of H.264 encoder. Besides, some data-reuse schemes are also used to increase data-reuse ratio and therefore reduce the required data bandwidth. Third, we propose a scheduling scheme to manage run-time reconfiguration of the system. The scheduling is also responsible for synchronizing the data communication between tasks and handling conflict between hardware resources. Experimental results prove that the REMUS-MB (REMUS-II version for mobile applications) system can perform a real-time H.264/AVC baseline profile encoder. The encoder can encode CIF@30 fps video sequences with two reference frames and maximum search range of [-16,15]. The implementation, thereby, can be applied to handheld devices targeted at mobile multimedia applications. The platform of REMUS-MB system is designed and synthesized by using TSMC 65 nm low power technology. The die size of REMUS-MB is 13.97 mm2. REMUS-MB consumes, on average, about 100 mW while working at 166 MHz. To my knowledge, in the literature this is the first implementation of H.264 encoding algorithm on a coarse-grained dynamically reconfigurable computing system.