In this paper, we propose alternate self shielding to remove critical transitions of on-chip global interconnect. Our proposed method alternates shield and signal wires cycle by cycle. The conventional self-shielding methods need additional wires to remove critical transition by encoding. The proposed alternate self-shielding, however, requires no additional wires. We evaluate our method by simulating signal transimission with a circuit simulator. As a result, our proposed method is superior in bit rate compared to others from 10% to 75%.

By applying the differential space-time block code (DSTBC) to wireless multicarrier transmission, Diggavi et al. were the first to propose the two-input-multiple-output (2IMO) differentially space-time-time block coded OFDM (TT-OFDM) system. In this paper, we propose three novel differentially transmit-diversity block coded OFDM (DTDBC-OFDM) systems, namely, the FT-, FF-, and TF-OFDM systems. For instance, the TF-OFDM stands for the differentially space-time-frequency block coded OFDM. Moreover, the noncoherent maximum-likelihood sequence detector (NSD), and its three special cases, namely, the noncoherent one-shot detector, the linearly predictive decision-feedback (DF) detector, and the linearly predictive Viterbi receiver are incorporated to the 2IMO DTDBC-OFDM systems. Furthermore, a simple closed-form BER expression for the systems utilizing the noncoherent one-shot detector in the time-varying multipath Rayleigh fading channels is given. Numerical results have revealed that 2IMO DTDBC-OFDM systems employing the noncoherent one-shot detector can obtain significant performance improvement. However, when few antennas are available, the implementation of the linearly predictive DF detector or the linearly predictive Viterbi receiver is necessary for achieving better performance.

In this paper, a multiple-pulse signaling format for M-ary equicorrelated modulation (ECM) is proposed to enable the noncoherent detection on a multiple-symbol basis. Several time-limited and band-limited basis waveform sets are designed to embody the multiple-pulse ECM signals and explored to determine the spectral performance characteristics. Based on the maximum-likelihood decision principle, a block receiver is developed for noncoherently demodulating multiple-pulse ECM signals on additive white Gaussian noise channels. Tight upper and approximate bounds are derived and verified by simulation to evaluate the bit and symbol error probability characteristics of the developed ECM block receiver. It is analytically shown that the noncoherent M-ary ECM block receiver with a small-sized blocklength offers comparable performance to the ideal coherent M-ary simplex receiver when the pairwise signal correlation is appropriately chosen. In particular, the proposed noncoherent nonbinary simplex modulation is found to strongly outperform the conventional noncoherent nonbinary orthogonal modulation in terms of both power and spectral efficiencies.

Although a proposed steganographic encoding scheme can reduce distortion caused by data hiding, it makes the system susceptible to active-warden attacks due to error spreading. Meanwhile, straightforward application of error correction encoding inevitably increases the required amount of bit alterations so that the risk of being detected will increase. To overcome the drawback in both cases, an integrated approach is introduced that combines the stego-encoding and error correction encoding to provide enhanced robustness against active attacks and channel noise while keeping good imperceptibility.

Low-density parity-check (LDPC) codes are one of the most promising next-generation error-correcting codes. For practical use, efficient methods for encoding of LDPC codes are needed and have to be studied. However, it seems that no general encoding methods suitable for hardware implementation have been proposed so far and for randomly constructed LDPC codes there have been no other methods than the simple one using generator matrices. In this paper we show that some classes of quasi-cyclic LDPC codes based on circulant permutation matrices, specifically LDPC codes based on array codes and a special class of Sridhara-Fuja-Tanner codes and Fossorier codes can be encoded by division circuits as cyclic codes, which are very easy to implement. We also show some properties of these codes.

This paper proposes a genetically inspired adaptive clustering algorithm for numerical and categorical data sets. To this end, unique encoding method and fitness functions are developed. The algorithm automatically discovers the actual number of clusters and efficiently performs clustering without unduly compromising cluster-purity. Moreover, it outperforms existing clustering algorithms.

The Reed-Solomon code is a versatile channel code pervasively used for communication and storage systems. The bit-serial Reed-Solomon encoder has a simple structure, although it is somewhat difficult to understand the algorithm without considerable theoretical background. Some professionals and students, not able to understand the algorithm thoroughly, might need to implement the bit-serial encoder for themselves. In this letter, a step-by-step method is presented for the implementation of the bit-serial encoder even without understanding the internal algorithm, which would be helpful for VHDL, DSP, and simulation programming.

Fixed polarity Reed-Muller expressions (FPRMs) exhibit several useful properties that make them suitable for many practical applications. This paper presents an exact minimization algorithm for FPRMs for incompletely specified functions. For an n-variable function with α unspecified minterms there are 2n+α distinct FPRMs, and a minimum FPRM is one with the fewest product terms. To find a minimum FPRM the algorithm requires to determine an assignment of the incompletely specified minterms. This is accomplished by using the concept of integer-valued functions in conjunction with an extended truth vector and a weight vector. The vectors help formulate the problem as an assignment of the variables of integer-valued functions, which are then efficiently manipulated by using multi-terminal binary decision diagrams for finding an assignment of the unspecified minterms. The effectiveness of the algorithm is demonstrated through experimental results for code converters, adders, and randomly generated functions.

Energy consumption is one of the most critical constraints in the current VLSI system designs. In addition, fault tolerance of VLSI systems will be also one of the most important requirements in the future shrunk VLSIs. This paper proposes practical low power and fault tolerant bus encoding methods in on-chip data transfer. The proposed encoding methods use the combination of simple low power code and fault tolerant code. Experimental results show that the proposed methods can reduce signal transitions by 23% on the bus with fault tolerance. In addition, circuit implementation results with bus signal swing optimization show the effectiveness of the proposed encoding methods. We show also the selection methodology of the optimum encoding method under the given requirements.

We considered pulse width dependence in a time-spreading Optical Code Division Multiplexing (OCDM) system using a phase encoder and decoder (127-chip, time-spreading 800 ps) by simulation. It follows that in a fully asynchronous OCDM transmission, the light source pulse width had a 20 ps degree of freedom.

The encoding process of vector quantization (VQ) is a time bottleneck preventing its practical applications. In order to speed up VQ encoding, it is very effective to use lower dimensional features of a vector to estimate how large the Euclidean distance between the input vector and a candidate codeword could be so as to reject most unlikely codewords. The three popular statistical features of the average or the mean, the variance, and L2 norm of a vector have already been adopted in the previous works individually. Recently, these three statistical features were combined together to derive a sequential EEENNS search method in [6], which is very efficient but still has obvious computational redundancy. This Letter aims at giving a mathematical analysis on the results of EEENNS method further and pointing out that it is actually unnecessary to use L2 norm feature anymore in fast VQ encoding if the mean and the variance are used simultaneously as proposed in IEENNS method. In other words, L2 norm feature is redundant for a rejection test in fast VQ encoding. Experimental results demonstrated an approximate 10-20% reduction of the total computational cost for various detailed images in the case of not using L2 norm feature so that it confirmed the correctness of the mathematical analysis.

This paper describes an on-line handwritten Japanese text recognition system that is liberated from constraints on line direction and character orientation. The recognition system first separates freely written text into text line elements, second estimates the line direction and character orientation using the time sequence information of pen-tip coordinates, third hypothetically segment it into characters using geometric features and apply character recognition. The final step is to select the most plausible interpretation by evaluating the likelihood composed of character segmentation, character recognition, character pattern structure and context. The method can cope with a mixture of vertical, horizontal and skewed text lines with arbitrary character orientations. It is expected useful for tablet PC's, interactive electronic whiteboards and so on.

Call admission control (CAC) plays a significant role in providing the efficient use of the limited bandwidth and the desired quality-of-service (QoS) in mobile multimedia communications. As efficiency is an important performance issue for CAC in the mobile networks with multimedia services, the concept of fairness among services should also be considered. Game theory provides an appropriate framework for formulating such fair and efficient CAC problem. Thus, in this paper, a framework based on game theory (both of noncooperative and cooperative games) is proposed to select fair-efficient guard bandwidth coefficients of the CAC scheme for the asymmetrical traffic case in mobile multimedia communications. The proposed game theoretic framework provides fairness and efficiency in the aspects of bandwidth utilization and QoS for multiple classes of traffic, and also guarantees the proper priority mechanism. Call classes are viewed as the players of a game. Utility function of the player is defined to be of two types, the bandwidth utilization and the weighted sum of new call accepting probability and handoff succeeding probability. The numerical results show that, for both types of the utility function, there is a unique equilibrium point of the noncooperative game for any given offered load. For the cooperative game, the arbitration schemes for the interpersonal comparisons of utility and the bargaining problem are investigated. The results also indicate that, for both types of the utility function, the Nash solution with the origin (0,0) as the starting point of the bargaining problem can achieve higher total utility than the previous CAC scheme while at the same time providing fairness by satisfying a set of fairness axioms. Since the Nash solution is determined from the domain of the Pareto boundary, the way to generate the Pareto boundary is also provided. Therefore, the Nash solution can be obtained easily.

Since the inception of Globally Asynchronous Locally Synchronous (GALS) VLSI design, GALS has been considered a promising design technique for multi-clock-domain System-on-Chip (SoC). Among the handshake protocols available for SoC design, delay insensitive (DI) handshake protocol is becoming a core technology, since it facilitates robust data transfer regardless of wire delay variation. In this paper, a new data encoding scheme Differential Value Encoding (DVE) is proposed for two-phase 1-of-N DI handshake protocol. Compared with the conventional data encoding method, the proposed scheme effectively reduces the crosstalk effect on wires sending sequentially increasing data patterns, resulting in reduction of the data transfer time. Simulation results with SPEC CPU 2000 benchmarks and sequentially increasing data pattern reveal that the DVE scheme can reduce the crosstalk effect by tens of percentage and significantly decrease the data transfer time.

Undersampling (or bandpass sampling) phase modulated signals directly at high frequency band, the harmful effects of the aperture jitter characteristics of ADCs (Analog-to-Digital converters) and sampling clock instability of the system can not be ignored. In communication systems the sampling jitter brings additional phase noise to the constellation pattern besides thermal noise, thus the BER (bit error rate) performance will be degraded. This paper examines the relationship between the input frequency to ADC and the sampling jitter in digital IF (Intermediate Frequency) downconversion receivers with undersampling scheme. This paper presents the measurement results with a real hardware prototype system as well as the computer simulation results with a theoretically modeled IF sampling receiver. We evaluated EVM (Error Vector Magnitude) in various clock jitter configurations with commonly used and reasonable cost ADCs of which sampling rates was 40 MHz. According to the results, the IF input frequencies of QPSK (16 QAM) signals were limited below around 290 (210) MHz for wireless LAN standard, and 730 (450) MHz for W-CDMA standard, respectively, in our best configuration.

This paper presents new encoding methods for the binary genetic algorithm (BGA) and new converting methods for the real-coded genetic algorithm (RCGA). These methods are developed for the specific case in which some parameters have to be searched in wide ranges since their actual values are not known. The oversampling effect which occurs at large values in the wide range search are reduced by adjustment of resolutions in mantissa and exponent of real numbers mapped by BGA. Owing to an intrinsic similarity in chromosomal operations, the proposed encoding methods are also applied to RCGA with remapping (converting as named above) from real numbers generated in RCGA. A simple probabilistic analysis and benchmark with two ill-scaled test functions are carried out. System identification of a simple electrical circuit is also undertaken to testify effectiveness of the proposed methods to real world problems. All the optimization results show that the proposed encoding/converting methods are more suitable for problems with ill-scaled parameters or wide parameter ranges for searching.

In this paper, we propose a hardware architecture of real-time JPEG encoder for 1.4 mega pixels CMOS image sensor SoC which can be applied to mobile communication devices. The proposed architecture has an efficient interface scheme with CMOS image sensor and other peripherals for real-time encoding. The JPEG encoder supports the base-line JPEG mode, and processes motion images of which resolution is up to 1280960 (CCIR601 YCrCb 4:2:2,15 fps) by real-time processing. The JPEG encoder supports 8 types of resolution, and can serve the 4 levels of image quality through quantization matrix. The proposed JPEG encoder can transfer encoded motion pictures and raw image data from CMOS image sensor to external device through USB 2.0 and a compressed still image is stored at external pseudo SRAM through SRAM interface. And proposed core can communicate parameters of encoding type with other host by I2C. The proposed architecture was implemented with VHDL and verified for the functions with Synopsys and Modelsim. The encoder proposed in this paper was fabricated in process of 0.18 µ of Hynix semiconductor Inc.

This paper describes 40-Gbit/s operation of 1.55-µm electro-absorption (EA) modulators applicable to compact and low-cost transmitters for very-short-reach (VSR) applications. We start by identifying factors that make a multi-quantum-well (MQW) design suitable for high levels of output power and for uncooled operation. From the basic experimental results, we determine that a valence-band discontinuity ΔEv at around 80 meV is optimal in terms of combining high-output-power operation and a good extinction ratio. We then apply the above findings in an InGaAsP-MQW EA modulator that is monolithically integrated with a distributed feedback (DFB) laser, and thus obtain operation with high output power (+1.2 dBm), a high ER (10.5 dB), and a low power penalty (0.4 dB after transmission over 2.6 km of single-mode-fiber). These results confirm the applicability of our EA modulator/DFB laser to VSR applications. After that, we theoretically demonstrate the superiority in terms of ER characteristics of the InGaAlAs-MQW over the conventional InGaAsP-MQW. InGaAlAs-MQW EA modulators are fabricated and demonstrate, for the first time, 40-Gbit/s operation over a wide temperature range (0 to 85).

This paper presents high-speed low-power small-area accumulator designs to be used in DDFS systems. To reduce the Numerically Controlled Oscillator (NCO) design complexity and size, only the most significant bits of the accumulator drive the phase to amplitude mapping block. Those bits need to be updated on every sampling clock, while the least significant bits of the accumulator are not visible to the rest of the DDFS design and can be updated less frequently, which motivated the development of new accumulator designs. Without performance degradation, the proposed designs relieve constraints in implementation, and hence they can be employed for GHz-range DDFS, reduce power consumption up to 82% compared to standard accumulator design, and minimize chip area. For further power reduction, the proposed designs place the phase modulation adder at the front of the accumulator.

We extend the differential space time block code (STBC) using nonconstant modulus constellations of two transmit antennas to four transmit antennas case. The proposed method obtains larger minimum Euclidean distances than those of conventional differential STBC with PSK constellations. We derive the symbol error rate (SER) performance of the proposed method and demonstrate the SER performance using computer simulations for both static and fast fading channels. For transmission rates greater than 2 bits/channel use and 3 bits/channel use, the proposed method outperforms the conventional differential STBC.