The classical supervised learning algorithms for optimizing multi-layered feedforward neural networks, such at the original back-propagation algorithm, suffer from several weaknesses. First, they have the possibility of being trapped at local minima during learning, which may lead to failure in finding the global optimal solution. Second, the convergence rate is typically too slow even if the learning can be achieved. This paper introduces a new learning algorithm which employs a genetic-type search during the learning phase of back-propagation algorithm so that the above problems can be overcome. The basic idea is to evolve the network weights in a controlled manner so as to jump to the regions of smaller mean squared error whenever the back-propagation stops at a local minimum. By this, the local minima can always be escaped and a much faster learning with global optimal solution can be achieved. A mathematical framework on the weight evolution of the new algorithm in also presented in this paper, which gives a careful analysis on the requirements of weight evolution (or perturbation) during learning in order to achieve a better error performance in the weights between different hidden layers. Simulation results on three typical problems including XOR, 3-bit parity and the counting problem are described to illustrate the fast learning behaviour and the global search capability of the new algorithm in improving the performance of back-propagated network.

Kalman filter is an essential tool in signal processing, modern control and communications. The filter estimates the states of a given system from noisy measurements, using a mean-square error criterion. Although Kalman filter has been shown to be very versatile, it has always been computationally intensive since a great number of matrix computations must be performed at each iteration. Thus the exploitation of this technique in broadband real time applications is restricted. The solution to these limitations appears to be in VLSI (very large scale integration) architectures for the parallel processing of data, in the form of systolic architectures. Systolic arrays are networks of simple processing cells connected only to their nearest neighbors. Each cell consists of some simple logic and has a small amount of local memory. Overall data flows through the array are synchronously controlled by a single main clock pulse. In parallel with the development of Kalman filter, the square root covariance and the square root information methods have been studied in the past. These square root methods are reported to be more accurate, stable and efficient than the original algorithm presented by Kalman. However it is known that standard SRIF is less efficient than the other algorithms, simply because standard SRIF has additional matrix inversion computation and matrix multiplication which are difficult to implement in terms of speed and accuracy. To solve this problem, we use the modified Faddeeva algorithm in computing matrix inversion and matrix multiplication. The proposed algorithm avoids the direct matrix inversion computation and matrix multiplication, and performs these matrix manipulations by Gauss elimination. To evaluate the proposed method, we constructed an efficient systolic architecture for standard SRIF using the COMPASS design tools. Actual VLSI design and its simulation are done on the circuits of four type processors that perform Gauss elimination and the modified Givens rotation.

Mode separation of a multiplex mode in a mode-division multiplexing system is studied. The clear, desired single-mode pattern, which is separated from the multiplex mode by using a holographic filter, is observed in the experiment.

This paper describes an image synthesis method based on an estimation of camera parameters. In order to acquire high quality images using image synthesis, we take some constraints into account, which include angle of view, synchronization of change of scale and change of viewing direction. The proposed method is based on an investigation that any camera operation containing a change of scale and a pure 3D rotation can be represented by a 2D geometric transformation. The transformation can explain all the synthesis procedure consisting of locating, synchronizing, and operating images. The procedure is described based on a virtual camera which is constituted of a virtual viewing point and a virtual image plain. The method can be efficiently implemented in such a way that each image to be synthesized undergoes the transformation only one time. The parameters in the image transformation are estimated from image sequence. The estimation scheme consists of first establishing correspondence and then estimating the parameters by fitting the correspondence data to the transformation model. We present experimental results and show the validity of the proposed method.

This paper proposes an adaptive modulation/TDMA scheme to achieve high capacity personal multi-media communication systems. TDMA is employed to cope with various bit rate for multi-media services. The modulation scheme is selected from 1/4-rate QPSK, 1/2-rate QPSK, QPSK, 16QAM and 64QAM according to the received C/IC (power ratio of the desired signal to the co-channel interference) and the delay spread. The spectral efficiency is evaluated by using the simulated bit error rate (BER) performance as well as the cumulative distribution of the C/IC with parameters of cell configurations. The results show that the spectral efficiency of the proposed scheme is 3.5 times higher than that of the conventional QPSK systems at the outage probability of 10%, and the effect is more remarkable at lower outage probability. The results also show that the proposed adaptive modulation is effective in improving delay spread immunity.

The static and dynamic characteristics of the lateral IGBT on the SOI film when the collector voltage of the IGBT is applied to the substrate are invesigated for its application to the high side switch. The measurements on the blocking capability and the switching characteristics under an inductive load are carried out with varying the thickness of the SOI film. The 260 V IGBT can be fabricated on the 5 µm thick SOI film without the special device structure. It is confirmed that the switching speed depends strongly on the SOI film thickness, not on the substrate bias. The dynamic latch-up current during the turn-off transient increases with the decrease in the SOI film thickness. This is caused by the large transient substrate current. This paper exhibits that applying the collector voltage of the IGBT to the substrate makes it possible to improve the characteristics of the IGBT on the thin SOI film.

The stability of a terminated two-port network is investigated, and the stability conditions with only one inequality are obtained. Furthermore, the stability conditions with two inequalities, which are in the same form as those for the passive terminations known at the present time, are also obtained.

Optical WDM (Wavelength Division Multiplexing) technology is a method of exploiting the huge bandwidth of optical fibers. Local lightwave networks which use fixed wavelength transmitters and receivers can be built in a multihop fashion. In multihop local lightwave networks, packets arrive at their destination by hopping a number of intermediate nodes. The channel sharing schemes for multihop lightwave networks have been proposed for efficient channel utilization, but those schemes result in the degradation of network capacity and the user throughput. In this paper, we propose an improved WDM channel sharing scheme using the logically bidirectional perfect shuffle interconnection pattern, achieving smaller number of average hops for transmission and better channel utilization efficiency. Better channel utilization efficiency is obtained without much deteriorating the network capacity and the user throughput. TDMA (Time Division Multiple Access) protocol can be used to control the sharing of channels, and time delay and lost packet probability analysis based on TDMA is performed.

An annoying problem encountered in automatic seal imprint verification is that for seal imprints may have a lot of variations, even if they are all produced from a single seal. This paper proposes a new automatic seal imprint verification system which adds an imprint quality assessment function to our previous system in order to solve this problem, and also examines the verification performance of this system experimentally. This system consists of an imprint quality assessment process and a verification process. In the imprint quality assessment process, an examined imprint is first divided into partial regions. Each partial region is classified into one of three quality classes (good quality region, poor quality region, and background) on the basis of characteristics of its gray level histogram. In the verification process, only good quality partial regions of an examined imprint are verified with registered one. Finally, the examined imprint is classified as one of two types: a genuine and a forgery. However, as a result of quality assessment, if the partial regions classified as poor quality are too many, the examined imprint is classified as ambiguous" without verification processing. A major advantage of this verification system is that this system can verify seal imprints of various qualities efficiently and accurately. Computer experiments with real seal imprints were performed by using this system, previous system (without image quality assessment function) and document examiners of a bank. The results of these experiments show that this system is superior in the verification performance to our previous system, and has a similar verification performance to that of document examiners (i.e., the experimental results show the effectiveness of adding the image quality assessment function to a seal imprint verification system).

This paper proposes a repairable and diagnosable k-valued cellular array. We assume a single fault, i.e., either stuck-at-O fault or stuck-at-(k1) fault of switches occurs in the array. By building in a duplicate column iteratively, when a stuck-at-(k1) fault occurs in the array, the fault never influences the output of the array. That is, we can construct a fault-tolerant array for the stuck-at-(k1) fault. While, for the stuck-at-O fault, the diagnosing method is simple and easy because we don't have to diagnose the stuck-at-(k1) fault. Moreover, our array can be repaired easily for the fault. The comparison with other rectangular arrays shows that our array has advantages for the number of cells and the cost of the fault diagnosis.

Multilevel RLL (Runlength Limited) sequences are analyzed. Their noiseless capacity and lower bounds on the channel capacity in the presence of additive white Gaussian noise are given. Moreover, the analytical power spectra formulae for those sequences which generalize the previously derived one for binary sequences are newly derived. We conclude from the analysis of the power spectra that multilevel RLL sequences are attractive from the point of view that they increase information rate while keeping low DC-content and self-clocking capability of binary RLL sequences.

A capacitor-error-free SC voltage inverter with zero sensitivity to element-value variations is proposed. By virtue of the capacitor-error-free property, this SC voltage inverter is free from the capacitor mismatch. The performance of this SC voltage inverter has been confirmed from both the simulation and experiment.

A novel isolation structure which has a buried insulator between polysilicon electrodes (BIPS) has been developed. The BIPS isolation employs the refilling CVD-oxides in openings between polysilicon electrodes by photoresist etchback process. Device characteristics and parasitic effects of BIPS isolation have been compared with that of LOCOS isolation. Using BIPS isolation, we can almost suppress the narrow-channel effects and achieve the deep submicron isolation. No degradation on the subthreshold decay of devices with BIPS isolation can be obtained. The use of BIPS isolation technology yields a DRAM cell of small area. The successful fabrication of deep submicron devices with BIPS isolation clearly demonstrates that this technology has superior ability to overcome the LOCOS isolation.

Recent achievements in low-voltage and low-power circuit techniques are reported in this paper. DC current in low-voltage CMOS circuits stemming from the subthreshold current in MOS transistors, is effectively reduced by applying switched-power-line schemes. The AC current charging the capacitance in DRAM memory arrays is reduced by a partial activation of array blocks during the active mode and by a charge recycle during the refresh mode. A very-low-power reference-voltage generator is also reported to control the internal chip voltage precisely. These techniques will open the way to using giga-scale LSIs in battery-operated portable equipment.

Ultrafast MR imaging (e.g., echo-planar imaging) acquires all the data within only several tens of milliseconds. This method, however, is affected by static magnetic field inhomogeneities and chemical shift; therefore, a high degree of field homogeneity and water and fat signal separation are required. However, it is practically impossible to obtain an homogeneous field within a subject even if in vivo shimming has been performed. In this paper, we describe a new ultrafast MR imaging method called Ultrafast Single-shot water and fat Separated Imaging (USSI) and a correction method for field inhomogeneities and chemical shift. The magnetic field distribution whthin the subject is measured before thd scan and used to obtain images without field inhomogeneity distortions. Computer simulation results have shown that USSI and the correction method can obtain water and fat separated images as real and imaginary parts, respectively, of a complex Fourier transform with a single-shot scan. Image quality is maintained in the presence of field inhomogeneities of several ppm similar to those occurring under practical imaging conditions. Limitations of the correction method are also discussed.

Overlapping multi-pulse pulse position modulation (OMPPM) is a modulation scheme having higher capacity and cutoff rate than other conventional modulation schemes when both off-duration between pulses shorter than a laser pulsewidth and resolution better than a laser pulsewidth are realized [1],[2]. In Refs. [1],[2] erasure events of a few chips that can be decoded correctly is defined as an erasure event. This results in lower bounds on the performance of OMPPM in optical-direct-detection channel in quantum limited case. This paper analyzes more exact performance of OMPPM in optical direct-detection channel in quantum limited case when both off-duration between pulses shorter than a laser pulsewidth and resolution better than a laser pulsewidth are realized. First we derive the error probability of OMPPM with considering what chips are detected or erased. Then we derive the capacity and the cutoff rate of OMPPM using the error probability. It is shown that OMPPM outperforms on-off keying (OOK), pulse position modulation (PPM), multi-pulse PPM (MPPM), and overlapping PPM (OPPM) in terms of both capacity and cutoff rate for the same pulsewidth and the same duty cycle. Moreover, it is shown that OMPPM with fewer slots and more pulses per block has better cutoff rate performance when the average received power per slot is somewhat large.

We present an 8-dimensional trellis-coded 8-PSK with a symbol transition constraint that is similar to that of π/4-shift quadrature phase shift keying (QPSK). This scheme can achieve a coding gain of 1.6 to 2.4 dB at the same rate of π/4-shift QPSK on Gaussian channel, and it has also an immunity against the integer multiples of 90 phase ambiguities. In order to label the constellation of the proposed scheme, a constellation partitioning algorithm is presented. This algorithm, on the basis of set partitioning, can be used to label the signal constellation with no coset structure.

In this paper we propose a new algorithm for recognizing 3-D objects from 2-D images. The algorithm takes the multiple view approach in which each 3-D object is modeled by a collection of 2-D projections from various viewing angles where each 2-D projection is called an object model. To select the candidates for the object model that has the best match with the input image, the proposed algorithm computes the surface matching score between the input image and each object model by using Hopfield nets. In addition, the algorithm gives the final matching error between the input image and each candidate model by the error of the pose-transform matrix proposed by Hong et al. and selects an object model with the smallest matching error as the best matched model. The proposed algorithm can be viewed as a combination of the algorithm of Lin et al. and the algorithm of Hong et al. However, the proposed algorithm is not a simple combination of these algorithms. While the algorithm of Lin et al. computes the surface matching score and the vertex matching score berween the input image and each object model to select the candidates for the best matched model, the proposed algorithm computes only the surface matching score. In addition, to enhance the accuracy of the surface matching score, the proposed algorithm uses two Hopfield nets. The first Hopfield net, which is the same as that used in the algorithm of Lin et al., performs a coarse matching between surfaces of an input image and surfaces of an object model. The second Hopfield net, which is the one newly proposed in this paper, establishes the surface correspondences using the compatibility measures between adjacent surface-pairs of the input image and the object model. the results of the experiments showed that the surface matching score obtained by the Hopfield net proposed in this paper is much more useful for the selectoin of the candidates for the best matched model than both the sruface matching score obtained by the first Hopfield net of Lin et al. and the vertex matching score obtained by the second Hopfield net of Lin et al. and, as the result, the object recognition algorithm of this paper can perform much more reliable object recognition than that obtained by simply combining the algorithm of Lin et al. and the algorithm of Hong et al.

The newly developed high speed DRAMs are introduced and their innovative circuit techniques for achieving a high data bandwidth are described; the synchronous DRAM, the cache DRAM and the Rambus DRAM. They are all designed to fill the performance gap between MPUs and the main memory of computer systems, which will diverge in '90s. Although these high speed DRAMs have the same purpose to increase the data bandwidth, their approaches to accomplish it is different, which may in turn lead to some advantages or disadvantages as well as their fields of applications. The paper is intended not only to discuss them from technical overview, but also to be a guide to DRAM users when choosing the best fitting one for their systems.

In this paper, trellis coded modulation with bandwidth expansion is examined. The proposed scheme is a modified Symbol-rate-increased TCM [3]-[5], which allows the bandwidth expansion ratio to be varied to an arbitrary value. The Symbol-rate-increased TCM has been shown to be a particular case of the proposed scheme. Simulation results have clarified that the proposed scheme achieves a significant improvement over an uncoded scheme in an AWGN channel.