We present a realization of the transparent wave absorber effective for the use at V-band frequency. First, we propose a structure of the transparent wave absorber consisting of spacer (polycarbonate) and two transparent resistive sheet (polyethylene terephtalate deposited with Indium Tin Oxide) used as a reflection film and an absorption film. Second, a design chart for this type of wave absorber is shown. Third, a design method and manufacturing process of the transparent wave absorber are described particularly for V-band frequency. As a result, the measurement of reflection loss of the absorber indicate that a peak absorption of 32-38 dB is attained at a target frequency of 60 GHz.

This paper describes a new high resolution algorithm for the two-dimensional (2-D) frequency estimation problem, which, in particular, is noise insensitive in view of the fact that in many practical applications the contaminated noise may not be white noise. For this purpose, the approach is set in the context of higher-order statistics (HOS), which has demonstrated to be an effective approach under a colored noise environment. The algorithm begins with the consideration of the fourth-order moments of the available 2-D data. Two auxiliary matrices, constituted by a novel stacking of the diagonal slice of the computed fourth-order moments, are then introduced and through which the two frequency components can be precisely determined, respectively, via matrix factorizations along with the subspace rotational invariance (SRI) technique. Simulation results are also provided to verify the proposed algorithm.

In this paper a new general method for approximation of arbitrary multiband filter loss specifications, including all classical, maximally flat and equiripple approximations as special cases, is proposed. It is possible to specify different magnitude behavior (flat or equiripple of given degree) and different maximal losses in the different passbands and to optimize all transmission and attenuation zeroes positions or to have some of them fixed. The optimization procedures for adjustment of the filter response are based on modified Remez algorithm and are performed in s-domain what is regarded since recently as an advantage in the case of design of parallel allpass structures based IIR digital filters. A powerful algorithm and appropriate software are developed following the method and their efficiency is verified through design examples.

This paper deals with a set of differential operators for calculating the differentials of an observed signal by the Daubechies wavelet and its application for the estimation of the transfer function of a linear system by using non-stationary step-like signals. The differential operators are constructed by iterative projections of the differential of the scaling function for a multiresolution analysis into a dilation subspace. By the proposed differential operators we can extract the arbitrary order differentials of a signal. We propose a set of identifiable filters constructed by the sum of multiple filters with the first order lag characteristics. Using the above differentials and the identifiable filters we propose an identification method for the transfer function of a linear system. In order to ensure the appropriateness and effectiveness of the proposed method some numerical simulations are presented.

In this paper, we apply the Semi-markov Memory and Cache coherence Interference (SMCI) model, which we had proposed for invalidating based cache coherent parallel computers, to an updating based protocol. The model proposed here, the SMCI/Dragon model, can predict performance of cache coherent parallel computers with the Dragon protocol as well as the original SMCI model for the Synapse protocol. Conventional analytic models by stochastic processes to describe parallel computers have the problem of numerical explosion in the number of states necessary as the system size increases. We have already shown that the SMCI model achieved both the small number of states to describe parallel computers with the Synapse protocol and the inexpensive computation cost to predict their performance. In this paper, we demonstrate generality of the SMCI model by applying it to the another cache coherence protocol, Dragon, which has opposite characteristics than Synapse. We show the number of states required by constructing the SMCI/Dragon model is only 21 which is as small as SMCI/Synapse, and the computation cost is also the order of microseconds. Using the SMCI/Dragon model, we investigate several comparative experiments with widely known simulation results. We found that there is only a 5. 4% differences between the simulation and the SMCI/Dragon model.

This paper presents a new architecture for multiple-input signature analyzers. The proposed signature analyzer with Hδ inputs is designed by parallelizing a GLFSR(δ,m), where δ is the number of input signals and m is the number of stages in the feedback shift register. The GLFSR, developed by Pradhan and Gupta, is a general framework for representing LFSR-based signature analyzers. The parallelization technique described in this paper can be applied to any kind of GLFSR signature analyzer, e. g. , SISRs, MISRs, multiple MISRs and MLFSRs. It is shown that a proposed signature analyzer with Hδ inputs requires less complex hardware than either single GLFSR(Hδ,m)s or a parallel construction of the H original GLFSR(δ,m)s. It is also shown that the proposed signature analyzer, while requiring simpler hardware, has comparable aliasing probability with analyzers using conventional GLFSRs for some CUT error models of the same test response length and test time. The proposed technique would be practical for testing CUTs with a large number of output sequences, since the test circuit occupies a smaller area on the LSI chip than the conventional multiple-input signature analyzers of comparable aliasing probability.

This paper presents some fundamental properties of multiple-valued logic functions monotonic in a partial-ordering relation which is introduced in the set of truth values and does not necessarily have the greatest or least element. Two kinds of necessary and sufficient conditions for monotonic p-valued functions are given with the proofs. Their logic formulas using unary operators defined in the partial-ordering relation and a simplification method for those logic formulas are also given. These results include as their special cases our former results for p-valued functions monotonic in the ambiguity relation which is a partial-ordering relation with the greatest element.

Let G = (A, B, E) be a bipartite graph with bipartition (A:B) of vertex set and edge set E. For each vertex v, Γ(v) denotes the set of adjacent vertices to v. G is said to be t-convex on the vertex set A if there is a tree and a one-to-one correspondence between vertices in A and edges of the tree such that for each vertex b B the edges of the tree corresponding to vertices in Γ(b) form a path on the tree. G is doubly t-convex if it is convex both on vertex set A and on B. In this paper, we show that, the class of doubly t-convex graphs is exactly the class of bipartite circle graphs.

As a super class of tournament digraphs, Bang-Jensen, Huang and Prisner defined an in-tournament digraph (in-tournament for short) and investigated a number of its nice properties. The in-tournament is a directed graph in which the set of in-neighbors of every vertex induces a tournament digraph. In other words, the presence of arcs (x,z) and (y,z) implies that exactly one of (x,y) or (y,x) exists. In this paper, we propose, for in-tournaments, parallel algorithms for examining the existence of a Hamiltonian path and a Hamiltonian cycle and for constructing them, if they exist.

In a secure partially blind signature scheme, the signer assures that the blind signatures issued by him contains the information he desires. The techniques make it possible to minimize the unlimited growth of the bank's database which storing all spent electronic cash in an anonymous electronic cash system. In this paper we propose an efficient partially blind signature scheme for electronic cash. In our scheme, only several modular additions and modular multiplications are required for a signature requester to obtain and verify a signature. It turns out that the proposed scheme is suitable for mobile clients and smart-card applications because no time-consuming computations are required, such as modular exponentiation and inverse computations. Comparing with the existing blind signature schemes proposed in the literatures, our method reduces the amount of computations for signature requesters by almost 98%.

The exact expected test lengths of pseudo-random patterns that are generated by LFSRs are theoretically analyzed for a CUT containing hard random-pattern-resistant faults. The exact expected test lengths are also analyzed when more than one primitive polynomials are selected.

Let H=(V(H),E(H)) be a directed graph with distinguished vertices s and t. An st-path in H is a simple directed path starting from s and ending at t. Let (H) be defined as { SS is the set of vertices on an st-path in H (s and t are excluded)}. For an undirected graph G=(V(G),E(G)) with V(G) V(H)- { s,t }, if the family of maximal independent sets of G coincides with (H), we call H an MIS-diagram for G. In this paper, we provide a necessary and sufficient condition for a directed graph to be an MIS-diagram for an undirected graph. We also show that an undirected graph G has an MIS-diagram iff G is a cocomparability graph. Based on the proof of the latter result, we can construct an efficient algorithm for generating all maximal independent sets of a cocomparability graph.

A programmable DSP with linear array architecture for real-time video processing is reported. It achieves a processing rate of 5. 4 GOPS and 81GB/s memory bandwidth using Dual Sense Amplifier architecture. A low-power-supply pipeline decreases power consumption and a time shared bit-line reduces chip area. It has 4320 processor elements and a 1. 1 Mbit 3-port memory. The DSP can be applied to HDTV signals with its 75 MHz peak I/O rate. Sufficient programmability is provided to execute video format conversion such as image size conversion and Y/C separation, and picture quality improvement such as noise reduction and image enhancement. The chip was fabricated using 0. 4 µm CMOS triple metal technology with a 15. 12 mm 14. 95 mm die. It operates at 50 MHz and consumes 0. 53 W/GOPS at 3. 3 V.

We have developed and fabricated an LSI called the FMPP-VQ64. The LSI is a memory-based shared-bus SIMD parallel processor containing 64 PEs, intended for low bit-rate image compression using vector quantization. It accelerates the nearest neighbor search (NNS) during vector quantization. The computation time does not depend on the number of code vectors. The FMPP-VQ64 performs 53,000 NNSs per second, while its power dissipation is 20 mW. It can be applied to the mobile telecommunication system.

Bursts from a number of variable bit rate sources allocated to a virtual path with a given capacity can inundate the channel. Buffers used to take care of such bursts can fill up rapidly. The buffer size limits its burst handling capability. With large bursts or a number of consecutive bursts, the buffers fill up and this leads to high cell losses. Channel reconfiguration with dynamic allocation of spare capacities is one of the methods used to alleviate such cell losses. In reconfigurable networks, spare capacity allocation can increase the channel rates for short durations, to cope with the excess loads from the bursts. The dynamic capacity allocations are adaptable to the loads and have fast response times. We propose heuristic rules for spare capacity assignments in ATM networks. By monitoring buffer occupancy, triggers which anticipate excess traffic can be used to assign spare capacities to reduce the cell loss probabilities in the network.

In this letter, a design method of linear-phase paraunitary filter banks is proposed for an odd number of channels. In the proposed method, a non-linear unconstrained optimization process is assumed to be applied to a lattice structure which makes the starting guess of design parameters simple. In order to avoid insignificant local minimum solutions, a recursive initialization procedure is proposed. The significance of our proposed method is verified by some design examples.

A multimedia coding standard, MPEG4 has frozen its Committee Draft (CD) as the MPEG4 version 1 CD, last October. It defines Audio-Visual (AV) coding Algorithms and their System Multiplex/Composition formats. Founding on Object-base concept, Video part adopts Shape Coding technology in addition to conventional Texture Coding skills. Audio part consists of voice coding tools (HVXC and CELP core) and audio coding tools (HILN and MPEG2 AAC or Twin VQ). Error resilience technologies and Synthetic and Natural Hybrid Coding (SNHC) technologies are the MPEG4 specific features. System part defines flexible Multiplexing of audio-visual bitstreams and Scene Composition for user-interactive re-construction of the scenes at decoder side. The version 1 standardization will be finalized in 1998, with some possible minute changes. The expected application areas are real-time communication, mobile multimedia, internet/intranet accessing, broadcasting, storage media, surveillance, and so on.

We propose Direct Sequence CDMA with Optical Multicarriers and Parallel Forward Error Correcting (PFEC) coding technique. Proposed DS-CDMA with OPTICAL MULTICARRIERS, is new in lightwave systems and its alliance with PARALLEL FEC codes, makes it further unique. Optical multicarriers approach is effective to increase throughput by combating dispersion and ISI (Intersymbol Interference), whereas FEC is effective to increase reliability by diluting interactions among optical multicarriers. Till now, both the techniques in lightwave systems have been discouraged. The former because of the wandering effect of optical multicarriers owing to unstability of laser diodes and later because it involves insertion of parity bits that changes data rate and results in insertion distortion that is not desirable in optical systems. To avoid change due to spreading code we also propose to take spreading code equal to serial to parallel converted streams. It bounds initial data (before S/P conversion) to data per carrier (after S/P conversion and spreading) on one hand and relaxes the requirement of high speed electronics on the other. The alliance of optical multicarriers with suitably applied FEC that we refer as Parallel FEC (PFEC) is effective as the beneficial aspects of each mitigate the shortcomings of the other and make the system practicable. Theoretical treatment confirms that the proposed approach is fundamentally sound and holds the potential for promising network performance.

In indoor optical channels, intersymbol interference (ISI) due to multipath propagation prevents high data rate transmission. In this paper, a new Optical Multi-Wavelength Modulation technique has been investigated for improving the quality of transmission. In this technique, parallel transmission is used, which lowers the data rate per channel and thus reduces the effects of ISI. Furthermore, parallel coding is used in predetermined parallel branches, so that coding can correct errors without changing the system data rate. Simulation results show that a combination of these methods can achieve high quality transmission without reduction of the total data rate.

Many Ziv-Lempel algorithms have a similar property, that is, slow encoding and fast decoding. This paper proposes a simple improved Ziv-Lempel algorithm to encode a large amount of data quickly as well as compactly by using multiple-processor system.