Resonant properties of resistively shunted tunnel junctions dominate the high-frequency performance of Josephson array oscillators. To improve the operating frequency, we have developed resistively shunted Nb/AlOx/Nb tunnel junctions with a small parasitic inductance. The inductance was minimized by reducing the inductive length between the tunnel junction and the contact hole to be about 1µm. By fitting the measured I-V characteristics of the shunted tunnel junction to the simulated characteristics, we estimated the inductance to be about 105 fH. The analysis of resonant properties showed that the shunted tunnel junctions with the small parasitic inductance have a high-frequency performance up to the Nb gap frequency. Josephson array oscillators using 11 such junctions were designed and fabricated to operate at 650 GHz and 1 THz. Shapiro steps induced by Josephson oscillation were clearly observed up to 1 THz. By fitting the step heights to the simulated results, we estimated the output power of the Josephson oscillator delivered to the load resistor to be about 10 µW at 625 GHz and 50 nW at 1 THz.

A reconfiguration method for processor array is proposed in this paper. In the method, genetic algorithm (GA) is used for searching effective spare arrangement, which leads to successful reconfiguration. The effectiveness of the method is demonstrated by computer simulations.

In this paper we describe the pipeline design and enhanced hardware for fast message handling in a RICA-1 processor, a processing element (PE) in the RWC-1 multiprocessor. The RWC-1 is based on the reduced inter-processor communication architecture (RICA), in which communications are combined with computation in the processor pipeline. The pipeline is enhanced with hardware mechanisms to support fine-grain parallel execution. The data paths of the RICA-1 super-scalar processor are commonly used for communication as well as instruction execution to minimize its implementation cost. A 128-PE system has been built on January 1998, and it is currently used for hardware debugging, software development and performance evaluation.

In order to improve microprocessor performance, we propose to utilize histories of dynamic instruction sequences. A lot of special purpose memories integrated in a processor chip hold the histories. In this paper, we describe the usefulness of using two special purpose memories: Non-Consecutive basic block Buffer (NCB) and Reference Prediction Table (RPT). The NCB improves instruction fetching efficiency in order to relieve control dependences. The RPT predicts data addresses in order to speculate data dependences. From the simulation study, it has been found that the proposed mechanisms improve processor performance by up to 49. 2%.

This paper proposes an object oriented face region detection and tracking method using range color information. Range segmentation of the objects are obtained from the complicated background using disparity histogram (DH). The facial regions among the range segmented objects are detected using skin-color transform technique that provides a facial region enhanced gray-level image. Computationally efficient matching pixel count (MPC) disparity measure is introduced to enhance the matching accuracy by removing the effect of the unexpected noise in the boundary region. Redundancy operations inherent in the area-based matching operation are removed to enhance the processing speed. For the skin-color transformation, the generalized facial color distribution (GFCD) is modeled by 2D Gaussian function in a normalized color space. Disparity difference histogram (DDH) concept from two consecutive frames is introduced to estimate the range information effectively. Detailed geometrical analysis provides exact variation of range information of moving object. The experimental results show that the proposed algorithm works well in various environments, at a rate of 1 frame per second with 512 480 resolution in general purpose workstation.

We present a cascade neural network for blind source extraction. We propose a family of unconstrained optimization criteria, from which we derive a learning rule that can extract a single source signal from a linear mixture of source signals. To prevent the newly extracted source signal from being extracted again in the next processing unit, we propose another unconstrained optimization criterion that uses knowledge of this signal. From this criterion, we then derive a learning rule that deflates from the mixture the newly extracted signal. By virtue of blind extraction and deflation processing, the presented cascade neural network can cope with a practical case where the number of mixed signals is equal to or larger than the number of sources, with the number of sources not known in advance. We prove analytically that the proposed criteria both for blind extraction and deflation processing have no spurious equilibria. In addition, the proposed criteria do not require whitening of mixed signals. We also demonstrate the validity and performance of the presented neural network by computer simulation experiments.

In this paper, a two-dimensional (2-D) binary-valued (BV) lapped transform (LT) is proposed. The proposed LT has basis images which take only BV elements and satisfies the axial-symmetric (AS) property. In one dimension, there is no 2-point LT with the symmetric basis vectors, and the property is achieved only with the non-overlapping basis which the Hadamard transform (HT) has. Hence, in two dimension, there is no 22-point separable ASLT, and only 2-D HT can be the 22-point separable AS orthogonal transform. By taking non-separable BV basis images, this paper shows that a 22-point ASLT can be obtained. Since the proposed LT is similar to HT, it is referred to as the lapped Hadamard transform (LHT). LHT of larger size is shown to be provided with a tree structure. In addition, LHT is shown to be efficiently implemented by a lattice structure.

Image restoration using estimated parameters of image model and noise statistics is presented. The image is modeled as the output of a 2-D noncausal autoregressive (NCAR) model. The parameter estimation process is done by using the autocorrelation function and a biased term to a conventional least-squares (LS) method for the noncausal modeling. It is shown that the proposed method gives better results than the other parameter estimation methods which ignore the presence of the noise in the observation data. An appropriate image model selection process is also presented. A genetic algorithm (GA) for solving a multiobjective function with single constraint is discussed.

In this work, we give a true concurrency semantics for FIFO-nets, that are Petri nets in which places behave as queues, tokens take values in a finite alphabet and the firing of a transition depends on sequences on the alphabet. We introduce fn-processes to represent the concurrent behavior of a FIFO-net N during a sequence of transition firings. Fn-processes are modeled by a mapping from a simple FIFO-net without queue sharing and cycles, named FIFO-occurrence net, to N. Moreover, the relation among the firings expressed by the FIFO-occurrence net has been enriched by an ordering relation among the elements of the FIFO-occurrence net representing values entered into a same queue of N. We give a way to build fn-processes step by step in correspondance with a sequence of transition firings and the fn-processes operationally built are all those abstractly defined. The FIFO-occurrence nets of fn-processes have some interesting properties; for example, such nets are always discrete and, consequently, there is at least a transition sequence corresponding to each fn-process.

In this paper, the performances of texture classification based on pyramidal and uniform decomposition are comparatively studied with and without feature selection. This comparison using the subband variance as feature explores the dependence among features. It is shown that the main problem when employing 2-D non-separable wavelet transforms for texture classification is the determination of the suitable features that yields the best classification results. A Max-Max algorithm which is a novel evaluation function based on genetic algorithms is presented to evaluate the classification performance of each subset of selected features. It is shown that the performance with feature selection in which only about half of features are selected is comparable to that without feature selection. Moreover, the discriminatory characteristics of texture spread more in low-pass bands and the features extracted from the pyramidal decomposition are more representative than those from the uniform decomposition. Experimental results have verified the selectivity of the proposed approach and its texture capturing characteristics.

In this paper, we give a solution to the problem of conflict-free access of various slices of data in parallel processor for image processing. Image processing operations require a memory system that permits parallel and conflict-free access of rows, columns, forward diagonals, backward diagonals, and blocks of two-dimensional image array for an arbitrary location. Linear skewing schemes are useful methods for those requirements, but these schemes require complex Euclidean division by prime number. On the contrary, nonlinear skewing schemes such as XOR-schemes have more advantages than the linear ones in address generation, but these schemes allow conflict-free access of some array slices in restricted region. In this paper, we propose a new XOR-scheme which allows conflict-free access of arbitrarily located various slices of data for image processing, with a two-fold the number of memory modules than that of processing elements. Further, we propose an efficient data alignment network which consists of log N + 2-stage multistage interconnection network utilizing Omega network.

We will present a partial scan design method based on n-fold line-up structures in order to achieve high fault efficiency and reduce test pattern generation time for practical LSIs. We will also present a partial scan design method based on the state justification of pure load/hold FFs in order to achieve high fault efficiency and reduce the number of scan FFs for practical LSIs with lots of load/hold FFs. Experimental results for practical LSIs show that our presented methods can achieve high fault efficiency (more than 99%) and reduce the number of scan FFs for the LSI with lots of load/hold FFs.

The advantage of random testing is that test application can be performed at a low cost in the BIST scheme. However, not all circuits are random pattern testable due to the existence of random pattern resistant faults. In this paper, we present a method for improving the random pattern testability of logic circuits by partial circuit duplication approach. The basic idea is to detect random pattern resistant faults by using the difference between the duplicated part of a circuit and the original part. Experimental results on benchmark circuits show that high fault coverage can be achieved with a very small amount of hardware overhead.

This paper presents a new algorithm that can solve the problem of selecting appropriate update step size in the LMS algorithm. The proposed algorithm, called a Complementary Pair LMS (CP-LMS) algorithm, consists of two adaptive filters with different update step sizes operating in parallel, one filter re-initializing the other with the better coefficient estimates whenever possible. This new algorithm provides the faster convergence speed and the smaller steady-state error than those of a single filter with a fixed or variable step size.

Unique characteristics such as quenching of photoluminescence and improvement of photovoltaic effect were observed in acceptor polymer, (cyano-substituted poly (p-phenylene vinylene)), CN-PPV/donor polymer (poly(3-hexylthiophene), P3HT composites. By taking account of the difference in electronic energy states of both CN-PPV and P3HT, these characteristics are interpreted in terms of photoinduced charge transfer between CN-PPV and P3HT and formation of fractal network.

Comparative performance evaluation between parallel combinatory CDMA (PC-CDMA) and Direct Sequence CDMA (DS-CDMA) has been conducted for high speed radio communication up to 2 Mbps under a multipath Rayleigh fading environment. For both DS-CDMA and PC-CDMA, user information rate per code of 128 kbps, convolutional code with 1/2 coding rate, the same bit interleaving and QPSK data modulation are applied to get transmission symbol rate of 128 ksps. The chip rate of 4. 096 Mcps is used to investigate the possibility of 2 Mbps transmission using only 5 MHz bandwidth. So the spreading factor of the spreading code is 32 for DS-CDMA. In PC-CDMA, 128 ksps data stream is divided into four 32 ksps data streams and according to the every four bits pattern, corresponding spreading code of spreading factor of 128 and its polarity are selected out of eight candidate spreading codes. In soft decision Viterbi decoding applied to PC-CDMA, branch metric is calculated for every bit by weighting the output levels of the PC-CDMA correlators for eight candidate spreading codes. By computer simulation under vehicular environment model with six multipaths, it has been shown that PC-CDMA can offer more capacity approximately by double than DS-CDMA for both downlink and uplink under the condition such as for vehicular for BER of 10-3, and 2 Mbps transmission per cell for downlink is possible not only in isolated cell condition but also in omni cell condition by PC-CDMA.

We have studied the basic optical and physical characteristics of polymeric optical waveguide films with S-shaped waveguides and 45 mirrors applied as multimode optical interconnection components. The core and cladding of the waveguide films were made of deuterated-polymethylmethacrylate (d-PMMA) and UV-cured resin, respectively. We evaluated the insertion losses of the waveguides, the crosstalk and the 45-mirror losses in these waveguide films and demonstrated that they have low propagation loss. The shrinkage and thermal expansion of the polymeric optical waveguide films are also discussed because of the interest in improving module packaging.

From an information geometric viewpoint, we investigate a characteristic of the submanifold of a mixture or exponential family in the manifold of finite discrete distributions. Using the characteristic, we derive a direct calculation method for an em-geodesic in the submanifold. In this method, the value of the primal parameter on the geodesic can be obtained without iterations for a gradient system which represents the geodesic. We also derive the similar algorithms for both problems of parameter estimation and functional extension of the submanifold for a data in the ambient manifold. These theoretical approaches from geometric analysis will contribute to the development of an efficient algorithm in computational complexity.

Parallel Transaction Processing (TP) systems have great potential to serve the ever-increasing demands for high transaction processing rate. This potential, however, may not be reached due to the data contention and the widely-used two-phase locking (2PL) Concurrency Control (CC) method. In this paper, a distributed locking-based CC policy called LWDC (Local Wait-Depth Control) was proposed for dealing with this problem for the shared-nothing parallel TP system. On the basis of the LWDC policy, an algorithm called LWDCk was designed. Using simulation LWDCk was compared with the 2PL and the base-line Distributed Wait-Depth Limited (DWDL) CC methods. Simulation studies show that the new algorithm offers better system performance than those compared.

In this paper, we apply the Semi-markov Memory and Cache coherence Interference (SMCI) model, which we had proposed for invalidating based cache coherent parallel computers, to an updating based protocol. The model proposed here, the SMCI/Dragon model, can predict performance of cache coherent parallel computers with the Dragon protocol as well as the original SMCI model for the Synapse protocol. Conventional analytic models by stochastic processes to describe parallel computers have the problem of numerical explosion in the number of states necessary as the system size increases. We have already shown that the SMCI model achieved both the small number of states to describe parallel computers with the Synapse protocol and the inexpensive computation cost to predict their performance. In this paper, we demonstrate generality of the SMCI model by applying it to the another cache coherence protocol, Dragon, which has opposite characteristics than Synapse. We show the number of states required by constructing the SMCI/Dragon model is only 21 which is as small as SMCI/Synapse, and the computation cost is also the order of microseconds. Using the SMCI/Dragon model, we investigate several comparative experiments with widely known simulation results. We found that there is only a 5. 4% differences between the simulation and the SMCI/Dragon model.