Within the framework of a previously proposed vision system, a new part-segmentation algorithm, that breaks an object defined by its contour into its constituent parts, is presented. The contour is assumed to be obtained using an edge detector. This decomposition is achieved in two stages. The first stage is a preprocessing step which consists of extracting the convex dominant points (CDPs) of the contour. For this aim, we present a new technique which relaxes the compromise that exists in most classical methods for the selection of the width of the Gaussian filter. In the subsequent stage, the extracted CDPs are used to break the object into convex parts. This is performed as follows: among all the points of the contour only the CDPs are moved along their normals nutil they touch another moving CDP or a point on the contour. The results show that this part-segmentation algorithm is invariant to transformations such as rotation, scaling and shift in position of the object, which is very important for object recognition. The algorithm has been tested on many object contours, with and without noise and the advantages of the algorithm are listed in this paper. Our results are visually similar to a human intuitive decomposition of objects into their parts.

This paper presents a new method for constructing orthonormal wavelet bases with vanishing moments based on general IIR filters. It is well-known that orthonormal wavelet bases can be generated by paraunitary filter banks. Then, synthesis of orthonormal wavelet bases can be reduced to design of paraunitary filter banks. From the orthonormality and regularity of wavelets, we derive some constraints to IIR filter banks, and investigate relations between the constrained filter coefficients and its zeros and poles. According to these relations, we can apply Remez exchange algorithm in stopband directly, and formulate the design problem in the form of an eigenvalue problem. Therefore, a set of filter coefficients can be easily computed by solving the eigenvalue problem, and the optimal filter coefficients with an equiripple response can be obtained after applying an iteration procedure. The proposed procedure is computationally efficient, and the number of vanishing moments can be arbitrarily specified.

This paper presents a clock routing technique called Balanced-Mesh Method (BMM) which incorporates the advantages of two famous conventional-clock-routing techniques. One is the balanced-tree method (BTM) where the clock net is routed as a tree so that the delay times of clock signal are balanced, and the other is the fixed-mesh method (FMM) where the clock net is routed as a fixed mesh driven by a large buffer. In BMM, the clock net is routed as a set of relatively small meshes of interconnects driven by relatively small buffers. Each mesh covers an area called a Mesh-Routing Region (MR) in which its delay and skew can be suppressed within a certain range. These small meshes are connected by a balanced tree with the chip clock source as its root. To implement BMM, we developed an MR-partitioning program that partitions the circuit into MR's according to a set of pre-determined constraints on the number of flip-flops and the area in each MR, and a clock-global-routing program that provides each mesh routing and the tree routing connecting meshes. We applied BMM to the design of an MPEG2-encoder LSI and achieved a skew of 210ps. In addition, the experimental results show BMM yields the lowest power dissipation compared to conventional methods.

We previously proposed a robust hybrid edge detector which relaxes the trade off between robustess against noise and accurate localization of the edges. This hybrid detector separates the tasks of localization and noise suppresion between two sub-detectors. In this paper, we present an extension to this hybrid detector to determine its optimal parameters, independently of the scene. This extension defines a probabilistic cost function using for criteria the probability of missing an edge buried in noise and the probability of detecting false edges. The optimization of this cost function allows the automatic selection of the parameters of the hybrid edge detector given the height of the minimum edge to be detected and the variance of the noise, σ2n. The results were applied to the 2D case and the performance of the adaptive hybrid detector was compared to other detectors.

The parameter estimation problem of point spread function is one of the most challenging and important task for image restoration. A new method for the parameter estimation in the case of motion blur is presented here. It is based on the principle that the power spectrum of the motion blurred image contains periodical minima relevant directly to the motion derection and length. Though the principle is very simple and effective in certain cases, the direct use of it may lead to poor performance an the signal-to-noise ratio (SNR) gets lower. To improve the estimation accuracy, by analyzing image noise effect on the detection of the minima, we propose a method to greatly reduce spectral noise, and give the lowest allowed SNR at which the minima may still be identified reliably. We also estimate the power spectrum of the original image, which is a must for the Wiener restoration filter, from the noisy blurred image based on a noncasual autoregressive model. Once above parameters are decided, the Wiener filter is used to restore the noisy blurred image. Our method is very practical; no parameter needs to be known a priori, or to be adjusted manually to fit into various application problems. The proposed method is finally applied to systhesized and real motion blurred images to demonstrate its effectiveness.

Maximal-ratio combining (MRC), which maximizes the carrier to noise ratio (CNR) of the combined signal, generally requires envelope detection and multiplication having linear characteristic over a wide dynamic range to generate a weighting factor for each branch. In this paper, we propose a simplified two-branch diversity combining scheme without linear envelope detection. The proposed scheme, called "level comparison weighted combining (LCWC),"is simplified in a manner that its weighting factor for each branch is generated from hard-decision results of comparing signal envelopes between two branches. Performance of LCWC is evaluated by computer simulation and laboratory experiment, which shows that its diversity gain is almost identical to that of MRC in a Rayleigh fading channel.

A lot of optimum filters have been proposed for an image restoration problem. Parametric filter, such as Parametric Wiener Filter, Parametric Projection Filter, or Parametric Partial Projection Filter, is often used because it requires to calculate a generalized inverse of one operator. These optimum filters are formed by a degradation operator, a covariance operator of noise, and one of original images. In practice, these operators are estimated based on empirical knowledge. Unfortunately, it happens that such operators differ from the true ones. In this paper, we show the unified formulae of inducing them to clarify their common properties. Moreover, we investigate their properties for perturbation of a degradation operator, a covariance operator of noise, and one of original images. Some numerical examples follow to confirm that our description is valid.

This paper presents a method to analyze and minimize output errors of 2-D non-separable FIR filters with finite wordlength. Finiteness in the wordlength causes output errors, which can be analyzed in the frequency domain when the statistics of input signals are known. The output errors can be minimized by optimizing responses corresponding to all levels of input impulses. A new ROM-based filter structure is proposed in which the optimized impulse responses are stored in the ROM. The output signals are generated by superposing the impulse responses corresponding to the input levels. Many simulation results confirm that the output signals of the proposed filters have far less errors compared to conventional filters. The hardware size of the ROM-based filters is estimated and compared with that of conventional structures. The proposed structures are more effective than the conventional ones especially when the signal wordlength is short.

This paper proposes a novel FEC (forward error correction) scheme for high-speed wireless systems aiming at mobile computing applications. The proposed scheme combines inner nonredundant error correction with outer parallel encoding random FEC for differentially detected QPSK (quadrature phase shift keying) signals. This paper, first, examines error patterns after the differential detection with nonredundant error correction and reveals that particular double symbol errors occur with relatively high probability. To improve the outer FEC performance degradation due to the double symbol errors, the proposed scheme uses I and Q channel serial to parallel conversion in the transmission side and parallel to serial conversion in the receiving side. As a result, it enables to use simple FEC for the outer parallel encoding random FEC without interleaving. Computer simulation results show the proposed scheme employing one bit correction BCH coding obtains a required Eb/No improvement of 1.2 dB at a Pe of 10-5 compared to that with the same memory size interleaving in an AWGN environment. Moreover, in a Rician fading environment where directional beam antennas are assumed to be used to improve the degradation due to severe multipath signals, an overall Eb/No improvement at Pe of 10-5 of 3.0 dB is achieved compared to simple differential detection when the condition of delay spread of 5 nsec, carrier to multipath signal power ratio of 20 dB and Doppler frequency at 20 GHz band of 150 Hz.

We propose a soft decision Viterbi decoding scheme and a self-interference cancellation method applicable to a Parallel Combinatory CDMA (PC-CDMA) system. In this decoding scheme, branch metric is calculated for every bit by weighting the output levels of the PC-CDMA correlators so as to enable an effective soft decision capability to the system. The effectivity of this scheme is then further enhanced by the use of a simple pseudo-random bit interleaving scheme. Moreover, to increase the capacity of the PC-CDMA system, we propose a simple self-interference cancellation method for self-induced cross-correlation arising from the multipath environment. This further enhances the efficacy of the decoding scheme because the false contributions of the self-induced cross-correlation component are removed from the branch metric prior to soft decision Viterbi decoding. Finally, we simulated a possible PC-CDMA system with a user data rate of 1.92Mbps, transmitting it at a chip rate of 3.84Mcps and at 7.68Mcps under a multipath-Rayleigh fading interference environment. For a chip rate of 7.68Mcps, BER after Viterbi decoding is less than 3.2e-7 even without the use of interference cancellation. For a chip rate of 3.84Mcps, BER after Viterbi decoding with interference cancellation is 1.0e-4.

This paper describes content addressable memory (CAM) -based hardware that serves as a highly parallel, compact and real-time image-processing system. The novel concept of a highly-parallel integrated circuits and system (HiPIC), in which a large-capacity CAM tuned for parallel data processing is a key element, is introduced. Several hardware algorithms for highly-parallel image processing based on a HiPIC with a CAM are presented in order to demonstrate that the HiPIC concept is effective for compact and real-time image processing. Two kinds of HiPIC-dedicated CAM have been developed. One is embedded on a 0.5-µm CMOS gate array. An embedded CAM up to 64 kbit and logic up to 40 kgate can be integrated on a single chip. The other is a 0.5-µm CMOS full-custom CAM LSI tuned for parallel data processing. A fully-parallel 336-kbit CAM LSI has been successfully developed. The HiPIC concept and CAM-based hardware described here promises to be an important step towards the realization of a compact and real-time image-processing system.

We have developed an SIMD-type neural-network processor (NEURO4) and its software environment. With the SIMD architecture, the chip executes 24 operations in a clock cycle and achieves 1.2 GFLOPS peak performance. An accelerator board, which contains four NEURO4 chips, achieves 3.2 GFLOPS. In this paper we describe features of the neural network chip, accelerator board, software environment and performance evaluation for several neural network models (LVQ, BP and Hopfield). The 3.2 GFLOPS neural network accelerator board demonstrates 1.7 GCPS and 261 MCUPS for Hopfield networks.

This paper explores the potential of multiwave interconnectionsoptical interconnections that employ wavelength components as multiplexable information carriersfor constructing next-generation multiprocessor systems using MCM technology. A hypercube-based multiprocessor network called the multiwave hypercube (MWHC) is proposed, where multiwave interconnections provide highly-flexible dynamic communication channels among processing elements. A performance analysis shows that the use of multiwavelength optics makes possible the reduction of network complexity on an MCM substrate, while supporting low-latency message routing.

This paper presents a 4-valued content-addressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiple-valued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a high-density 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.

Currently, a typical 5454 bit multiplier is composed of a parallel structured architecture with the encoder block to implement the Modified Booth's algorithm, a block to implement the data compression, and a 108-bit Carry Look-Ahead (CLA) adder. The key idea in the present paper is a power optimization for the data compressors based on a Window Detector. The role of the Window Detector is detecting the input data, activating a selected operation unit, choosing the optimized output data, and driving the next stage. It can reduce the power consumption drastically because only one selected operation unit (a Window) is activated. The power consumption of the proposed data compressors is reduced by about 33%, compared with that of the conventional multiplier; while the propagation delay is nearly same as that of the conventional one. Furthermore, the power consumption dependent on the input data transition is shown for both the static CMOS logic and the nMOS pass transistor logic.

We propose a memory-based processor called a Functional Memory Type Parallel Processor for vector quantization (FMPP-VQ). The FMPP-VQ is intended for low bit-rate image compression using vector quantization. It accelerates the nearest neighbor search on vector quantization. In the nearest neighbor search, we look for a vector nearest to an input one among a large number of code vectors. The FMPP-VQ has as many PEs (processing elements, also called "blocks") as code vectors. Thus distances between an input vector and code vectors are computed simultaneously in every PE. The minimum value of all the distances is searched in parallel, as in conventional CAMs. The computation time does not depend on the number of code vectors. In this paper, we explain the detail of the architecture of the FMPP-VQ, its performance and its layout density. We designed and fabricated an LSI including four PEs. The test results and performance estimation of the LSI are also reported.

In this paper, we present a new state space-based approach for the two-dimensional (2-D) frequency estimation problem which occurs in various areas of signal processing and communication problems. The proposed method begins with the construction of a state space model associated with the noiseless data which contains a summation of 2-D harmonics. Two auxiliary Hankel-block-Hankel-like matrices are then introduced and from which the two frequency components can be derived via matrix factorizations along with frequency shifting properties. Although the algorithm can render high resolution frequency estimates, it also calls for lots of computations. To alleviate the high computational overhead required, a highly parallelizable implementation of it via the principle subband component (PSC) of some appropriately chosen transforms have been addressed as well. Such a PSC-based transform domain implementation not only reduces the size of data needed to be processed, but it also suppresses the contaminated noise outside the subband of interest. To reduce the computational complexity induced in the transformation process, we also suggest that either the transform of the discrete Fourier transform (DFT) or the Haar wavelet transform (HWT) be employed. As a consequence, such an approach of implementation can achieve substantial computational savings; meanwhile, as demonstrated by the provided simulation results, it still retains roughly the same performance as that of the original algorithm.

Electric fishes generate an AC electric field around themselves by the electric organ in the tail. Spatial distortion of the field by nearby objects is detected by an electroreceptor array located an over the body surface to localize the object electrically when other senses such as vision and mechanosense are useless. Each fish has its own 'frequency band' for its electric organ discharges, and jamming of the electrolocation system occurs when two fish with similar discharge frequencies encounter. To avoid janmming, the fish shift their discharge frequencies in appropriate directions. A computational algorithm for this electrical behavior and its neuronal implementation by the brain have been discovered. The design features of the system, however, are rather complex for this simple behavior and cannot be readily explained by functional optimization processes during evolution. To gain insights into the origin of the design features, two independently evolved electric fish species which perform the same behavior are compared. Complex features of the neuronal computation may be explained by the evolutionary history of neuronal elements.

Characteristics of a distortion, gain and efficiency of a power amplifier grow worse extremely by different phases of the load reflection coefficient when load impedances of the power amplifier are far from 50 Ω. It was found that the value of the distortion, gain and efficiency showed the tradeoff behavior when the phase of the reflection coefficient was different in 180 degrees. Therefore we have proposed new two- and four-parallel unit power amplifiers combined in 90 degree and 45 degree different phases each in order to accomplish low distortion and high efficiency in wide range of load impedances without an isolator. We studied the power amplifiers by simulation based on experiments and realized an amplifier in that adjacent channel leakage power of π/4-DQPSK modulation (for Japan's digital cellular system) is less than -45 dBc and efficiency is over 45% in range of load VSWR less than 3.

We have been studying on subthreshold characteristics of SOI (Silicon-On-Insulator) MOSFET's in terms of substrate bias dependence using a one-dimensional subthreshold device simulator based on Poisson equation in an SOI multilayer structure for estimating structural parameters of real devices. Here, we consider the quantum mechanical effects in the electron inversion layer of thin SOI MOSFET's, such as the two-dimensionally quantized electron states and transports, with a self-consistent solver of Poisson and Schrodinger equations and a mobility model by the relaxation time approximation. From results of simulations, we found a significant difference between this model and the classical model and concluded that the quantum mechanical effects need to be considered in analizing thin-film SOI devices.