Reflection mode diffraction tomography is expected to reconstruct a higher resolution image than transmission mode. Its image reconstruction problem, however, in the many cases of practical uses becomes ill-posed one. In this paper, a new reconstruction method of limited angle reflection mode diffraction tomography using maximum entropy method is proposed. Results of simulation showed that the method was able to reconstruct the better quality images than IR method poposed by Kak, et al.

This letter reports a high-sensitivity GaAs decision IC for ultra-high-speed optical transmission systems. The IC was designed using LSCFL (Low-power Source Coupled FET Logic) and fabricated with 0.2-µm-gate-length MESFETs with a cut-off frequency of 50GHz. The input voltage sensitivity was 35mV at 10Gbit/s. This is the highest sensitivity ever reported for a MESFET decision IC.

We Propose an integrated design and test assistance method for pipelined processors. Our approach generates behavioral-level test environments for pipeline control mechanisms from a machine-readable specification. It includes automatic generation of test programs and behavioral descriptions. Verification can be done by applying logic simulation to both the designers' descriptions and the behavioral descriptions, and then comparing the results. We have implemented an experimental system that enumerates all hazard patterns--instruction patterns that cause pipeline hazards--from the specifications, and generates the test programs and the behavioral descriptions for the pipeline controllers. The test programs cover all of the hazard patterns. The behavioral descriptions can manipulate any instruction stream. Experimental results for several RISC processors show that actual hazard patterns are too numerous to be easily enumerated by hand. Using workstations, our system can generate the test programs that cover all of the patterns, taking a few minutes. Results suggest that the system can be used to evaluate pipeline design.

Superscalar processors improve performance by exploiting instruction-level parallelism (ILP). ILP in a basic block is, however, not sufficient on non-numerical applications for gaining substantial speedup. Instructions across branches are required to be executed in parallel to dramatically improve performance. That is, speculative execution is strongly required. Boosting is a general solution to achieving speculative execution. Boosting labels an instruction to be speculatively executed, and the hardware handles side-effects. This paper describes the efficient implementation of boosting in terms of cost/performance trade-offs. Our policy in implementation is beneficial in code scheduling heuristics, penalties imposed by code duplication to maintain program semantics, and area cost. This paper also describes a branch scheme which minimizes branch penalty. Branch delay causes crucial penalties on the performance of superscalar processors since multiple delay slots exist even in a single delay cycle. Our scheme is the fetching of both sequential and target instructions, and either of them is selected on a branch. No delay cycle can be imposed. This scheme is realized by a combination of static code movement and hardware support. As a result, we reduce branch penalty with small cost. Simulation results show that our ideas are highly effective in improving the performance of a superscalar processor.

Embossed disks with discrete magnetic tracks and servo marks are proposed and evaluated. The tracks and the servo marks are made by etching the glass substrate. The guard band depth was decided to be 0.2 µm. Using the disks, the head positioning accuracy of 0.09µm (rms) and the recording density of 192 tracks per millimeter were demonstrated.

In our recent work, a forward test generation method for sequential circuits by using a single time frame was proposed. In order to improve the effectiveness of the method, we introduced an extended mode which can handle the two time frames for a hard-to-test fault and a state escaping phase which can detect a sequence of unsuitable states for test generation. The experimental results show that the improved method is effective in generating higher coverage tests with a small number of tests.

Algorithms for computing channel capacity have been proposed by many researchers. Recently, one of the authors proposed an efficient algorithm using Newton's method. Since this algorithm has local quadratic convergence, it is advantageous when we want to obtain a numerical solution with high accuracy. In this letter, it is shown that this algorithm can be extended to the algorithm for computing the constrained capacity, i.e., the capacity of discrete memoryless channels with linear constraints. The global convergence of the extended algorithm is proved, and its effectiveness is verified by numerical examples.

This paper describes the fundamental principle of novel push-push oscillators using hairpin-shaped split-ring resonators and their application to voltage controlled and injection locked oscillators for frequency synthesizers. The experimental results make it clear that the synthesizer systems discussed here have the advantages of high frequency operation, compact size and low power consumption. Experimental work has been carried out in the L band, but these systems can be applied to much higher frequencies.

Recently, studies aiming at the next generation of visual communication services which support better human communication have been carried out intensively in Japan. The principal motive of these studies is to develop new services which are not restricted to a conventional communication framework based on the transmission of waveform signals. This paper focuses on three important key words in these studies; "intelligent," "real," and "distributed and collaborative," and describes recent research activities. The first key word "intelligent" relates to intelligent image coding. As a particular example, model-based coding of moving facial images is discussed in detail. In this method, shape change and motion of the human face is described by a small number of parameters. This feature leads to the development of new applications such as very low bit-rate transmission of moving facial images, analysis and synthesis of facial expression, human interfaces, and so on. The second key word "real" relates to communication with realistic sensations and virtual space teleconferencing. Among various component technologies, real-time reproduction of 3-D human images and a cooperative work environment with virtual space are discussed in detail. The last key word "distributed and collaborative" relates to collaborative work in a distributed work environment. The importance of visual media in collaborative work, a concept of CSCW, and requirements for realizing a distributed collaborative environment are discussed. Then, four examples of CSCW systems are briefly outlined.

It has been reported that generalization performance of multilayer feedformard networks strongly depends on the attainment of saturated hidden outputs in response to the training set. Usually standard Backpropagation (BP) network mostly uses intermediate values of hidden units as the internal representation of the training patterns. In this letter, we propose construction of a 3-layer cascaded network in which two 2-layer networks are first trained independently by delta rule and then cascaded. After cascading, the intermediate layer can be viewed as hidden layer which is trained to attain preassigned saturated outputs in response to the training set. This network is particularly easier to construct for linearly separable training set, and can also be constructed for nonlinearly separable tasks by using higher order inputs at the input layer or by assigning proper codes at the intermediate layer which can be obtained from a trained Fahlman and Lebiere's network. Simulation results show that, at least, when the training set is linearly separable, use of the proposed cascaded network significantly enhances the generalization performance compared to BP network, and also maintains high generalization ability for nonlinearly separable training set. Performance of cascaded network depending on the preassigned codes at the intermediate layer is discussed and a suggestion about the preassigned coding is presented.

The goal of visual telecommunication has been to create a sense of "being there" or "telepresence." This paper introduces a novel shared drawing medium called ClearBoard that goes beyond "being there" by providing virtual shared workspace. It realizes (1) a seamless integration of shared drawing space and partner's image, and (2) eye contact to support real-time and remote collaboration by two users. We devised the key metaphor: "talking through and drawing on a transparent glass window" to design ClearBoard. A prototype, ClearBoard-1 is implemented based on the "Drafter-Mirror" architecture. This paper first reviews previous work on shared drawing support to clarify our design goals. We then examine three metaphors that fulfill these goals. The design requirements and the two possible system architectures of ClearBoard are described. Finally, some findings gained through the experimental use of the prototype, including the feature of "gaze awareness," are discussed.

Switched-current (SI) is a current-mode analog sampled-data signal processing technique realizable in standard digital CMOS technologies. In this paper, new switched-current (SI) mirrors using OTAs (operational transconductance amplifiers) are proposed. These circuits are less sensitive to clock-feedthrough noise than conventional SI mirrors by virtue of linear I-V/V-I transformations. In addition, the current gain of the proposed mirror is electronically tunable. Not only inverting mirrors but also noninverting mirrors can be realized by this method.

When a new fabrication process is set up, especially in layout design for functional cells, of practical importance is how to make the best use of layout resources so far accumulated in old fabrication processes. Usually layout data of each element are expressed mostly in terms of positional coordinate values, and hence it is extremely tedious to modify them at every change of design rules for a new fabrication technology. To cope with this difficulty, the present paper describes an automatic recycling scheme for layout resources accumulated dedicatedly for functional cell generation. The main subject of this scheme is to transform given layout data into a layout description format expressed in layout parameters. Once layout data are parameterized, layout patterns of functional cells can be reconstructed simply by tuning up parameters in accordance with a new set of design rules. A part of implementation results are also shown.

The mechanism of environment-dependent self-organization of "positional information" in a coupled nonlinear oscillator system is proposed as a new principle of realtime coordinative control in biological distributed system. By modeling the pattern formation in tactic response of Physarum plasmodium, it is shown that a global phase gradient pattern self-organized by mutual entrainment encodes not only the positional relationship between subsystems and the total system but also the relative relationship between internal state of the system and the environment.

A low-voltage, high-speed 4-bit CMOS single chip microprocessor, with instruction execution time of 1.0µs at a power supply voltage of 1.8V, has been developed. A single chip processor generally includes crystal oscillation circuits to generate a system clock or a time-base clock. But when the operating voltage is lowered, it becomes difficult to get oscillations to start reliably and to continue stably. This paper describes a low voltage circuit design method for built-in crystal oscillators. Simple design equations for oscillation starting voltage and oscillation starting time are introduced. Then effects of the circuit device parameters, such as power supply voltage, loop gain values, and subthreshold swing S, on the low voltage performance of the crystal oscillators are considered. It is shown that the crystal oscillators operate in a tailing (subthreshold) region at voltages lower than about 1.8 V. Subthreshold swing, threshold voltage, and open loop gain have a significant influence on low voltage oscillation capability. This design method can be applied to crystal oscillators for a wide range of operating voltages.

By adding a linear resistor in series with the inductor in Chua's circuit, we obtain a circuit whose state equation is topologically conjugate (i.e., equivalent) to a 21-parameter family C of continuous odd-symmetric piecewise-linear equations in R3. In particular, except for a subset of measure zero, every system or vector field belonging to the family C, can be mapped via an explicit non-singular linear transformation into this circuit, which is uniquely determined by 7 parameters. Since no circuit with less than 7 parameters has this property, this augmented circuit is called an unfolding of Chua's circuit--it is analogous to that of "unfolding a vector field" in a small neighborhood of a singular point. Our unfolding, however, is global since it applies to the entire state space R3. The significance of the unfolded Chua's Circuit is that the qualitative dynamics of every autonomous 3rd-order chaotic circuit, system, and differential equation, containing one odd-symmetric 3-segment piecewise-linear function can be mapped into this circuit, thereby making their separate analysis unnecessary. This immense power of unification reduces the investigation of the many heretofore unrelated publications on chaotic circuits and systems to the analysis of only one canonical circuit. This unified approach is illustrated by many examples selected from a zoo of more than 30 strange attractors extracted from the literature. In addition, a gallery of 18 strange attractors in full color is included to demonstrate the immensely rich and complex dynamics of this simplest among all chaotic circuits.

We propose an integrated smart cable operation system and its architecture for the future cable network. In the proposed architecture, an application programs and various modules are loosely coupled using a cable operation system platform. We anticipate the task flows for the future optical cable network operation in order to realize the proposed system and architecture. Each task flow is broken down into "atomic tasks." The task flow can be changed easily by combining these atomic tasks. We use an object-oriented design for designing the cable operation system platform. As a first step towards the construction of the proposed system a pre-prototype system was constructed and the results are shown.

We report on Brillouin optical-fiber time domain reflectometry (BOTDR) for distributed temperature or strain measurement along a single-mode optical fiber. BOTDR uses Brillouin scattering in optical fibers, whose Brillouin frequency shift increases in proportion to temperature or strain induced in the fiber. This method requires access to only one end of a fiber, as with conventional optical time domain reflectometry (OTDR) which uses Rayleigh scattering in optical fibers. In BOTDR, a coherent optical detection method is used as a backscattered light detection technique. This technique can achieve both high sensitivity and high frequency resolution and easily separate a weak Brillouin line from a strong Rayleigh scattering peak and Fresnel reflected light. Experimental results show the potential for measuring temperature and strain distribution with respective accuracies of 3 or 0.006%, and a spatial resolution of 100m in an 11.57km long fiber.

Mathematical morphology clarified geometrical properties of shape analysis algorithms for binary pictures. Results of labelling, distance transform, and adjacent numbering are, however, coded pictures. For full descriptions of shape analysis algorithms in the framework of mathematical morphology, it is necessary to extend morphological operations to code-labelled pictorial data. Nevertheless, extensions of morphology to code-labelled pictures have never discussed though the theory of gray morphology is well studied by several authors. Hence, this paper proposes a theory of the coded morphology which is based on the binary scaling of labels of pixels. The method uses n-layered binary sub-pictures for the processing of a picture with 2n labels. By introducing morphological operations for the coded point sets, we express some coding functions in the manner of the mathematical morphology. We also derive multidimensional array registers and gates which store and process coded pictures and morphological operations to them by proposing basic gates which compute parallelly logical operations for elements of Boolean layered arrays. These gates and registers are suitable for the implementation of the shape analysis processors on the three-dimensional VLSI and ULSI.

Single-mode fibers with intentionally induced periodical residual strains (IIPRS) along the fiber length are proposed for the suppression of the stimulated Brillouin scattering (SBS). A change of the residual strain along a fiber will change the Brillouin frequency shift, resulting in a broadening of the Brillouin gain profile. Such an increase of the line-width of the gain profile will cause a decrease of the gain coefficient which will raise the threshold power of the stimulated Brillouin scattering in optical fibers. Two types of the IIPRS fibers were fabricated. The residual strain of one IIPRS fiber is modified rectangularly while that of the other is changed triangularly. The measured spectra of the SBS are compared with that of a fiber with a constant strain. Using a novel mathematical model presented in this report, the possible improvements of the threshold powers for these two IIPRS fibers over the constant-strain fiber can be assessed through the SBS spectra. Finally, the achieved improvements are confirmed with the experimental results. The estimated improvement of the threshold for the IIPRS fiber with the rectangular profile is 2.9dB while the measured is 2.4dB. In case of the IIPRS fiber with a triangular profile, the improvement of the threshold is 5.4dB by estimation and is 5.1dB by experiment. While the limit of the threshold improvement for rectangular IIPRS fibers is 3dB, the threshold improvement for triangular IIPRS fibers is limited only by the allowable deviation of the tension applied during the drawing of fibers. It is estimated that a 5dB improvement is not difficult to realize.