Scalable Video Coding (SVC) is an extension of H.264/AVC, aiming to provide the ability to adapt to heterogeneous networks or requirements. It offers great flexibility for bitstream adaptation in multi-point applications such as videoconferencing. However, transcoding between SVC and AVC is necessary due to the existence of legacy AVC-based systems. The straightforward re-encoding method requires great computational cost, and delay-sensitive applications like videoconferencing require much faster transcoding scheme. This paper proposes a 3-stage fast SVC-to-AVC transcoder with medium-grain quality scalability (MGS) for videoconferencing applications. Hierarchical-P structured SVC bitstream is transcoded into IPPP structured AVC bitstream with multiple reference frames. In the first stage, mode decision is accelerated by proposed SVC-to-AVC mode mapping scheme. In the second stage, INTER motion estimation is accelerated by an optimized motion vector (MV) conjunction method to predict the MV with a reduced search range. In the last stage, hadamard-based all zero block (AZB) detection is utilized for early termination. Simulation results show that proposed transcoder achieves very similar coding efficiency to the optimal result, but with averagely 89.6% computational time saving.

A stochastic hybrid system can express complex dynamical systems such as biological systems and communication networks, but computation for analysis and control is frequently difficult. In this paper, for a class of stochastic hybrid systems, a discrete abstraction method in which a given system is transformed into a finite-state system is proposed based on the notion of bounded bisimulation. In the existing discrete abstraction method based on bisimulation, a computational procedure is not in general terminated. In the proposed method, only the behavior for the finite time interval is expressed as a finite-state system, and termination is guaranteed. Furthermore, analysis of genetic toggle switches is also discussed as an application.

Well designed redundant via-aware standard cells (SCs) can increase the redundant via1 insertion rate in cell-based designs. However, in conventional methods, manual- and visual-based checks are required to locate pins and tune the geometries of layouts. These tasks can be very time consuming and unreliable. In this work, an O(Nlog N) redundant via-aware standard cell optimization scheme is developed. The proposed method is an efficient layout check and optimization scheme that considers various redundant via configurations including the double-via and rectangle-via to shorten the design time for standard cells. The optimized SCs effectively increase the redundant via insertion rate, and in particular the insertion rate of via1 for both concurrent routing and post-layout optimization. Furthermore, an automatic layout checker and optimizer are more efficient in identifying expandable metal 1 pins in libraries that contain numerous cells than are conventional visual check and manual optimization. Therefore, the proposed scheme not only solves the problem of a low via1 insertion rate in nanometer regimes, but also provides an efficient layout optimizer for designing standard cells. Experimental results indicate that the optimized standard cells increase the double-via1 insertion rates by 21.9%.

A novel standard-compliant multiple description (MD) video codec is proposed in this paper, which aims to achieve effective redundancy allocation using inter- and intra-description correlation. The inter-description correlation at macro block (MB) level is applied to produce side information of different modes which is helpful for better side decoding quality. Furthermore, the intra-description correlation at MB level is exploited to design the adaptive skip mode for higher compression efficiency. The experimental results exhibit a better rate of side and central distortion performance compared with other relevant MDC schemes.

A dual management of real-time and interactive jobs in dual-core smartphones is presented. The proposed scheme guarantees the end-to-end QoS of real-time applications, while also provides reasonable latency for interactive applications. To this end, high performance NVRAM is adopted as storage of real-time applications, and a dual purpose CPU scheduler, in which one core is exclusively used for real-time applications, is proposed. Experiments show that the proposed scheme reduces the deadline miss ratio of real-time applications by 92%.

As one of organic electroluminescent (EL) materials, we developed a method of fabricating an ink using low molecular- weight materials with a long emission lifetime for application to the inkjet method. Although the emission lifetime is usually long for low molecular-weight materials, their high manufacturing cost due to the necessity of vapor deposition is a disadvantage. We utilized the low molecular-weight material, tris-(8-hydroxyquinoline) aluminum (Alq3), and investigated its dispersibility in a solvent in which it has low solubility. In addition, we ascertained whether the material could maintain its photoluminescence characteristic under the irradiation of ultraviolet rays by investigating the emission of photoluminescence. Alq3 was crystallized into nanosize crystals, whose surface was then coated with a primary amine by the gas evaporation method. The fabricated ink contained crystals with an average size of 250nm and high dispersibility in tetradecane, in which Alq3 is insoluble. Thus, we made it possible to carry out an inkjet method with low molecular weight EL materials.

A microwave power amplifier with independently biased InGaP/GaAs HBTs is proposed, and its superior performance is confirmed. Using harmonic balance simulation, the optimal bias conditions for an amplifier with two independently biased InGaP/GaAs HBTs were investigated with the aim of achieving high-efficiency low-distortion performance. A 1.9-GHz-band cascode power amplifier was designed and fabricated. Power efficiencies and third-order intermodulation distortions (IMD3) for the fabricated amplifier were estimated. The collector bias voltage of the first stage transistor mainly affects power-added efficiency (PAE). The base bias current of the first-stage HBT mainly affects IMD3 characteristics, and that of the second-stage HBT mainly affects PAE. The proposed amplifier shows superior performance when compared to a conventional cascode amplifier. The amplifier achieved a maximum PAE of 68.0% with an output power of 14.8dBm, and IMD3 better than -35dBc with a PAE of 25.1%, for a maximum output power of 10.25dBm at 1.9GHz. A PAE of more than 60% was achieved from 1.87 to 1.98GHz.

We implemented a scalar multiplication method over elliptic curves using division polynomials. We adapt an algorithm for computing elliptic nets proposed by Stange. According to our experimental results, the scalar multiplication method using division polynomials is faster than the binary method in an affine coordinate system.

Coupled with the discrete wavelet transform, SPIHT (set partitioning in hierarchical trees) is a highly efficient image compression technique that allows for progressive transmission. One problem, however, is that its decoding can be extremely sensitive to bit errors in the code sequence. In this paper, we address the issue of transmitting SPIHT-encoded images via noisy channels, wherein errors are inevitable. The communication scenario assumed in this paper is that the transmitter cannot get any acknowledgement from the receiver. In our scheme, the original SPIHT code sequence is first segmented into packets. Each packet is classified as either a CP (critical packet) or an RP (refinement packet). For error control, cyclic redundancy check (CRC) is incorporated into each packet. By checking the CRC check sum, the receiver is able to tell whether a packet is correctly received or not. In this way, the noisy channel can be effectively modeled as an erasure channel. For unequal error protection (UEP), each of those packets are repeatedly transmitted for a few times, as determined by a process called diversity allocation (DA). Two DA algorithms are proposed. The first algorithm produces a nearly optimal decoded image (as measured in the expected signal-to-noise ratio). However, its computation cost is extremely high. The second algorithm works in a progressive fashion and is naturally compatible with progressive transmission. Its computation complexity is extremely low. Nonetheless, its decoded image is nearly as good. Experimental results show that the proposed scheme significantly improves the decoded images. They also show that making distinction between CP and RP results in wiser diversity allocation to packets and thus produces higher quality in the decoded images.

An amplitude shift keying transmitter and receiver chipset with low power consumption using 40nm CMOS technology for wireless communication systems is described, in which a maximum data rate of 10Gbps and power consumption of 98.4mW are obtained with a carrier frequency of 135GHz. A simple circuit and a modulation method to reduce power consumption are selected for the chipsets. To realize multi-gigabit wireless communication, the receiver is designed considering the group delay optimization. In the receiver design, the low-noise amplifier and detector are designed considering the total optimization of the gain and group delay in the millimeter-wave modulated signal region.

An effective interlaced-to-progressive scanning format conversion method is presented for the interpolation of interlaced images. On the basis of the weight assignment algorithm, the proposed method is composed of three stages: (1) straightforward interpolation with pre-determined six-tap filter, (2) fuzzy metric-based weight assignment, (3) updating the interpolation results. We first deinterlace the missing line with six-tap filter in the working window. Then we compute the local weight among the adjacent pixels with a fuzzy metric. Finally we deinterlace the missing pixels using the proposed interpolator. Comprehensive simulations conducted on different images and video sequences have proved the effectiveness of the proposed method, with significant improvement over conventional methods.

We propose a new, compact, center-fed reflector antenna that is capable of one-dimensional electronic beam scanning. The reflector profile in the vertical section (beam-scanning) is set to an imaging reflector configuration, while the profile in the orthogonal horizontal section (non-beam-scanning) is set to a Cassegrain antenna configuration. The primary radiator is a one-dimensional phased array antenna. We choose a center-fed configuration in order to reduce the antenna size as much as possible, despite the fact that the increased blocking area from the primary radiator causes degradation in efficiency compared to the typical offset-type configuration. In the proposed configuration, beam scanning is limited to one dimension, but utilize a compact, center-fed configuration that maintains the features of an imaging reflector antenna. We present the antenna configuration and design method and show that results obtained from the prototype antenna verify the predicted performance.

We calculated propagation constants of supermodes for two-dimensional two-slab waveguides, with small core gap, using second-order perturbation expansion from gapless slab waveguide system, and compared our results with the existing works. In the perturbation calculation, we used trapezoidal method to calculate the integral over the transverse direction in space and obtained second-order expansion of (core gap)/(core width) for propagation constants. Our result can explain the qualitative relationship between the propagation constants and the gap distance in the neighbor of (core gap)/(core width) being zero.

In the shadow theory, a new description and a physical mean at a low grazing limit of incidence on gratings in the two dimensional scattering problem have been discussed. In this paper, by applying the shadow theory to the three dimensional problem of multilayered dielectric periodic gratings, we formulate the oblique primary excitation and introduce the scattering factors through our analytical method, by use of the matrix eigenvalues. In terms of the scattering factors, the diffraction efficiencies are defined for propagating and evanescent waves with linearly and circularly polarized incident waves. Numerical examples show that when an incident angle becomes low grazing, only specular reflection occurs with the reflection coefficient -1, regardless of the incident polarization. It is newly found that in a circularly polarized incidence case, the same circularly polarized wave as the incident wave is specularly reflected at a low grazing limit.

We theoretically study the performance of multiple-input multiple-output (MIMO) free-space optical (FSO) systems using subcarrier quadrature modulation (SC-QAM) signaling. The system average symbol-error rate (ASER) is derived taking into account the atmospheric turbulence effects on the MIMO/FSO channel, which is modeled by log-normal and the gamma-gamma distributions for weak and moderate-to-strong turbulence conditions. We quantitatively discuss the influence of index of refraction structure parameter, link distance, and different MIMO configurations on the system ASER. We also analytically derive and discuss the MIMO/FSO average (ergodic) channel capacity (ACC), which is expressed in terms of average spectral efficiency (ASE), under the impact of various channel conditions. Monte Carlo simulations are also performed to validate the mathematical analysis, and a good agreement between numerical and simulation results is confirmed.

The results of fishery investigations are used to estimate the catch size, times fish are caught, and future stock in the fish culture industry. In Tokoro, Japan, scallop farms are located on gravel and sand seabed. Seabed images are necessary to visually estimate the number of scallops of a particular farm. However, there is no automatic technology for measuring resources quantities and so the current investigation technique is the manual measurement by experts. We propose a method to extract scallop areas from images of sand seabed. In the sand field, we can see only the shelly rim because the scallop is covered with sand and opens and closes its shell while it is alive and breathing. We propose a method to extract the shelly rim areas under varying illumination, extract the scallop areas using the shelly rims based on professional knowledge of the sand field, explain the results, and evaluate the method's effectiveness.

Checkpoint-rollback recovery, which is a universal method for restoring distributed systems after faults, requires a sophisticated snapshot algorithm especially if the systems are large-scale, since repeatedly taking global snapshots of the whole system requires unacceptable communication cost. As a sophisticated snapshot algorithm, a partial snapshot algorithm has been introduced that takes a snapshot of a subsystem consisting only of the nodes that are communication-related to the initiator instead of a global snapshot of the whole system. In this paper, we modify the previous partial snapshot algorithm to create a new one that can take a partial snapshot more efficiently, especially when multiple nodes concurrently initiate the algorithm. Experiments show that the proposed algorithm greatly reduces the amount of communication needed for taking partial snapshots.

The security of pairing-based cryptosystems is determined by the difficulty of solving the discrete logarithm problem (DLP) over certain types of finite fields. One of the most efficient algorithms for computing a pairing is the ηT pairing over supersingular curves on finite fields of characteristic 3. Indeed many high-speed implementations of this pairing have been reported, and it is an attractive candidate for practical deployment of pairing-based cryptosystems. Since the embedding degree of the ηT pairing is 6, we deal with the difficulty of solving a DLP over the finite field GF(36n), where the function field sieve (FFS) is known as the asymptotically fastest algorithm of solving it. Moreover, several efficient algorithms are employed for implementation of the FFS, such as the large prime variation. In this paper, we estimate the time complexity of solving the DLP for the extension degrees n=97, 163, 193, 239, 313, 353, and 509, when we use the improved FFS. To accomplish our aim, we present several new computable estimation formulas to compute the explicit number of special polynomials used in the improved FFS. Our estimation contributes to the evaluation for the key length of pairing-based cryptosystems using the ηT pairing.

This paper investigates the average block error rate (BLER) performance of star 16QAM schemes considering the effective peak-to-average power ratio (PAPR) criterion called a cubic metric (CM) for uplink discrete Fourier transform (DFT)-precoded orthogonal frequency division multiple access (OFDMA). We clarify the best ring amplitude ratio for the (4, 12) and (8, 8) star 16QAM schemes from the viewpoint of the required average signal-to-noise power ratio (SNR) that satisfy the target average BLER based on link-level simulations. We also validate the agreement of the best ring amplitude ratios with those maximizing the mutual information based throughput. Then, employing the best ring amplitude ratios for the respective coding rates of the turbo code, we show that (8, 8) star 16QAM achieves better average BLER performance compared to that for (4, 12) star 16QAM. Moreover, we show the effectiveness of the (8, 8) star 16QAM scheme compared to square 16QAM in terms of the required average received SNR considering the CM when the coding rate is low such as 1/3 for uplink DFT-precoded OFDMA.

In this paper, we propose a synthesizable LDPC decoder IP core for the WiMAX system with high parallelism and enhanced error-correcting performance. By taking the advantages of both layered scheduling and fully-parallel architecture, the decoder can fully support multi-mode decoding specified in WiMAX with the parallelism much higher than commonly used partial-parallel layered LDPC decoder architecture. 6-bit quantized messages are split into bit-serial style and 2bit-width serial processing lines work concurrently so that only 3 cycles are required to decode one layer. As a result, 12∼24 cycles are enough to process one iteration for all the code-rates specified in WiMAX. Compared to our previous bit-serial decoder, it doubles the parallelism and solves the message saturation problem of the bit-serial arithmetic, with minor gate count increase. Power synthesis result shows that the proposed decoder achieves 5.83pJ/bit/iteration energy efficiency which is 46.8% improvement compared to state-of-the-art work. Furthermore, an advanced dynamic quantization (ADQ) technique is proposed to enhance the error-correcting performance in layered decoder architecture. With about 2% area overhead, 6-bit ADQ can achieve the error-correcting performance close to 7-bit fixed quantization with improved error floor performance.