Visible light communication is one of the key technologies for intelligent transport systems (ITS). However, current visible light communication systems require high-cost devices, such as high-speed image sensors, to support their high transmission rates. In this paper, we designed a communication system with combination of a low-speed commercial image sensor and a polygon mirror — namely, a fast-blinking light signal is scanned by the polygon mirror and captured as a residual image on the low-speed image sensor — to achieve visible light communication on existing mobile devices with high transmission rates. We also analyzed some required conditions, such as the relationship between the exposure time of the image sensor and the optimal resolution, and conducted experiments for performance evaluation. As a result, we found that the proposed system could achieve a data rate of 120bps, 10 times faster than that of the existing scheme when we compare them using the same image sensor. We also found that the proposed system can achieve a practical bit error rate in a low-noise environment.

Personal e-healthcare service is growing significantly. A large number of personal e-health measuring and monitoring devices are now in the market. However, to achieve better health outcome, various devices or services need to work together. This coordination among services remains challenge, due to their variations and complexities. To address this issue, we have proposed an ontology-based framework for interactive self-assessment of RESTful e-health services. Unlike existing e-health service frameworks where they had tightly coupling between services, as well as their data schemas were difficult to change and extend in the future. In our work, the loosely coupling among services and flexibility of each service are achieved through the design and implementation based on HYDRA vocabulary and REST principles. We have implemented clinical knowledge through the combination of OWL-DL and SPARQL rules. All of these services evolve independently; their interfaces are based on REST principles, especially HATEOAS constraints. We have demonstrated how to apply our framework for interactive self-assessment in e-health applications. We have shown that it allows the medical knowledge to drive the system workflow according to the event-driven principles. New data schema can be maintained during run-time. This is the essential feature to support arriving of IoT (Internet of Things) based medical devices, which have their own data schema and evolve overtime.

In this letter, we show the recursive representation of the optimum projection matrix. The recursive representation of the orthogonal projection and oblique projection have been done in past references. These projections are optimum when the noise is only characterized by the white noise or the structured noise. However, in some practical applications, a desired signal is deteriorated by both the white noise and structured noise. In this situation, the optimum projection matrix has been given by Behrens. For this projection matrix, the recursive representation has not been done. Therefore, in this letter, we propose the recursive representation of this projection matrix.

Symmetric predicate encryption schemes support a rich class of predicates over keyword ciphertexts while preserving both keyword privacy and predicate privacy. Most of these schemes treat each keyword as the smallest unit to be processed in the generation of ciphertexts and predicate tokens. To extend the class of predicates, we treat each symbol of a keyword as the smallest unit to be processed. In this letter, we propose a novel encoding to construct a symmetric inner-product encryption scheme for position-aware symbol-based predicates. The resulting scheme can be applied to a number of secure filtering and online storage services.

A broadband mode transition between grounded coplanar waveguide (GCPW) and post-wall waveguide (PWW) is proposed. The transition is composed of GCPW, microstrip line (MSL) and PWW, where the GCPW and PWW are connected via the MSL. The transition is fabricated on liquid crystal polymer (LCP) substrate because of its low dielectric loss and cost effectiveness based on a roll-to-roll fabrication process. Center strip of the GCPW is sandwiched by two ground pads in each of which two through-holes and a rectangular slit are structured. Broadband impedance matching is achieved by this structure thanks to an addition of lumped inductance and capacitance to the transition. A part of the MSL is tapered for the broadband operation. A 25% impedance bandwidth for |S11| less than -15dB is achieved in measurement of a fabricated transition. Loss of the GCPW ground-signal-ground (GSG) pad of 0.12dB and that of the MSL-PWW transition of 0.29dB at 60GHz are evaluated from the measurement. Fabrication error and the caused tolerance on performance are also evaluated and small variation in production is confirmed. The mode transition can be used for low loss antenna-in-package in millimeter-wave applications.

This paper presents a pattern reconfigurable Yagi-Uda antenna on an FR-4 printed circuit board (PCB) for 2.435-2.465GHz-frequency short-range radiocommunication devices. To realize the antenna, pin diodes are attached onto the antenna's driven elements and parasitic elements. The direction of the beam is shifted by alternating the pin diodes status between ON and OFF to induce a quad-directional operation so that E-plane maximum beams are formed in the directions of 135°, 45°, 310° and 225° (i.e. regions 1, 2, 3, 4), respectively. A series of simulations are performed on four parameters: microstrip-to-CPS (coplanar stripline), inter-parasitic spacing, parasitic length, and modes of parasitic elements (i.e. director/reflector) to determine the optimal antenna design. A prototype is fabricated based on the optimal simulation results. The experiments showed very good agreement between the simulation and measured results with regard to the reflection coefficients, radiation patterns and gains for all four beams.

This paper presents the first non-trivial collision attack on the double-block-length compression function presented at FSE 2006 instantiated with round-reduced AES-256: f0(h0||h1,M)||f1(h0||h1,M) such that f0(h0||h1, M) = Eh1||M(h0)⊕h0 , f1(h0||h1,M) = Eh1||M(h0⊕c)⊕h0⊕c , where || represents concatenation, E is AES-256 and c is a 16-byte non-zero constant. The proposed attack is a free-start collision attack using the rebound attack proposed by Mendel et al. The success of the proposed attack largely depends on the configuration of the constant c: the number of its non-zero bytes and their positions. For the instantiation with AES-256 reduced from 14 rounds to 8 rounds, it is effective if the constant c has at most four non-zero bytes at some specific positions, and the time complexity is 264 or 296. For the instantiation with AES-256 reduced to 9 rounds, it is effective if the constant c has four non-zero bytes at some specific positions, and the time complexity is 2120. The space complexity is negligible in both cases.

Currently, IEEE802.11p and ARIB STD T-109 are available as the typical inter-vehicle communication (IVC) standards. Carrier sense multiple access/collision avoidance (CSMA/CA) and orthogonal frequency division multiplexing (OFDM) are used in these standards. However, the performance degrades when there are hidden terminals. In this paper, IVC system that using a direct sequence spread spectrum (DS/SS) modulation scheme is discussed because it has code division multiple access (CDMA) capability. In DS/SS-IVC scheme, it is possible to avoid hidden terminal problem. On the other hand, near-far problem (NFP), multiple access interference (MAI) and interference by equivalent pseudo noise (PN) codes occurs in DS/SS communication. These problems cause performance degradation. In this paper, interference cancellation scheme and slotted ALOHA scheme with code sensing are applied so as to mitigate the impact of MAI, NFP and interference by equivalent PN code. By applying interference cancellation scheme and slotted ALOHA scheme with code sensing, the performance of DS/SS-IVC is improved. In this paper, location oriented PN code allocation is focused on as a method of PN code assignment. However, DS/SS-IVC scheme based on location oriented PN code allocation has a problem. Since each vehicle obtain PN code based on the position that is estimated by GPS, performance degrades when GPS positioning error occurs. Therefore, the positioning system of DS/SS-IVC scheme is also discussed in this paper. Elimination of ranging data that has large ranging error is proposed in addition to interference cancellation scheme and slotted ALOHA scheme with code sensing in order to improve the performance of positioning. From the simulation results, the positioning error can be mitigated by applying these proposed techniques.

In this paper, a novel method of high-grade brain tumor segmentation from multi-sequence magnetic resonance images is presented. Firstly, a Gaussian mixture model (GMM) is introduced to derive an initial posterior probability by fitting the fluid attenuation inversion recovery histogram. Secondly, some grayscale and region properties are extracted from different sequences. Thirdly, grayscale and region characteristics with different weights are proposed to adjust the posterior probability. Finally, a cost function based on the posterior probability and neighborhood information is formulated and optimized via graph cut. Experiment results on a public dataset with 20 high-grade brain tumor patient images show the proposed method could achieve a dice coefficient of 78%, which is higher than the standard graph cut algorithm without a probability-adjusting step or some other cost function-based methods.

The Process Virtual Machine (VM) is typical software that runs applications inside operating systems. Its purpose is to provide a platform-independent programming environment that abstracts away details of the underlying hardware, operating system and allows bytecodes (portable code) to be executed in the same way on any other platforms. The Process VMs are implemented using an interpreter to interpret bytecode instead of direct execution of host machine codes. Thus, the bytecode execution is slower than those of the compiled programming language execution. Several techniques including our previous paper, the “Fetch/Decode Hardware Extension”, have been proposed to speed up the interpretation of Process VMs. In this paper, we propose an additional methodology, the “Hardware Extension with Hybrid Execution” to further enhance the performance of Process VMs interpretation and focus on Register-based model. This new technique provides an additional decoder which can classify bytecodes into either simple or complex instructions. With “Hybrid Execution”, the simple instruction will be directly executed on hardware of native processor. The complex instruction will be emulated by the “extra optimized bytecode software handler” of native processor. In order to eliminate the overheads of retrieving and storing operand on memory, we utilize the physical registers instead of (low address) virtual registers. Moreover, the combination of 3 techniques: Delay scheduling, Mode predictor HW and Branch/goto controller can eliminate all of the switching mode overheads between native mode and bytecode mode. The experimental results show the improvements of execution speed on the Arithmetic instructions, loop & conditional instructions and method invocation & return instructions can be achieved up to 16.9x, 16.1x and 3.1x respectively. The approximate size of the proposed hardware extension is 0.04mm2 (or equivalent to 14.81k gates) and consumes an additional power of only 0.24mW. The stated results are obtained from logic synthesis using the TSMC 90nm technology @ 200MHz.

This paper focuses on the power of comments to predict fault-prone programs. In general, comments along with executable statements enhance the understandability of programs. However, comments may also be used to mask the lack of readability in the program, therefore well-written comments are referred to as “deodorant to mask code smells” in the field of code refactoring. This paper conducts an empirical analysis to examine whether Lines of Comments (LCM) written inside a method's body is a noteworthy metric for analyzing fault-proneness in Java methods. The empirical results show the following two findings: (1) more-commented methods (the methods having more comments than the amount estimated by size and complexity of the methods) are about 1.6 - 2.8 times more likely to be faulty than the others, and (2) LCM can be a useful factor in fault-prone method prediction models along with the method size and the method complexity.

In this paper, we propose Configurable Query Processing Hardware (CQPH), an FPGA-based accelerator for continuous query processing over data streams. CQPH is a highly optimized and minimal-overhead execution engine designed to deliver real-time response for high-volume data streams. Unlike most of the other FPGA-based approaches, CQPH provides on-the-fly configurability for multiple queries with its own dynamic configuration mechanism. With a dedicated query compiler, SQL-like queries can be easily configured into CQPH at run time. CQPH supports continuous queries including selection, group-by operation and sliding-window aggregation with a large number of overlapping sliding windows. As a proof of concept, a prototype of CQPH is implemented on an FPGA platform for a case study. Evaluation results indicate that a given query can be configured within just a few microseconds, and the prototype implementation of CQPH can process over 150 million tuples per second with a latency of less than a microsecond. Results also indicate that CQPH provides linear scalability to increase its flexibility (i.e., on-the-fly configurability) without sacrificing performance (i.e., maximum allowable clock speed).

Satellite-borne or aircraft-borne synthetic aperture radar (SAR) is useful for high resolution imaging analysis for terrain surface monitoring or surveillance, particularly in optically harsh environments. For surveillance application, there are various approaches for automatic target recognition (ATR) of SAR images aiming at monitoring unidentified ships or aircraft. In addition, various types of analyses for full polarimetric data have been developed recently because it can provide significant information to identify structure of targets, such as vegetation, urban, sea surface areas. ATR generally consists of two processes, one is target feature extraction including target area determination, and the other is classification. In this paper, we propose novel methods for these two processes that suit full polarimetric exploitation. As the target area extraction method, we introduce a peak signal-to noise ratio (PSNR) based synthesis with full polarimetric SAR images. As the classification method, the circular polarization basis conversion is adopted to improve the robustness especially to variation of target rotation angles. Experiments on a 1/100 scale model of X-band SAR, demonstrate that our proposed method significantly improves the accuracy of target area extraction and classification, even in noisy or target rotating situations.

The two-dimensional (2D) interference is one of the major impairments in bit-patterned media recording (BPMR) systems due to small bit and track pitches, especially at high recording densities. To alleviate this problem, we introduced a rate-4/5 constructive inter-track interference (CITI) coding scheme to prevent the destructive data patterns to be written onto a magnetic medium for an uncoded BPMR system, i.e., without error-correction codes. Because the CITI code produces only the hard decision, it cannot be employed in a coded BPMR system that uses a low-density parity-check (LDPC) code. To utilize it in an iterative decoding scheme, we propose a soft CITI coding scheme based on the log-likelihood ratio algebra implementation in Boolean logic mappings in order that the soft CITI coding scheme together with a modified 2D soft-output Viterbi algorithm (SOVA) detector and a LDPC decoder will jointly perform iterative decoding. Simulation results show that the proposed scheme provides a significant performance improvement, in particular when an areal density (AD) is high and/or the position jitter is large. Specifically, at a bit-error rate of 10-4 and no position jitter, the proposed system can provide approximately 1.8 and 3.5 dB gain over the conventional coded system without using the CITI code at the ADs of 2.5 and 3.0 Tera-bit per square inch (Tb/in2), respectively.

We conduct, in accordance with IEC 61000-4-2, an electrostatic discharge (ESD) test for a small size battery-operated control circuit board in a myoelectric artificial hand system to investigate the influence of the induced noises by indirect ESDs from an ESD generator to a horizontal coupling plane (HCP) and a vertical coupling plane (VCP). A photo-coupler is set between the small size control board and a motor control circuit to suppress noise in the pulse width modulation (PWM) signals. Two types of ESD noise are observed at the output pins of PWM signals. One type is the ESD noise itself (called Type A) and the other one is the ESD noise superimposed over the PWM pulses (Type B). No matter which polarity the charge voltages of the ESD generator have, both types can be observed and the Type A is dominant in the output pulses. Moreover, the ESD interference in the HCP case is found to be stronger than that in the VCP case usually. In the PWM signals observed at the photo-coupler output, on the other hand, Type A noises tend to increase for positive polarity and decrease for negative polarity, while Type B noises tend to increase at -8kV test level in the HCP case. These results suggest that the photo-coupler does not work well for ESD noise suppression. One of the reasons has been demonstrated to be due to the driving capability of the photo-coupler, and other one is due to the presence of a parasitic capacitance between the input and output of the photo-coupler. The parasitic capacitance can yield a capacitive coupling so that high-frequency ESD noises pass through the photo-coupler.

The tree-based routing approach has been known as an efficient method for node mobility management and data packet transmission between two long-distance parties; however, its parameter adjustment must balance control overhead against the convergence speed of topology information according to node mobility. Meanwhile, location-based routing works more efficiently when the distance between the source and destination is relatively short. Therefore, this paper proposes a roadside unit (RSU) based hybrid routing protocol, called RSU-HRP that combines the strengths of both protocols while offsetting their weaknesses. In RSU-HRP, the tree construction is modified to take into account the link and route quality to construct a robust and reliable tree against high node mobility, and an optimized broadcast algorithm is developed to reduce control overhead induced by the advertisement message periodically sent from a roadside unit. In addition, the two routing methods are selectively used based on the computed distance in hops between a source and a destination. Simulation results show that RSU-HRP far outperforms TrafRoute in terms of packet delivery ratio, end-to-end delay, and control overhead in both Vehicle-to-Infrastructure and Vehicle-to-Vehicle communication models.

Superconducting single-flux-quantum (SFQ) device is an emerging device which can realize digital circuits with high switching speed and low power consumption. In SFQ digital circuits, voltage pulses are used for carrier of information, and the representation of logic values is different from that of CMOS circuits. Design methods exclusive to SFQ circuits have been developed. In this paper, we present timing analysis and functional verification methods for SFQ circuits based on new timing model which we call delay-based time frame model. Assuming that possible pulse arrival is periodic, the model defines comprehensive time frames and representation of logic values. In static timing analysis, expected pulse arrival time is checked based on the model, and the order among pulse arrival times is calculated for each logic gate. In functional verification, the circuit behavior is abstracted in a form similar to a synchronous sequential circuit using the order of pulse arrival times, and then the behavior is verified using formal verification tools. Using our proposed methods, we can verify the functional behavior of SFQ circuits with complex clocking scheme, which appear often in practical design but cannot be dealt with in existing verification method. Experimental results show that our method can be applied to practical designs.

In this letter, we propose a novel supervised pre-training technique for deep neural network (DNN)-hidden Markov model systems to achieve robust speech recognition in adverse environments. In the proposed approach, our aim is to initialize the DNN parameters such that they yield abstract features robust to acoustic environment variations. In order to achieve this, we first derive the abstract features from an early fine-tuned DNN model which is trained based on a clean speech database. By using the derived abstract features as the target values, the standard error back-propagation algorithm with the stochastic gradient descent method is performed to estimate the initial parameters of the DNN. The performance of the proposed algorithm was evaluated on Aurora-4 DB, and better results were observed compared to a number of conventional pre-training methods.

In many radio frequency identification (RFID) applications, the reader identifies the tags in its scope repeatedly. For these applications, many algorithms, such as an adaptive binary splitting algorithm (ABS), a single resolution blocking ABS (SRB), a pair resolution blocking ABS (PRB) and a dynamic blocking ABS (DBA) have been proposed. All these algorithms require the staying tags to reply with their IDs to be recognized by the reader. However, the IDs of the staying tags are stored in the reader in the last identification round. The reader can verify the existence of these tags when identifying them. Thus, we propose an anti-collision algorithm with short reply for RFID tag identification (ACSR). In ACSR, each staying tag emits a short reply to indicate its continued existence. Therefore, the data amount transmitted by staying tags is reduced significantly. The identification rate of ACSR is analyzed in this paper. Finally, simulation and analysis results show that ACSR greatly outperforms ABS, SRB and DBA in terms of the identification rate and average amount of data transmitted by a tag.

We propose the concept of an integrated coherent photonic wireless transmitter based on the simultaneous injection locking of two monolithically integrated distributed feedback (DFB) laser diodes (LDs) using an optical frequency comb (OFC). We characterize the basic operation of the transmitter and demonstrate that two injection-locked integrated DFB LDs are sufficiently stable to generate the carrier signal using a uni-traveling-carrier photodiode (UTC-PD) for a real-time error-free (bit error rate: BER < 10-11) coherent transmission with a data rate of 10 Gbit/s at a carrier frequency of 97 GHz. In the coherent wireless transmission, we compare the BER characteristics of the injection-locked transmitter with that of an actively phase-stabilized transmitter and show that the power penalty of 8-dB for the injection-locked transmitter is due to the RF spurious components, which can be reduced by integrating the OFC generator (OFCG) and LDs on the same chip. Our results suggest that the integration of the OFCG, DFB LDs, modulators, semiconductor optical amplifiers, and UTC-PD on the same chip is a promising strategy to develop a practical real-time ultrafast coherent millimeter/terahertz wave wireless transmitter.