Numerous studies have been focusing on the improvement of bag of features (BOF), histogram of oriented gradient (HOG) and scale invariant feature transform (SIFT). However, few works have attempted to learn the connection between them even though the latter two are widely used as local feature descriptor for the former one. Motivated by the resemblance between BOF and HOG/SIFT in the descriptor construction, we improve the performance of HOG/SIFT by a) interpreting HOG/SIFT as a variant of BOF in descriptor construction, and then b) introducing recently proposed approaches of BOF such as locality preservation, data-driven vocabulary, and spatial information preservation into the descriptor construction of HOG/SIFT, which yields the BOF-driven HOG/SIFT. Experimental results show that the BOF-driven HOG/SIFT outperform the original ones in pedestrian detection (for HOG), scene matching and image classification (for SIFT). Our proposed BOF-driven HOG/SIFT can be easily applied as replacements of the original HOG/SIFT in current systems since they are generalized versions of the original ones.

Due to the recent technical advances, GPUs are used for general applications as well as screen display. Many research results have been proposed to the performance of previous CPU-based algorithms by a few hundred times using the GPUs. In this paper, we propose a density-based clustering algorithm called GSCAN, which reduces the number of unnecessary distance computations using a grid structure. As a result of our experiments, GSCAN outperformed CUDA-DClust [2] and DBSCAN [3] by up to 13.9 and 32.6 times, respectively.

The Euler number of a binary image is an important topological property for pattern recognition, and can be calculated by counting certain bit-quads in the image. This paper proposes an efficient strategy for improving the bit-quad-based Euler number computing algorithm. By use of the information obtained when processing the previous bit quad, the number of times that pixels must be checked in processing a bit quad decreases from 4 to 2. Experiments demonstrate that an algorithm with our strategy significantly outperforms conventional Euler number computing algorithms.

The stochastic behavior of inter-core crosstalk in multi-core fiber is discussed based on a theoretical model validated by measurements, and the effect of the crosstalk on the Q-factor in transmission systems, using multi-core fiber is investigated theoretically. The measurements show that the crosstalk rapidly changes with wavelength, and gradually changes with time, in obedience to the Gaussian distribution in I-Q planes. Therefore, the behavior of the crosstalk as a noise may depend on the bandwidth of the signal light. If the bandwidth is adequately broad, the crosstalk may behave as a virtual additive white Gaussian noise on I-Q planes, and the Q-penalty at the Q-factor of 9.8dB is less than 1dB when the statistical mean of the crosstalk from other cores is less than -16.7dB for PDM-QPSK, -23.7dB for PDM-16QAM, and -29.9dB for PDM-64QAM. If the bandwidth is adequately narrow, the crosstalk may behave as virtually static coupling that changes very gradually with time and heavily depends on the wavelength. To cope with a static crosstalk much higher than its statistical mean, a margin of several decibels from the mean crosstalk may be necessary for suppressing Q-penalty in the case of adequately narrow bandwidth.

In this letter, we address monaural source separation based on supervised nonnegative matrix factorization (SNMF) and propose a new penalized SNMF. Conventional SNMF often degrades the separation performance owing to the basis-sharing problem. Our penalized SNMF forces nontarget bases to become different from the target bases, which increases the separated sound quality.

This letter presents a novel method based on sparsity, to solve the problem of deinterleaving pulse trains. The proposed method models the problem of deinterleaving pulse trains as an underdetermined system of linear equations. After determining the mixing matrix, we find sparsest solution of an underdetermined system of linear equations using basis pursuit denoising. This method is superior to previous ones in a number of aspects. First, spurious and missing pulses would not cause any performance reduction in the algorithm. Second, the algorithm works well despite the type of pulse repetition interval modulation that is used. Third, the proposed method is able to separate similar sources.

In this paper we apply angle recoding to the CORDIC-based processing elements in a scalable architecture for complex matrix inversion. We extend the processing elements from the scalable real matrix inversion architecture to the complex domain and obtain the novel scalable complex matrix inversion architecture, which can significantly reduce computational complexity. We rearrange the CORDIC elements to make one half of the processing elements simple and compact. For the other half of the processing elements, the efficient use of angler recoding reduces the number of microrotation steps of the CORDIC elements to 3/4. Consequently, only 3 CORDIC elements are required for the processing elements with full utilization.

The complicated indoor environment such as obstacles causes the non-line of sight (NLOS) environment. In this paper, we propose a voting matrix based residual weighting (VM-Rwgh) algorithm to mitigate NLOS errors in indoor localization system. The voting matrix is employed to provide initial localization results. The residual weighting is used to improve the localization accuracy. The VM-Rwgh algorithm can overcome the effects of NLOS errors, even when more than half of the measurements contain NLOS errors. Simulation results show that the VM-Rwgh algorithm provides higher location accuracy with relatively lower computational complexity in comparison with other methods.

The millimeter-wave band suffers strong attenuation due to rain. While calculating the link budget for a wireless system using this frequency band, the behavior of rain, attenuation due to rain, and the amount of degradation must be accurately understood. This paper presents an evaluation of the influence of rain and its attenuation on link performance in a Tokyo Institute of Technology (Tokyo Tech) millimeter-wave model mesh network. Conventional statistical analyses including cumulative rain rate distribution and specific rain attenuation constants are performed on data collected from 2009 onwards. The unique effects arising due to the highly localized behaviors of strong rainfalls have become clear and are characterized in terms of variograms rather than correlation coefficients. Spatial separation even in the small network here with links of less than 1 km provides effective diversity branches for better availability performance.

Developers often face difficulties while using APIs. API usage patterns can aid them in using APIs efficiently, which are extracted from source code stored in software repositories. Previous approaches have mined repositories to extract API usage patterns by simply applying data mining techniques to the collection of method invocations of API objects. In these approaches, respective functional roles of invoked methods within API objects are ignored. The functional role represents what type of purpose each method actually achieves, and a method has a specific predefined order of invocation in accordance with its role. Therefore, the simple application of conventional mining techniques fails to produce API usage patterns that are helpful for code completion. This paper proposes an improved approach that extracts API usage patterns at a higher abstraction level rather than directly mining the actual method invocations. It embraces a multilevel sequential mining technique and uses categorization of method invocations based on their functional roles. We have implemented a mining tool and an extended Eclipse's code completion facility with extracted API usage patterns. Evaluation results of this tool show that our approach improves existing code completion.

We fabricated highly dense Si nano-columnar structures accompanied with Si nanocrystals on W-coated quartz and characterized their local electrical transport in the thickness direction in a non-contact mode by using a Rh-coated Si cantilever with pulse bias application, in which Vmax, Vmin, and the duty ratio were set at +3.0V, -14V, and 50%, respectively. By applying a pulse bias to the bottom W electrode with respect to a grounded top electrode made of ∼10-nm-thick Au on a sample surface, non-uniform current images in correlation with surface morphologies reflecting electron emission were obtained. The change in the surface potential of the highly dense Si nano-columnar structures accompanied with Si nanocrystals, which were measured at room temperature by using an AFM/Kelvin probe technique, indicated electron injection into and extraction from Si nanocrystals, depending on the tip bias polarity. This result is attributable to efficient electron emission under pulsed bias application due to electron charging from the top electrode to the Si nanocrystals in a positively biased duration at the bottom electrode and subsequent quasi-ballistic transport through Si nanocrystals in a negatively biased duration.

In this letter, we evaluate the parasitic capacitance of an LCD touch panel, the description and implementation of a differential input sensing circuit, and an algorithm suitable for large LCDs with integrated touch function. When projected capacitive touch sensors are integrated with a liquid crystal display, the sensors have a very large amount of parasitic capacitance with the display elements. A differential input sensing circuit can detect small changes in the mutual capacitance from the touch of a finger. The circuit is realized using discrete components, and for the evaluation of a large-sized LCD touch panel, a printed circuit board touch panel is used.

Homotopy methods are known to be effective methods for finding DC operating points of nonlinear circuits with the theoretical guarantee of global convergence. There are several types of homotopy methods; as one of the most efficient methods for solving bipolar transistor circuits, the variable-gain homotopy (VGH) method is well-known. In this paper, we propose an efficient VGH method for solving bipolar and MOS transistor circuits. We also show that the proposed method converges to a stable operating point with high possibility from any initial point. The proposed method is not only globally convergent but also more efficient than the conventional VGH methods. Moreover, it can easily be implemented in SPICE.

In this paper, we investigate a combination scheme of subcarrier intensity-modulation (SIM) with spatial modulation (SM) for optical wireless communication. Using computer simulation, the performances of the proposed SIM/SM scheme are investigated and compared with those of the conventional SIM scheme in the additive white gaussian noise (AWGN) as well as in outdoor environment with turbulence induced fading characteristics. Numerical results show that the proposed SIM/SM scheme can outperform the conventional SIM in an environment with different spectral efficiencies. When the spectral efficiency is varied from 2bits/s/Hz to 4bits/s/Hz, an Eb/N0 gain of 2dB to 5dB is achieved, when the bit error rate of 10-5 is maintained. It shows that the employment of SM may further improve the power efficiency of SIM, when the number of subcarriers increases according to the spectral efficiency. When the spectral efficiency is 4bits/s/Hz, the SIM/SM scheme for 0.5 of log-irradiance variance in the log-normal turbulence channel shows the same performance as SIM with variance of 0.3. This means that the SIM/SM can be an alternative choice in even worse environments.

The authors have evaluated a method of expanding the bit depth of image signals called SGRAD, which requires fewer calculations, while degrading the sharpness of images less. Where noise is superimposed on image signals, the conventional method for obtaining high bit depth sometimes incorrectly detects the contours of images, making it unable to sufficiently correct the gradation. Requiring many line memories is also an issue with the conventional method when applying the process to vertical gradation. As a solution to this particular issue, SGRAD improves the method of detecting contours with transiting gradation to effectively correct the gradation of image signals which noise is superimposed on. In addition, the use of a prediction algorithm for detecting gradation reduces the scale of the circuit with less correction of the vertical gradation.

The success of any project can be affected by requirements changes. Requirements elicitation is a series of activities of adding, deleting, and modifying requirements. We refer to the completion of requirements elicitation of a software component as requirements maturation. When the requirements of each component have reached the 100% maturation point, no requirement will come to the component. This does not mean that a requirements analyst (RA) will reject the addition of requirements, but simply, that the additional requirements will not come to the project. Our motivation is to provide measurements by which an RA can estimate one of the maturation periods: the early, middle, or late period of the project. We will proceed by introducing the requirements maturation efficiency (RME). The RME of the requirements represents how quickly the requirements of a component reach 100% maturation. Then, we will estimate the requirements maturation period for every component by applying the RME. We assume that the RME is derived from its accessibility from an RA to the requirements source and the stability of the requirements. We model accessibility as the number of information flows from the source of the requirements to the RA, and further, model stability with the requirements maturation index (RMI). According to the multiple regression analysis of a case, we are able to get an equation on RME derived from these two factors with a significant level of 5%. We evaluated the result by comparing it to another case, and then discuss the effectiveness of the measurements.

A low VDD current mirror with deep sub-micron vertical MOSFETs is presented. The keys are new bias circuits to reduce both the minimum VDD for the operation and the sensitivity of the output current on VDD. In the simulation, our circuits reduce the minimum VDD by about 17% and the VDD sensitivity by one order both from those of the conventional. In the simulation with 90nm φ vertical MOSFET approximate models, our circuit shows about 4MΩ output resistance at 1.2-V VDD with the small temperature dependence, which is about six times as large as that with planar MOSFETs.

The delay time component (τs) of an InGaAs MOSFET caused by dynamic source resistance is discussed. On the basis of the relationship between the current density (J) and the dynamic source resistance (rs), the value of rs is proportional to 1/J with some offset at low current densities, whereas the offset becomes smaller in a region of high current density. The value of τs depends on the current in a way similar to rs. Because the offset in the high-current-density region is proportional to the square root of the effective mass, an InGaAs MOSFET with a small mass has a shorter rs than a Si MOSFET.

To improve metal oxide semiconductor field effect transistors (MOSFET) performance, flat interface between gate insulator and silicon (Si) should be realized. In this paper, the influence of Si surface roughness on electrical characteristics of MOSFET with hafnium oxynitride (HfON) gate insulator formed by electron cyclotron resonance (ECR) plasma sputtering was investigated for the first time. The surface roughness of Si substrate was reduced by Ar/4.9%H2 annealing utilizing conventional rapid thermal annealing (RTA) system. The obtained root-mean-square (RMS) roughness was 0.07nm (without annealed: 0.18nm). The HfON was formed by 2nm-thick HfN deposition followed by the Ar/O2 plasma oxidation. The electrical properties of HfON gate insulator were improved by reducing Si surface roughness. It was found that the current drivability of fabricated nMOSFETs was remarkably increased by reducing Si surface roughness. Furthermore, the reduction of Si surface roughness also leads to decrease of the 1/f noise.

This study proposes a feature-level fusion method that uses finger veins (FVs) and finger dorsal texture (FDT) for personal authentication based on orientation selection (OS). The orientation codes obtained by the filters correspond to different parts of an image (foreground or background) and thus different orientations offer different levels of discrimination performance. We have conducted an orientation component analysis on both FVs and FDT. Based on the analysis, an OS scheme is devised which combines the discriminative orientation features of both modalities. Our experiments demonstrate the effectiveness of the proposed method.