In this paper, we investigate how to achieve call admission control (CAC) for guaranteeing call dropping probability QoS which is caused by handoff timeout in cognitive radio (CR) networks. When primary user (PU) appears, spectrum handoff should be initiated to maintain secondary user (SU)'s link. We propose a novel virtual queuing (VQ) scheme to schedule spectrum handoff requests sent by multiple SUs. Unlike the conventional first-come-first-served (FCFS) scheduling, resuming transmission in the original channel has higher priority than switching to another channel. It costs less because it avoids the cost of signaling frequent spectrum switches. We characterize the handoff delay on the effect of PU's behavior and the number of SUs in CR networks. And user capacity under certain QoS requirement is derived as a guideline for CAC. The analytical results show that call dropping performance can be greatly improved by CAC when a large amount of SUs arrives fast as well as the VQ scheme is verified to reduce handoff cost compared to existing methods.

PEiD is a packer identification tool widely used for malware analysis but its accuracy is becoming lower and lower recently. There exist two major reasons for that. The first is that PEiD does not provide a way to create signatures, though it adopts a signature-based approach. We need to create signatures manually, and it is difficult to catch up with packers created or upgraded rapidly. The second is that PEiD utilizes exact matching. If a signature contains any error, PEiD cannot identify the packer that corresponds to the signature. In this paper, we propose a new automated packer identification method to overcome the limitations of PEiD and report the results of our numerical study. Our method applies string-kernel-based support vector machine (SVM): it can measure the similarity between packed programs without our operations such as manually creating signature and it provides some error tolerant mechanism that can significantly reduce detection failure caused by minor signature violations. In addition, we use the byte sequence starting from the entry point of a packed program as a packer's feature given to SVM. That is, our method combines the advantages from signature-based approach and machine learning (ML) based approach. The numerical results on 3902 samples with 26 packer classes and 3 unpacked (not-packed) classes shows that our method achieves a high accuracy of 99.46% outperforming PEiD and an existing ML-based method that Sun et al. have proposed.

This paper deals with carrier frequency offset (CFO) estimation based on the minimum variance distortionless response (MVDR) criterion without using specific training sequences for interleaved orthogonal frequency division multiple access (OFDMA) uplink systems. In the presence of large CFOs, the estimator is proposed to find a new CFO vector based on the first-order Taylor series expansion of the one initially given. The problem of finding the new CFO vector is formulated as the closed form of a generalized eigenvalue problem, which allows one to readily solve it. Since raising the accuracy of residual CFO estimation can provide more accurate residual CFO compensation, this paper also present a decision-directed MVDR approach to improve the CFO estimation performance. However, the proposed estimator can estimate CFOs with less computation load. Several computer simulation results are provided for illustrating the effectiveness of the proposed blind estimate approach.

Space-time block code (STBC) with complex orthogonal designs achieves full diversity with a simple maximum-likelihood (ML) decoding, however, do not achieve a full transmission rate for more than two antennas. To attain a higher transmission rate, STBC with quasi-orthogonal designs were proposed, whereas there are interference terms caused by relaxing the orthogonality. It has an impact on decoding complexity because a receiver needs to decode two symbols at a time. Moreover, QO-STBC does not achieve full diversity. In this paper, we propose a scheme which makes possible to decode symbols one by one, and two schemes which gain full transmission diversity by upsetting the balance of the transmit power and rotating constellation.

This paper proposes a novel design method involving the stages from analog circuit design to layout synthesis in hope of suppressing the process-induced variations with a design style called transistor array. We manage to decompose the transistors into unified sub-transistors, and arrange the sub-transistors on a uniform placement grid so that a better post-CMP profile is expected to be achieved, and that the STI-stress is evened up to alleviate the process variations. However, since lack of direct theoretical support to the transistor decomposition, we analyze and evaluate the errors arising from the decomposition in both large and small signal analysis. A test chip with decomposed transistors on it confirmed our analysis and suggested that the errors are negligibly small and the design with transistor array is applicable. Based on this conclusion, a design flow with transistor array covering from circuit design to layout synthesis is proposed, and several design cases, including three common-source amplifiers, three two-stage OPAMPS and a nano-watt current reference, are implemented on a test chip with the proposed method, to demonstrate the feasibility of our idea. The measurement results from the chip confirmed that the designs with transistor array are successful, and the proposed method is applicable.

This paper presents a study of the applicability of clusters of GPUs to high-resolution 3D simulations of cardiac electrophysiology. By experimenting with representative cardiac cell models and ODE solvers, in association with solving the monodomain equation, we quantitatively analyze the obtainable computational capacity of GPU clusters. It is found that for a 501×501×101 3D mesh, which entails a 0.1mm spatial resolution, a 128-GPU cluster only needs a few minutes to carry out a 100,000-time-step cardiac excitation simulation that involves a four-variable cell model. Even higher spatial and temporal resolutions are achievable for such simplified mathematical models. On the other hand, our experiments also show that a dramatically larger cluster of GPUs is needed to handle a very detailed cardiac cell model.

In this paper, joint transmit/receive frequency-domain equalization (FDE) is proposed for analog network coded (ANC) single-carrier (SC) bi-directional multi-antenna relay. In the proposed scheme, diversity transmission using transmit FDE is performed at relay station (RS) equipped with multiple antennas while receive FDE is carried out at base station (BS) and mobile terminal (MT) both equipped with single antenna. The transmit and receive FDE weights are jointly optimized so as to minimize the end-to-end mean square error (MSE). We evaluate, by computer simulation, the throughput performance and show that the joint transmit/receive FDE obtains the spatial and frequency diversity gains and accordingly achieve better throughput performance compared to either the transmit FDE only or the receive FDE only. It is also shown that ANC SC bi-directional multi-antenna relay can extend the communication coverage area for the given required throughput compared to conventional direct transmission.

In wireless networks, how to provide reliable data transfer is an important and challenging issue due to channel fading and interference. Several approaches, e.g., Automatic Repeat reQuest (ARQ), Hybrid ARQ (HARQ) and Network Coding (NC), are used to enhance reliability of transmission in wireless networks. However, we note that these schemes implement the data recovery process for mixed unicast and multicast (MUM) communications by simply separating the process into two phases, unicast and multicast phase. This is inefficient and expensive. In this paper, we propose an efficient retransmission scheme with network coding for MUM transmission, aiming at improving bandwidth utilization. UMNC searches for coding opportunities from both unicast and multicast flows, which offer the potential benefit of improved recovery in the event of packet loss. We theoretically prove that UMNC can effectively reduce the total number of retransmissions and thus improve bandwidth efficiency, compared with existing schemes.

In this letter, parallel orthogonal matching pursuit (POMP) is proposed to supplement orthogonal matching pursuit (OMP) which has been widely used as a greedy algorithm for sparse signal recovery. Empirical simulations show that POMP outperforms the existing sparse signal recovery algorithms including OMP, compressive sampling matching pursuit (CoSaMP), and linear programming (LP) in terms of the exact recovery ratio (ERR) for the sparse pattern and the mean-squared error (MSE) between the estimated signal and the original signal.

Microwave-assisted magnetic recording (MAMR) has been proposed as a candidate technology to realize areal recording densities of over 2 Tbit/inch2. MAMR requires a spin-torque oscillator (STO) to generate a strong high-frequency magnetic field that will induce magnetic resonance in the recording medium. The oscillation characteristics of STOs were previously investigated using a micromagnetic model that neglected the magnetic interaction among the STO, the single-pole-type (SPT) writer, and the recording head. The STO is typically placed in the gap between the main pole and the trailing shield of the SPT writer, so that the STO is inevitably subjected to strong magnetic interaction with the main pole and the trailing shield. We have developed a new simulator, referred to as an integrated MAMR simulator, that takes this interaction into account. The integrated simulator has revealed that the magnetic interaction has a strong influence on the oscillation characteristics.

In spite of continuous improvement of computational power of multi/many-core processors, the memory access performance of the processors has not been improved sufficiently, and thus the overall performance of recent processors is often restricted by the delay of off-chip memory accesses. Low-delay data compression for last level cache (LLC) would be effective to improve the processor performance because the compression increases the effective size of LLC, and thus reduces the number of off-chip memory accesses. This paper proposes a novel data compression method suitable for high-speed parallel decoding in the LLC. Since cache line data often have periodicity of certain lengths, such as 32- or 64-bit instructions, 32-bit integers, and 64-bit floating point numbers, an information word is encoded as a base pattern and a differential pattern between the original word and the base pattern. Evaluation using a GPU simulator shows that the compression ratio of the proposed coding is comparable to LZSS coding and X-Match Pro and superior to other conventional compression algorithms for cache memories. Also this paper presents an experimental decoder designed for ASIC, and the synthesized result shows that the decoder can decompress cache line data of length 32bytes in four clock cycles. Evaluation of the IPC on the GPU simulator shows that, for several benchmark programs, the IPC achieved by the proposed coding is higher than that by the conventional BΔI coding, where the maximum improvement of the IPC is 20%.

This paper studies channel sounding for selfish dynamic spectrum control (S-DSC) in which each link dynamically maps its spectral components onto a necessary amount of discrete frequencies having the highest channel gain of the common system band. In S-DSC, it is compulsory to conduct channel sounding for the entire system band by using a reference signal whose spectral components are sparsely allocated by S-DSC. Using nonuniform sampling theory, this paper exploits the finite impulse response characteristic of frequency selective fading channels to carry out the channel sounding. However, when the number of spectral components is relatively small compared to the number of discrete frequencies of the system band, reliability of the channel sounding deteriorates severely due to the ill-conditioned problem and degradation in channel capacity of the next frame occurs as a result. Aiming at balancing frequency selection diversity effect and reliability of channel sounding, this paper proposes an S-DSC which allocates an appropriate number of spectral components onto discrete frequencies with low predicted channel gain besides mapping the rest onto those with high predicted channel gain. A numerical analysis confirms that the proposed S-DSC gives significant enhancement in channel capacity performance.

This paper presents a real-time and memory-efficient arrhythmia detection system with binary classification that uses antidictionary coding for the analysis and classification of electrocardiograms (ECGs). The measured ECG signals are encoded using a lossless antidictionary encoder, and the system subsequently uses the compression rate to distinguish between normal beats and arrhythmia. An automated training data procedure is used to construct the automatons, which are probabilistic models used to compress the ECG signals, and to determine the threshold value for detecting the arrhythmia. Real-time computer simulations with samples from the MIT-BIH arrhythmia database show that the averages of sensitivity and specificity of the proposed system are 97.8% and 96.4% for premature ventricular contraction detection, respectively. The automatons are constructed using training data and comprise only 11 kilobytes on average. The low complexity and low memory requirements make the system particularly suitable for implementation in portable ECG monitors.

This paper presents a stream programming framework, named GPU-chariot, for accelerating stream applications running on graphics processing units (GPUs). The main contribution of our framework is that it realizes efficient software pipelines on multi-GPU systems by enabling out-of-order execution of CPU functions, kernels, and data transfers. To achieve this out-of-order execution, we apply a runtime scheduler that not only maximizes the utilization of system resources but also encapsulates the number of GPUs available in the system. In addition, we implement a load-balancing capability to flow data efficiently through multiple GPUs. Furthermore, a callback interface enables overlapping execution of functions in third-party libraries. By using kernels with different performance bottlenecks, we show that our out-of-order execution is up to 20% faster than in-order execution. Finally, we conduct several case studies on a 4-GPU system and demonstrate the advantages of GPU-chariot over a manually pipelined code. We conclude that GPU-chariot can be useful when developing stream applications with software pipelines on multiple GPUs and CPUs.

Bit-patterned medium (BPM) is one of the promising approaches for ultra-high density magnetic recording systems. However, BPM requires precise write synchronization, and exhibits write-errors due to insufficient write field gradient, medium switching field distribution (SFD), demagnetization field from adjacent islands, and island position variation. In this paper, an iterative decoding system using a non-binary low-density parity-check (LDPC) code is considered for a BPM R/W channel with write-errors at an areal recording density of 2Tbit/inch2 including the coding rate loss. The performance of the iterative decoding system using the non-binary LDPC code over the Galois field GF(28) is evaluated by computer simulation, and it is compared with the conventional iterative decoding system using a binary LDPC code. The results show that the non-binary LDPC system has a larger write margin than the binary LDPC system.

To analyze the structure of a set of perfect sequences over a composition algebra of the real number field, transforms of a set of sequences similar to the discrete Fourier transform (DFT) are introduced. The discrete cosine transform, discrete sine transform, and generalized discrete Fourier transform (GDFT) of the sequences are defined and the fundamental properties of these transforms are proved. We show that GDFT is bijective and that there exists a relationship between these transforms and a convolution of sequences. Applying these properties to the set of perfect sequences, a parameterization theorem of such sequences is obtained.

Temporal Decorrelation source SEParation (TDSEP) is a blind separation scheme that utilizes the time structure of the source signals, typically, their periodicities. The advantage of TDSEP over non-Gaussianity based methods is that it can separate Gaussian signals as long as they are periodic. However, its shortcoming is that separation performance (SEP) heavily depends upon the values of the time shift parameters (TSPs). This paper proposes a method to automatically and blindly estimate a set of TSPs that achieves optimal SEP against periodic Gaussian signals. It is also shown that, selecting the same number of TSPs as that of the source signals, is sufficient to obtain optimal SEP, and adding more TSPs does not improve SEP, but only increases the computational complexity. The simulation example showed that the SEP is higher by approximately 20dB, compared with the ordinary method. It is also shown that the proposed method successfully selects just the same number of TSPs as that of incoming signals.

In this paper, we propose an adaptive voltage huddle-based distributed-register architecture (AVHDR architecture), which integrates dynamic multiple supply voltages and interconnection delay into high-level synthesis. In AVHDR architecture, voltages can be dynamically assigned for energy reduction. In other words, low supply voltages are assigned to non-critical operations, and leakage power is cut off by turning off the power supply to the sleeping functional units. Next, an AVHDR-based high-level synthesis algorithm is proposed. Our algorithm is based on iterative improvement of scheduling/binding and floorplanning. In the iteration process, the modules in each huddle can be placed close to each other and the corresponding AVHDR architecture can be generated and optimized with floorplanning information. Experimental results show that on average our algorithm achieves 43.9% energy-saving compared with conventional algorithms.

This paper studies the performance of code-aided (CA) soft-information based carrier phase recovery, which iteratively exploits the extrinsic information from channel decoder to improve the accuracy of phase synchronization. To tackle the problem of strong coupling between phase recovery and decoding, a semi-analytical model is proposed to express the distribution of extrinsic information as a function of phase offset. Piecewise approximation of the hyperbolic tangent function is employed to linearize the expression of soft symbol decision. Building on this model, open-loop characteristic and closed-loop performance of CA iterative soft decision-directed (ISDD) carrier phase synchronizer are derived in closed-form. Monte Carlo simulation results corroborate that the proposed expressions are able to characterize the performance of CA ISDD carrier phase recovery for systems with different channel codes.

Optical Code Division Multiplexing (OCDM) is a multiplexing technology for constructing future all-optical networks. Compared with other multiplexing technologies, it can be easily controlled and can establish lightpaths of smaller granularity. However, previous research has revealed that OCDM networks are vulnerable to cycle attacks. Cycle attacks are caused by multi-access interference (MAI), which is crosstalk noise on the same wavelength in OCDM networks. If cycle attacks occur, they disrupt all network services immediately. Previous research has proposed a logical topology design that is free of cycle attacks. However, this design assumes that path assignment is centrally controlled. It also does not consider the delay between each node and the centralized controller. In this paper, we propose novel logical topology designs that are free of cycle attacks and methods of establishing paths. The basic concepts underlying our methods are to autonomously construct a cycle-attack-free logical topology and to establish lightpaths by using a distributed controller. Our methods can construct a logical network and establish lightpaths more easily than the previous method can. In addition, they have network scalability because of their distributed control. Simulation results show that our methods have lower loss probabilities than the previous method and better mean hop counts than the centralized control approach.