Haiyang LI Tieran ZHENG Guibin ZHENG Jiqing HAN
In this paper, we propose a novel confidence measure to improve the performance of spoken term detection (STD). The proposed confidence measure is based on the context consistency between a hypothesized word and its context in a word lattice. The main contribution of this paper is to compute the context consistency by considering the uncertainty in the results of speech recognition and the effect of topic. To measure the uncertainty of the context, we employ the word occurrence probability, which is obtained through combining the overlapping hypotheses in a word posterior lattice. To handle the effect of topic, we propose a method of topic adaptation. The adaptation method firstly classifies the spoken document according to the topics and then computes the context consistency of the hypothesized word with the topic-specific measure of semantic similarity. Additionally, we apply the topic-specific measure of semantic similarity by two means, and they are performed respectively with the information of the top-1 topic and the mixture of all topics according to topic classification. The experiments conducted on the Hub-4NE Mandarin database show that both the occurrence probability of context word and the topic adaptation are effective for the confidence measure of STD. The proposed confidence measure performs better compared with the one ignoring the uncertainty of the context or the one using a non-topic method.
Li ZENG Xiongwei ZHANG Liang CHEN Weiwei YANG
Presented is a new measuring and reconstruction framework of Compressed Sensing (CS), aiming at reducing the measurements required to ensure faithful reconstruction. A sparse vector is segmented into sparser vectors. These new ones are then randomly sensed. For recovery, we reconstruct these vectors individually and assemble them to obtain the original signal. We show that the proposed scheme, referred to as SegOMP, yields higher probability of exact recovery in theory. It is finished with much smaller number of measurements to achieve a same reconstruction quality when compared to the canonical greedy algorithms. Extensive experiments verify the validity of the SegOMP and demonstrate its potentials.
Takeshi KUMAKI Kei NAKAO Kohei HOZUMI Takeshi OGURA Takeshi FUJINO
This paper reports on the image compression tolerability and high implementability of a novel proposed watermarking method that uses a morphological wavelet transform based on max-plus algebra. This algorithm is suitable for embedded low-power processors in mobile devices. For objective and unified evaluation of the capability of the proposed watermarking algorithm, we focus attention on a watermarking contest presented by the IHC, which belongs to the IEICE and investigate the image quality and tolerance against JPEG compression attack. During experiments for this contest, six benchmark images processed by the proposed watermarking is done to reduce the file size of original images to 1/10, 1/20, or less, and the error rate of embedding data is reduced to 0%. Thus, the embedded data can be completely extracted. The PSNR value is up to 54.66dB in these experiments. Furthermore, when the smallest image size is attained 0.49MB and the PSNR value become about 52dB, the proposed algorithm maintains very high quality with an error rate of 0%. Additionally, the processing time of the proposed watermarking can realize about 416.4 and 4.6 times faster than that of DCT and HWT on the ARM processor, respectively. As a result, the proposed watermarking method achieves effective processing capability for mobile processors.
Bo WU Yan WANG Xiuying CAO Pengcheng ZHU
Attenuated and delayed versions of the pulse signal overlap in multipath propagation. Previous algorithms can resolve them only if signal sampling is ideal, but fail to resolve two counterparts with non-ideal sampling. In this paper, we propose a novel method which can resolve the general types of non-ideally sampled pulse signals in the time domain via Taylor Series Expansion (TSE) and estimate multipath signals' precise time delays and amplitudes. In combination with the CLEAN algorithm, the overlapped pulse signal parameters are estimated one by one through an iteration method. Simulation results verify the effectiveness of the proposed method.
Takahiro YAMAMOTO Takeaki SAIKAI Eiichi YAMADA Hiroshi YASAKA
A reduction in the intensity deviation of a nine-channel optical frequency comb block (OFCB) is demonstrated, by adopting an asymmetric differential drive method for an InP-based dual drive Mach-Zehnder modulator. The generation of a tailored OFCB with an intensity deviation of less than 0.8dB is confirmed by using the modulator.
Per-User Unitary Rate Control (PU2RC) performs poorly when the number of users is small and suffers from the sum-rate ceiling effect in the high signal-to-noise ratio (SNR) regime. In this paper, we propose a multimode transmission (MMT) strategy to overcome these inherent shortcomings of PU2RC. In the proposed MMT strategy, the transmitter finds out the optimal transmission mode and schedules users using each user's instantaneous channel quality information (CQI) parameters. First we assume that each user's CQI parameters are perfectly reported in order to introduce the proposed MMT strategy. Then we consider the quantization of CQI parameters using codebooks designed by the Lloyd algorithm. Moreover, we modify the CQI parameters to improve the system's robustness against quantization error. Finally, in order to reduce the quantization error, we design a hierarchical codebook to jointly quantize the modified CQI parameters by considering the correlation between them. Simulation results show that the proposed MMT strategy effectively overcomes the shortcomings of PU2RC and is robust against low quantization level of CQI parameters.
Norihiro KAMAE Akira TSUCHIYA Hidetoshi ONODERA
A body bias generator (BBG) for fine-grained body biasing (FGBB) is proposed. The FGBB is effective to reduce variability and power consumption in a system-on-chip (SoC). Since FGBB needs a number of BBGs, the BBG is preferred to be implemented in cell-based design procedure. In the cell-based design, it is inefficient to provide an extra supply voltage for BBGs. We invented a BBG with switched capacitor configuration and it enables BBG to operate with wide range of the supply voltage from 0.6V to 1.2V. We fabricated the BBG in a 65nm CMOS process to control 0.1mm2 of core circuit with the area overhead of 1.4% for the BBG.
Ashir AHMED Andrew REBEIRO-HARGRAVE Yasunobu NOHARA Eiko KAI Zahidul HOSSEIN RIPON Naoki NAKASHIMA
This study looks at how an e-Health System can reduce morbidity (poor health) in unreached communities. The e-Health system combines affordable sensors and Body Area Networking technology with mobile health concepts and is called a Portable Health Clinic. The health clinic is portable because all the medical devices fit inside a briefcase and are carried to unreached communities by a healthcare assistants. Patient morbidity is diagnosed using software stratification algorithm and categorized according to triage color-coding scheme within the briefcase. Morbid patients are connected to remote doctor in a telemedicine call center using the mobile network coverage. Electronic Health Records (EHR) are used for the medical consultancy and e-Prescription is generated. The effectiveness of the portable health clinic system to target morbidity was tested on 8690 patients in rural and urban areas of Bangladesh during September 2012 to January 2013. There were two phases to the experiment: the first phase identified the intensity of morbidity and the second phase re-examined the morbid patients, two months later. The experiment results show a decrease in patients to identify as morbid among those who participated in telemedicine process.
Traditionally, in computer systems, file I/O has been a big performance bottleneck for I/O intensive applications. The recent advent of non-volatile byte-addressable memory (NVM) technologies such as STT-MRAM and PCM, provides a chance to store persistent data with a high performance close to DRAM's. However, as the location of the persistent storage device gets closer to the CPU, the system software layers overheads for accessing the data such as file system layer including virtual file system layer and device driver are no longer negligible. In this paper, we propose a light-weight user-level persistent storage, called UStore, which is physically allocated on the NVM and is mapped directly into the virtual address space of an application. UStore makes it possible for the application to fast access the persistent data without the system software overheads and extra data copy between the user space and kernel space. We show how UStore is easily applied to existing applications with little elaboration and evaluate its performance enhancement through several benchmark tests.
Christian Henry Wijaya OEY Sangman MOH
One of the most important requirements for a routing protocol in wireless body area networks (WBANs) is to lower the network's temperature increase. The temperature of a node is closely related to its activities. The proactive routing approach, which is used by existing routing protocols for WBANs, tends to produce a higher temperature increase due to more frequent activities, compared to the on-demand reactive routing approach. In this paper, therefore, we propose a reactive routing protocol for WBANs called priority-based temperature-aware routing (PTR). In addition to lowering the temperature increase, the protocol also recognizes vital nodes and prioritizes them so they are able to achieve higher throughput. Simulation results show that the PTR protocol achieves a 50% lower temperature increase compared to the conventional temperature-aware routing protocol and is able to improve throughput of vital nodes by 35% when the priority mode is enabled.
Daisuke ANZAI Takashi KOYA Jingjing SHI Jianqing WANG
Space diversity reception is well known as a technique that can improve the performance of wireless communication systems without any temporal and spectral resource expansion. Implant body area networks (BANs) require high-speed transmission and low energy consumption. Therefore, applying spatial diversity reception to implant BANs can be expected to fulfill these requirements. For this purpose, this paper presents a local frequency offset diversity system with π/4-differential quadrature phase shift keying (DQPSK) for implant BANs that offer improved communication performance with a simpler receiver structure, and evaluates the proposal's bit error rate (BER) performance by theoretical analysis. In the theoretical analysis, it is difficult to analytically derive the probability density function (pdf) on the combined signal-to-noise power ratio (SNR) at the local offset frequency diversity receiver output. Therefore, this paper adopts the moment generating function approximation method and demonstrates that the resulting theoretical analyses yield performances that basically match the results of computer simulations. We first confirm that the local frequency offset diversity reception can effectively improve the communication performance of implant BANs. Next, we perform an analysis of a realistic communication performance, namely, a link budget analysis based on derived BER performance and evaluate the link parameters including system margin, maximum link distance and required transmit power. These analyses demonstrate that the local frequency offset diversity system can realize a reliable communication link in a realistic implant BAN scenario.
Ryochi KATAOKA Kentaro NISHIMORI Takefumi HIRAGURI Naoki HONMA Tomohiro SEKI Ken HIRAGA Hideo MAKINO
A novel analog decoding method using only 90-degree phase shifters is proposed to simplify the decoding method for short-range multiple-input multiple-output (MIMO) transmission. In a short-range MIMO transmission, an optimal element spacing that maximizes the channel capacity exists for a given transmit distance between the transmitter and receiver. We focus on the fact that the weight matrix by zero forcing (ZF) at the optimal element spacing can be obtained by using dividers and 90-degree phase shifters because it can be expressed by a unitary matrix. The channel capacity by the proposed method is next derived for the evaluation of the exact limitation of the channel capacity. Moreover, it is shown that an optimal weight when using directional antennas can be expressed by using only dividers, 90-degree phase shifters, and attenuators, regardless of the beam width of the directional antenna. Finally, bit error rate and channel capacity evaluations by both simulation and measurement confirm the effectiveness of the proposed method.
Yijian GONG Manuel MURBACH Teruo ONISHI Myles CAPSTICK Toshio NOJIMA Niels KUSTER
The objective of this paper is to extend the dosimetric assessment of 35mm Petri dishes exposed in the standing wave of R18 waveguides operated at 1950MHz for a medium-oil two-layer configuration for cells in monolayer and suspension. The culture medium inside the Petri dish is covered by oil that prevents evaporation and seals the cells below in the medium. The exposure of the cells was analyzed for one suspension-medium configuration, two different suspension-multilayer configurations, and one monolayer-multilayer configuration. The numerical dosimetry is verified by dosimetric temperature measurements. The non-uniformity of the specific absorption rate (SAR) distribution is 30% for monolayer, and 59-75% for suspension configurations. The latter should be taken into account when biological experiment is performed.
Yoichi TOMIOKA Ryota TAKASU Takashi AOKI Eiichi HOSOYA Hitoshi KITAZAWA
Hardware acceleration is an essential technique for extracting and tracking moving objects in real time. It is desirable to design tracking algorithms such that they are applicable for parallel computations on hardware. Exclusive block matching methods are designed for hardware implementation, and they can realize detailed motion extraction as well as robust moving object tracking. In this study, we develop tracking hardware based on an exclusive block matching method on FPGA. This tracking hardware is based on a two-dimensional systolic array architecture, and can realize robust moving object extraction and tracking at more than 100 fps for QVGA images using the high parallelism of an exclusive block matching method, synchronous shift data transfer, and special circuits to accelerate searching the exclusive correspondence of blocks.
Trung Thanh NGO Yasushi MAKIHARA Hajime NAGAHARA Yasuhiro MUKAIGAWA Yasushi YAGI
Gait-based owner authentication using accelerometers has recently been extensively studied owing to the development of wearable electronic devices. An actual gait signal is always subject to change due to many factors including variation of sensor attachment. In this research, we tackle to the practical sensor-orientation inconsistency, for which signal sequences are captured at different sensor orientations. We present an iterative signal matching algorithm based on phase-registration technique to simultaneously estimate relative sensor-orientation and register the 3D acceleration signals. The iterative framework is initialized by using 1D orientation-invariant resultant signals which are computed from 3D signals. As a result, the matching algorithm is robust to any initial sensor-orientation. This matching algorithm is used to match a probe and a gallery signals in the proposed owner authentication method. Experiments using actual gait signals under various conditions such as different days, sensors, weights being carried, and sensor orientations show that our authentication method achieves positive results.
Zhao-xin XIONG Min CAI Xiao-Yong HE Yun YANG
A digital background calibration technique using signal-dependent dithering is proposed, to correct the nonlinear errors which results from capacitor mismatches and finite opamp gain in pipelined analog-to-digital converter (ADC). Large magnitude dithers are used to measure and correct both errors simultaneously in background. In the proposed calibration system, the 2.5-bit capacitor-flip-over multiplying digital-to-analog converter (MDAC) stage is modified for the injection of large magnitude dithering by adding six additional comparators, and thus only three correction parameters in every stage subjected to correction were measured and extracted by a simple calibration algorithm with multibit first stage. Behavioral simulation results show that, using the proposed calibration technique, the signal-to-noise-and-distortion ratio improves from 63.3 to 79.3dB and the spurious-free dynamic range is increased from 63.9 to 96.4dB after calibrating the first two stages, in a 14-bit 100-MS/s pipelined ADC with σ=0.2% capacitor mismatches and 60dB nonideal opamp gain. The time of calibrating the first two stages is around 1.34 seconds for the modeled ADC.
Yoshitaka TAKAHASHI Hiroshi SHIMADA Masaaki MAEZAWA Yoshinao MIZUGAKI
We present our design and operation of a 6-bit quasi-triangle voltage waveform generator comprising three circuit blocks; an improved variable Pulse Number Multiplier (variable-PNM), a Code Generator (CG), and a Double-Flux-Quantum Amplifier (DFQA). They are integrated into a single chip using a niobium Josephson junction technology. While the multiplication factor of our previous m-bit variable-PNM was limited between 2m-1 and 2m, that of the improved one is extended between 1 and 2m. Correct operations of the 6-bit variable-PNM are confirmed in low-speed testing with respect to the codes from the CG, whereas generation of a 6-bit, 0.20mVpp quasi-triangle voltage waveform is demonstrated with the 10-fold DFQA in high-speed testing.
Kyosuke SANO Yuki YAMANASHI Nobuyuki YOSHIKAWA
We have been developing a superconducting time-of-flight mass spectrometry (TOF-MS) system, which utilizes a superconductive strip ion detector (SSID) and a single-flux-quantum (SFQ) multi-stop time-to-digital converter (TDC). The SFQ multi-stop TDC can measure the time intervals between multiple input signals and directly convert them into binary data. In this study, we designed and implemented 24-bit SFQ multi-stop TDCs with a 3×24-bit FIFO buffer using the AIST Nb standard process (STP2), whose time resolution and dynamic range are 100ps and 1.6ms, respectively. The timing jitter of the TDC was investigated by comparing two types of TDCs: one uses an on-chip SFQ clock generator (CG) and the other uses a microwave oscillator at room temperature. We confirmed the correct operation of both TDCs and evaluated their timing jitter. The experimentally-obtained timing jitter is about 40ns and 700ps for the TDCs with and without the on-chip SFQ CG, respectively, for the measured time interval of 50µs, which linearly increases with increase of the measured time interval.
Masamitsu TANAKA Atsushi KITAYAMA Masakazu OKADA Tomohito KOUKETSU Takumi TAKINAMI Masato ITO Akira FUJIMAKI
We report the successful operation of a low-power arithmetic logic unit (ALU) based on a low-voltage rapid single-flux-quantum (LV-RSFQ) logic circuit, whereby a dc bias current is fed to circuits from lowered constant-voltage sources through small resistors. Both the static and dynamic energy consumptions are reduced because of the reduction in the amplitudes of voltage pulses across the Josephson junctions, with a trade-off of slightly slower switching speeds. The designed bias voltage was set to 0.25mV, which is one-tenth that of our standard RSFQ circuit design. We investigated several issues related to such low-voltage operation, including margins and timing design. To achieve successful operation, we tuned the circuit parameters in the logic gate design and carefully controlled the timing by considering the interference of pulse signals. We show test results for the low-voltage ALU in on-chip high-speed testing. The circuit was fabricated using the AIST Nb/AlOx/Nb Advanced Process with a critical current density of 10kA/cm2. We verified that arithmetic and logical operations were correctly implemented and obtained dc bias margins of 18% at a target clock frequency of 20GHz and achieved a maximum clock frequency of 28GHz with a power consumption of 28µW. These experimental results indicate energy efficiency of 3.6 times that of the standard RSFQ circuit design.
Hiroshi KATAOKA Hiroaki HONDA Farhad MEHDIPOUR Nobuyuki YOSHIKAWA Akira FUJIMAKI Hiroyuki AKAIKE Naofumi TAKAGI Kazuaki MURAKAMI
The single flux quantum (SFQ) is expected to be a next-generation high-speed and low-power technology in the field of logic circuits. CMOS as the dominant technology for conventional processors cannot be replaced with SFQ technology due to the difficulty of implementing feedback loops and conditional branches using SFQ circuits. This paper investigates the applicability of a reconfigurable data-path (RDP) accelerator based on SFQ circuits. The authors introduce detailed specifications of the SFQ-RDP architecture and compare its performance and power/performance ratio with those of a graphics-processing unit (GPU). The results show at most 1600 times higher efficiency in terms of Flops/W (floating-point operations per second/Watt) for some high-performance computing application programs.