We developed a PC cluster system which consists of 100 PCs as a test bed for massively parallel query processing. Each PC employs the 200 MHz Pentium Pro CPU and is connected with others through an ATM switch. Because the query processing applications are insensitive to the communication latency and mainly perform integer operations, the ATM connected PC cluster approach can be considered a reasonable solution for high performance database servers with low costs. However, there has been no challenge to construct large scale PC clusters for database applications, as far as the authors know. Though we employed commodity components as much as possible, we developed the DBMS itself, because that was a key component for obtaining high performance in parallel query processing, and there seemed no system which could meet our demand. On each PC node, a server program which acts as a database kernel is running to process the queries in cooperation with other nodes. The kernel was designed to execute pipelined operators and handle voluminous data efficiently, to achieve high performance on complex decision support type queries. We used the standard benchmark, TPC-D, on a 100 GB database to verify the feasibility of our approach, through comparison of our system with commercial parallel systems. As a whole, our system exhibited sufficiently high performance which was competitive with the current TPC-D top records, in spite of not using indices. For some heavy queries in the benchmark, which have high selectivity and joinability, our system performed much better. In addition, we applied transposed file organization to the database for further performance improvement. The transposed file organization vertically partitions the tuples, enabling attribute-by-attribute access to the relations. This resulted in significant performance improvement by reducing the amount of disk I/O and shifting the bottleneck to computation.

Decision trees are used as a convenient means to explain given positive examples and negative examples, which is a form of data mining and knowledge discovery. Standard methods such as ID3 may provide non-monotonic decision trees in the sense that data with larger values in all attributes are sometimes classified into a class with a smaller output value. (In the case of binary data, this is equivalent to saying that the discriminant Boolean function that the decision tree represents is not positive. ) A motivation of this study comes from an observation that real world data are often positive, and in such cases it is natural to build decision trees which represent positive (i. e. , monotone) discriminant functions. For this, we propose how to modify the existing procedures such as ID3, so that the resulting decision tree represents a positive discriminant function. In this procedure, we add some new data to recover the positivity of data, which the original data had but was lost in the process of decomposing data sets by such methods as ID3. To compare the performance of our method with existing methods, we test (1) positive data, which are randomly generated from a hidden positive Boolean function after adding dummy attributes, and (2) breast cancer data as an example of the real-world data. The experimental results on (1) tell that, although the sizes of positive decision trees are relatively larger than those without positivity assumption, positive decision trees exhibit higher accuracy and tend to choose correct attributes, on which the hidden positive Boolean function is defined. For the breast cancer data set, we also observe a similar tendency; i. e. , positive decision trees are larger but give higher accuracy.

This study presents a method that can be used to manage individual pieces of information in large scale distributed geographic information systems (GIS). In a distributed GIS, ordinary users usually cannot alter any of the contents on the server. The method in this study can be used to alter the content or add individual datums onto these types of non-write-permitted data sets. The authors have called it a 'Geographic Differential Script File' (GDSF). A client creates a GDSF, which contains private information that is to be added onto the served data. The client keeps this file on a local disk. When the user employs the data, he applies the differential script sequence onto the downloaded data in order to retrieve the information. GDSF is a collection of graphic operation commands which insert and delete objects as well as modify operations. GDSF also contains modifications of the attribute information of geographic entities. This method can also be used to revise information that is published on ROM media, e. g. CD-ROM or DVD-ROM, as well as in a distributed environment. In this paper, the method and results of applying it are presented.

Rate monotonic traffic scheduling algorithm had been shown to be the optimal static priority assignment scheme. The system model studied in can be considered (although not realistic) as a preemptive multiplexer which accepts constant bit rate connections that generate packets periodically. The multiplexer adopts a service discipline such that a lower priority packet can be preempted at any stage by a higher priority one without any loss. The constraint is that every packet has to complete its service before the arrival of its succeeding packet generated by the same connection. In this paper, we study the schedulability problem of rate monotonic schedulers for a fixed-length packet switched network such as the ATM network. A necessary and sufficient condition for a set of m constant bit rate connections to be rate monotonic schedulable is first derived and then utilized to design fast admission control algorithms. One of our algorithms computes in advance the minimum period of a connection which can be accepted given a set of existing connections.

This paper proposes two numerical methods to solve the optimal problem of contrast enhancement in the cross-pol and co-pol channels. For the cross-pol channel case, the contrast (power ratio) is expressed in a homogeneous form, which leads the polarimetric contrast optimization to a distinctive eigenvalue problem. For the co-pol channel case, this paper proposes a cross iterative method for optimization, based on the formula used in the matched-pol channel. Both these numerical methods can be proved as convergent algorithms, and they are effective for obtaining the optimum polarization state. Besides, one of the proposed methods is applied to solve the optimal problem of contrast enhancement for the time-independent targets case. To verify the proposed methods, this paper provides two numerical examples. The results of calculation are completely identical with other authors', showing the validity of the proposed methods.

We present a receiver structure with joint blind equalization, carrier recovery, and timing recovery. The blind equalizer employs a decomposition transversal filtering technique which can reduce the complexity of convolution to about a half. We analyze the performance surface of the equalizer cost function and show that the global minima correspond to perfect equalization. We also derive proper initial tap settings of the equalizer for convergence to the global minima. We describe the timing recovery and the carrier recovery methods employed. And we describe a startup sequence to bring the receiver into full operation. The adaptation algorithms for equalization, carrier recovery, and timing recovery are relatively independent, resulting in good operational stability of the overall receiver. Some simulation results for cable-modem type of transmission are presented.

We propose a new method of progressive transmission of continuous tone images using multi-level error diffusion method. Assuming that the pixels are ordered and the error is diffused to later pixels, multi-level error-diffused images are resolved into a multiple number of bit planes. In an image with 8 bits per pixel, the number of the bit planes that we construct is 9, and the 2-level, 3-level, 5-level,, error-diffused images are produced by a successive use of the bit planes. The original image is finally achieved precisely.

The optimistic analytical results for performance analysis of buffered banyan networks are mainly due to certain independence assumptions used for simplifying analysis. To capture more effects of cell correlation, a refined analytical model for both single-buffered and multiple buffered banyan networks is proposed in this paper. When cell output contention occurs at a 2 2 switch element, two contention resolution schemes are used. One is based on randomly choosing the winning cell and another is to give priority to the cell which has been delayed in the current buffer for at least one stage cycle. The switch throughput, cell transfer delay and cell delay deviation for single-buffered banyan networks with and without using priority scheme are derived. Then the model is generalized to multiple buffered banyan networks where analytical expressions for throughput and delay are obtained. We show that using the priority scheme the cell delay deviation is reduced and the influence on throughput performance is insignificant. The results obtained from our analytical model are compared with the simulations and good agreement is observed. Comparisons with some proposed analytical models in the literature reveal that our model is more accurate and powerful in predicting the performance of buffered banyan networks.

This paper describes a method to represent m output functions using shared multi-terminal binary decision diagrams (SMTBDDs). The SMTBDD(k) consists of multi-terminal binary decision diagrams (MTBDDs), where each MTBDD represents k output functions. An SMTBDD(k) is the generalization of shared binary decision diagrams (SBDDs) and MTBDDs: for k=1, it is an SBDD, and for k=m, it is an MTBDD. The size of a BDD is the total number of nodes. The features of SMTBDD(k)s are: 1) they are often smaller than SBDDs or MTBDDs; and 2) they evaluate k outputs simultaneously. We also propose an algorithm for grouping output functions to reduce the size of SMTBDD(k)s. Experimental results show the compactness of SMTBDD(k)s. An SMTBDDmin denotes the smaller SMTBDD which is either an SMTBDD(2) or an SMTBDD(3) with fewer nodes. The average relative sizes for SBDDs, MTBDDs, and SMTBDDs are 1. 00, 152. 73, and 0. 80, respectively.

In this paper, we propose a new register transfer level (RT level) testability analysis method. Controllability and observability measures are defined for signal vectors based on the numbers of values they can take. The control part and the datapath part are automatically identified in the given RT level model and distinctive analysis methods are applied. We also describe a DFT point selection method based on our testability measures. In a experiment on a signal processing circuit whose gate count is 7690 including 578 FFs, almost the same fault coverage is achieved with fewer scan FFs than a conventional method based on gate level testability analysis.

In this paper, we propose a test methodology for core-based system LSIs. Our test methodology aims to decrease testing time for core-based system LSIs. In our method, every core is supplied with several sets of test vectors. Every set of test vectors guarantees sufficient fault coverage. Each set of test vectors consists of two parts. One is based on built-in self-test (BIST) and the other is based on external testing. These sets of test vectors are designed to have different ratio of BIST to external testing each other for every core. We can minimize testing time for core-based system LSIs by selecting from the given sets of test vectors for each core. The main contributions of this paper are summarized as follows. (i) BIST is efficiently combined with external testing to relax the limitation of the external primary inputs and outputs. (ii) External testing for one of cores and BISTs for the others are performed in parallel to reduce the total testing time. (iii) The testing time minimization problem for core-based system LSIs is formulated as a combinatorial optimization problem to select the optimal set of test vectors from given sets of test vectors for each core.

This paper discusses a method to evaluate mutual couplings of cavity-backed slot antennas using the FDTD technique. The antenna fed by the short-ended probe is considered, which is investigated as an element of the power transmission antenna, Spacetenna, for the solar power satellite SPS2000. It is found from the FDTD computation on E-plane two- and four-element array antennas that the size of the problem space should be larger for the evaluation of the mutual coupling than for the estimation of the input impedance. Since enlarging the size of the problem space requires a large amount of computer storage, it is not practical for computer simulations. In order to carry out accurate estimations of the mutual coupling with relatively small amount of computer memory, the problem space is extended only in the broadside of the array antenna and in the other directions there are ten cells between the antenna surface and the outer boundary. Computer simulations demonstrate that there are no differences between the results of the proposed problem space geometry and the problem space extended in each direction of the axis coordinate by the same number of cells. Furthermore comparisons of computed and experimental results demonstrate the effectiveness of the approach after discussing how large the size of the problem space is required to estimate the mutual coupling.

The equivalence between Aperture Field Integration Method (AFIM) and Physical Optical (PO) is discussed for polyhedron surfaces in this paper. The necessary conditions for the equivalence are summarized which demand complete equivalent surface currents and complete apertures. The importance of the exact expressions for both incident and reflected fields in constructing equivalent surface currents is emphasized and demonstrated numerically. The fields from reflected components on additional surface which lies on the Geometrical Optics (GO) reflection boundary are evaluated asymptotically. The analytical expression enhances the computational efficiency of the complete AFIM. The equivalent edge currents (EECs) for AFIM (AFIMEECs) are used to extract the mechanism of this equivalence between AFIM and PO.

Since manufacturing processes inherently fluctuate, LSI chips which are produced from the same design have different propagation delays. However, the difference in delays caused by the process fluctuation has rarely been considered in most of existing high-level synthesis systems. This paper presents a new approach to module selection in high-level synthesis, which exploits the difference in functional unit delays. First, a module library model which assumes the probabilistic nature of functional unit delays is presented. Then, we propose a module selection problem and an algorithm which minimizes the cost per faultless chip. Experimental results demonstrate that the proposed algorithm finds optimal module selections which would not have been explored without manufacturing information.

In designing ASIPs (Application Specific Integrated Processors), the papers investigated so far have almost focused on the optimization of the CPU core and did not pay enough attention to the optimization of the RAM and ROM sizes together. This paper overcomes this limitation and proposes an optimization algorithm to define the best ratio between the CPU core, RAM and ROM of an ASIP chip to achieve the highest performance while satisfying design constraints on the chip area. The partitioning problem is formalized as a combinatorial optimization problem that partitions the operations into hardware and software so that the performance of the designed ASIP is maximized under given chip area constraint, where the chip area includes the HW cost of the register file for a given application program with associated input data set. The optimization problem is parameterized so that it can be applied with different technologies to synthesize CPU cores, RAMs or ROMs. The experimental results show that the proposed algorithm is found to be effective and efficient.

In this paper, millimeter-wave radar cross section (RCS) characteristics for rough surface is investigated by means of an approximation method of the magnetic field integral equation and the feasibility of road condition sensing is discussed. The RCS measurement at 94 GHz is carried out in order to verify the numerical result, thereby the numerical results are in good agreement with the measured RCS. The dependence of RCS on the radar incidence angle and surface roughness is investigated where the cross-polarized RCS characteristic is also considered.

The problem of electromagnetic scattering caused by inductive discontinuities locate in parallel-plate waveguides, in particular when dealing with discontinuous conductors of finite thickness, is analyzed using the modified residue-calculus method, the equations suitable for a numerical calculation are derived. The incident wave is taken to be the dominant mode, and the reflection and transmission properties of a symmetrical inductive iris are discussed.

The productivity of developing software for switching systems and the effects of using advanced software development methods were evaluated and analyzed. Productivity was found to be improved by using automatic code generation, simulator debugging, a hierarchical object-oriented software structure, and software-development-support tools. The evaluation showed that the total productivity was improved by about 20%, compared with a case where these efforts were not introduced. It also showed each effect of these methods and tools by evaluating their manpower saving ratios. These results are expected to benefit the development of various types of communication-switching and multimedia service systems. Also, our development-support tools and methods are expected to be the basis for attaining higher software development productivity.

Full-wave FD-TD analysis has been carried out for coaxial probes inserted into waveguides. Both single and symmetrically placed paired coaxial probe structures have been discussed and we have revealed the relation between equivalent circuit parameters and structural parameters of the coaxial probes including cases for large diameter and extension length, which is useful for practical waveguide circuit design. The equivalent circuit parameters calculated from the scattering parameters agreed well with corresponding measured data. From the calculated field in a waveguide, field concentration at sharp edges of probe sole or base, which ought to be taken into account for high power application design has been also discussed. Besides, amplitudes of higher order modes in waveguides excited by coaxial probes or pairs of coaxial probes has been calculated so as to estimate the range beyond which higher order modes decay sufficiently. This estimation is necessary for simple and easy design of probe using circuit theory.

Hardware software codesign using various hardware and software implementation possibilities requires a cosimulation environment which has both flexibility and efficiency. In this paper, a hardware software cosimulation environment is developed using the backplane approach and optimized synchronization. To seamlessly integrate a new simulator, this paper defines and implements the backplane protocol for communication and synchronization between client simulators. Automatic interface generation facility is also devised for more effective cosimulation environment. To enhance the performance of cosimulation backplane, a series of optimized hardware software synchronization methods are introduced. Efforts are focused on reducing control packets between simulators as well as concurrent execution of simulators without roll-back. The environment is implemented based on Ptolemy and validated with a QAM example run on different configurations. With optimized synchronization method, we have achieved about 7 times speed-up compared with the lock-step synchronization.