The hybrid coding with motion compensated prediction and discrete cosine transform (MC+DCT) has been recognized as the standard technique in motion picture coding. In this paper, a motion estimation processor compatible with ITU-T H.261 and MPEG standards is described. A half-pel precision processing unit is introduced with an exhaustive block matching unit for integer-pel precision search. The necessary processing power for the exhaustive block matching is implemented with a 1-dimensional array structure utilizing a sub-sampling technique. In comparison with the conventional 2-dimensional array structure, path of the data transfer is so simple that the low power dissipation characteristic is obtained. The problem of communication bandwidth to the frame memory, which is a bottleneck of half-pel precision motion estimation, is solved by introducing a candidate pixel buffer into the inter-processor data transfer. A static latch circuit with conflict free operation is newly developed for reducing the power consumption. This chip is capable of processing NTSC-resolution video in real-time at the 40 MHz operation. The chip integrates about 540 k transistors in the 121 mm2 die using 0.8 µm double metal CMOS technology.

OFDM (Orthogonal Frequency Division Multiplexing) is a useful digital modulation method for terrestrial digital broadcasting systems, both for digital TV broadcasting and digital audio broadcasting. OFDM is a kind of multicarrier modulation and shows excellent performance especially in multipath environments and in mobile reception. Other advantages are its resistance to interference signals and its suitability for digital signal processing. When each carrier of the OFDM signal is modulated with DQPSK, we call it DQPSK-OFDM. DQPSK-OFDM is a basic OFDM system, which is especially suitable for mobile reception. This paper describes how a DQPSK-OFDM system works and shows several experimental and simulation results. The experimental results mainly concern the performance of the DQPSK-OFDM system relative to various disturbances such as multipath (ghost) signals, nonlinearity of the channel, and interference from analog signals. The transmission characteristics of DQPSK-OFDM are investigated and the basic criteria for the system design of DQPSK-OFDM are discussed.

This paper presents a fully digital high speed (60 Mb/s) Quadrature Phase Shift Keying (QPSK)/Offset QPSK (OQPSK) burst demodulator for radio applications, which has been implemented on a 0.5 µm Complementary Metal Oxide Semiconductor (CMOS) master slice Very Large Scale Integrated circuit (VLSI). The developed demodulator VLSI eliminates analog devices such as mixers, phase-shifters and Voltage Controlled Oscillator (VCO) for bit-timing recovery, which are used by conventional high-speed burst demodulators. In addition to the fully digital implementation, the VLSI achieves fast carrier and bit-timing acquisition in burst modes by employing a reverse-modulation carrier recovery scheme with a wave-forming filter for OQPSK operation, and a bit-timing recovery scheme with bit-timing estimation and interpolation using a pulse-shaping filter. Results of performance evaluation assuming application in Time Division Multiple Access (TDMA) systems show that the developed VLSI achieves excellent bit-error-rate and carrier-slipping-rate performance at high speed (60 Mb/s) with short preamble words (less than 100 symbols) in low Eb/No environments.

A timing-driven global routing algorithm is proposed that directly models the path-based timing constraints. By keeping track of the critical path delay and channel densities, and using novel heuristic criteria, it can select routing paths that minimize area as well as satisfy the timing constraints. Using bipolar-specific features, this router can be used to design LSI chips that handle signals with speeds greater that a gigabit per second. Experimental results shows an average delay improvement of 17.6%.

Video compression technologies such as MPEG have enabled the efficient use of video data in the computer environment. However, the compressed video information still has a huge amount of data compared with the other media such as text, audio, and graphics. Therefore, it is very important to handle the video information in a networked database for the efficient use of resources like storage media. Furthermore, in the networked database, its retrieval methods including search and delivery become the key issues especially for the video information which requires a large network bandwidth. In this paper, a video browsing method using an automatic fast scene cut detection for networked video database access is described. The scene cut is defined as the scene change frame and is detected by temporal change in interframe luminance difference and chrominance correlation which are obtained from spatio-temporally scaled image directly extracted from the MPEG compressed video without any complex processing of video decoding. The detected scene change frames are further investigated to exploit the relationship between the scene cuts and are classified in order to make a hierarchical indexing. These results of detection are stored as an scene index file using the MPEG format. The simulation results are also presented for several test video sequences to show that these methods have enabled the efficient video database construction and accessing.

Development of low power MUSE (Multiple Sub-Nyquist Sampling Encoding) chip set through reduction in operating voltage (from 5 V to 3.7 V) is described. This leads to great cost reduction since the chips could be mounted on low cost plastic packages and the necessity for cooling fans to dissipate heat was obviated. To maintain compatibility with standard 5 V analog and digital peripherals such as 4 Mbit DRAMs and an A/D converter, a special voltage-level converter was also developed.

This paper proposes a new signaling technique which employs multilevel block codes in conjunction with phase/frequency modulation. The proposed scheme exhibits an increased minimum squared Euclidean distances (MSEDs) and outperforms other conventional schemes in terms of asymptotic coding gain and decoding complexity. The proposed scheme is also considered for non-constant amplitudes, which turned out to show even better performances at small modulation indices in some cases. Examples are given to demonstrate how to optimize the signal set for a given block code to maximize the coding gain.

This paper presents a new sort of multilayer piezoelectric ceramic transformer for switching regulated power supplies. This piezoelectric transformer operates in the second thickness extensional vibration mode. Its resonant frequency is higher than 1 MHz. First, numerical simulation was implemented using a distributed constant electromechanical equivalent circuit method. It was calculated that this piezoelectric transformer, which has higher than 200 mechanical quality factor Qm, could work with higher than 90% efficiency and in more than 20-W/cm3 high power density. Second, a trially fabricated transformer, which is 15 mm long, 15 mm wide and 2.2 mm thick, was examined. Modified PbTiO3 family ceramics were used for the piezoelectric transformer material, because of the large anisotropy between electromechanical coupling factors kt and kp. Obtained results indicate that the piezoelectric transformer has good resonant characteristics, with little spurious vibration, and exhibits 16-W/cm3 power density with high efficiency at 2 MHz. Moreover, a switching regulated power supply, applying the piezoelectric ceramic transformer, was built and examined.

A single-chip architecture for three-dimensional (3-D) computer graphics (CG) is discussed assuming portable equipment with a 3-D CG interface. Based on a discussion of chip requirements, an architecture utilizing DRAM technology is proposed. A 31-Mbit, on-chip DRAM cell array allows a full-color, 480640-pixel frame with two 3-D frame buffers for double buffering and one 2-D frame buffer for superimposed or background images. The on-chip pixel generator produces R, G, B, and Z data in a triangular polygon with a zigzag-scan interpolation algorithm. The on-chip frame synthesizer combines data from one of the 3-D buffers with that from the 2-D buffer to produce superimposed or background 2-D images within a 3-D CG image. Parallel alpha-blending and Z-comparison circuits attached to the DRAM cell array provide a high data I/O rate. Estimation of the chip performance assuming the 0.35-µm CMOS design rule shows the chip size, the drawing speed, on-chip data I/O rate, and power dissipation would be 1413.5-mm, 0.25 million polygons/s, 1 gigabyte/s, and 590 mW at a voltage of 3.3 V, respectively. Based on circuit simulations, the chip can run on a 1.5-V dry cell with a drawing speed of 0.125 million polygons/s and a power dissipation of 61 mW. A scaled-down version of the chip which has an 1-kbit DRAM cell array with an attached alpha-blending circuit is being fabricated for evaluation.

This paper presents the results of a study made to determine the line length coverage of the high-bit-rate digital subscriber line (HDSL) present in NTT's local networks. The HDSL carries one bi-directional 784 kbit/s channel per pair and supports the digital interface at 1544kbit/s by using two cable pairs. The primary purpose of this study is to estimate the range limits for candidate transmission schemes considering line installation conditions, and to determine the most promising transmission scheme and its feasibility given the environment of NTT's local networks. Pulse amplitude modulation (PAM) and quadrature amplitude modulation (QAM) transmission schemes are compared for HDSL implementation. It is shown that 2B1Q-PAM and 16-QAM generally achieve better performance than the more complicated PAM and QAM given the presence intra-system crosstalk interference (interference between identical transmission systems). The range limits determined by inter-system crosstalk interference (interference between different transmission systems) with basic rate access (BRA) implementing a burst-mode transmission method are also estimated. This paper concludes that 2B1Q-PAM achieves the best overall performance in NTT's local networks. A feasibility study of 192-6144 kbit/s transmission is also described.

In a hybrid coder which employs motion compensation and discrete cosine transform (MC-DCT coder), up to 90% of bits are used to represent the quantized DCT blocks. So it is most important to represent them with as few bits as possible. In this paper, we propose an efficient method for encoding the quantized DCT blocks of motion compensated prediction (MCP) errors, which adaptively selects one of a few scanning patterns. The scanning pattern selection of an MCP error block is based on the motion compensated images which are always available at the decoder as well as at the encoder. No overhead information for the scanning patterns needs to be transmitted. Simulation results show that the average bit rate reduction amounts to 5%.

A new approach to implement queues for controlling ATM switch LSI is presented. In many conventional architecture, external FIFOs are provided for each output link and used to manage the address of the buffer in an ATM switch. We reduce the number of FIFOs by using a self-timed queue with a search circuit that finds the earliest entry for each output link. Using this architecture, number of the FIFOs is reduced to 1/N, where N is the switch size. Delay priority and multicasting can be supported without doubling the number of the queues. This new queue can also be utilized as an ATM switch by itself. Evaluation chip was fabricated using 0.5-µm CMOS process technology. Inter-stage transfer speed over 500 MHz and cycle time over 125 MHz was obtained. This performance is enough for a 622-Mbps 1616 ATM Switch.

The current state of development of the television broadcasting system of the future is described with regard to LSI development. It is no need to say that television broadcasting systems are very huge and require a large number of inexpensive LSI's. Hi-Vision broadcasting has already been started in Japan. In the United States, a digital terrestrial broadcasting system (ATV) will be standardized in the near future. On the other hand, the situation in Europe remains unclear but MPEG-2 is now in the stage of system finarizing. We also hear much about "multimedia" but the concept of multimedia broadcasting still requires a lot of time to be translated into reality. Some important current technical topics and related basic technologies are also described in this paper. They include DCT, Hybrid DCT coding, error correcting coding, coded modulation, and improvement of the MUSE system. Finally, the discussion considers the relationship between system development and VLSI technology and the importance of mutual understanding between VLSI engineers and system designers. Some possible requirements for VLSI development are also stated.

Mixed-signal LSIs promise to permit increased levels of integration, not only in voiceband but also in multi-GHz-band applications such as wireless communications and optical data links. This paper reviews the evolution of mixed-signal communications LSIs and discusses some of their design problems, including device noise and crosstalk noise. In the low-power and low-voltage designs emerging as new disciplines, the target supply voltage for voiceband LSIs is around 1 V, and even GHz-band circuits are approaching 2 V. MOS devices are expected to play an important role even in the frequency range over 100 MHz, in the area of wireless or optical communications circuits.

For the purpose of detecting the intracranial vascular deformations noninvasively, transducer for bruit sound emanated from diseased lesion and analyzing system were developed and applied clinically. Several aspects of the bruit signals were clarified and the possibility of early diagnosis was increased.

This letter proposes the method using a filter to suppress the very large noise obstructive to the radio pulsar surveys. This noise suppression filter is constructed from the average of the amplitude spectrum of pulsar signal for each channel. Using this method, the dispersion measure, one of the important parameters in the pulsar surveys, can easily be extracted.

In this paper we study the bifurcation phenomena of quasi–periodic states of a model of the human circadian rhythm, which is described by a system of coupled van der Pol equations with a periodic external forcing term. In the system a periodic or quasi–periodic solution corresponds to a synchronized or desynchronized state of the circadian rhythm, respectively. By using a stroboscopic mapping, called a Poincar mapping, the periodic or quasi–periodic solution is reduced to a fixed point or an invariant closed curve (ab. ICC). Hence we can discuss the bifurcations for the periodic and quasi–periodic solutions by considering that of the fixed point and ICC of the mapping. At first, the geometrical behavior of the 3 generic bifurcations, i.e., tangent, Hopf and period doublig bifurcations, of the periodic solutions is given, Then, we use a qualitative approach to bring out the similar behavior for the bifurcations of the periodic and quasi–periodic solutions in the phase space and in the Poincarsection respectively. At last, we show bifurcation diagrams concerning both periodic and quasi–periodic solutions, in different parameter planes. For the ICC, we concentrate our attention on the period doubling cascade route to chaos, the folding of the parameter plane, the windows in the chaos and the occurrence of the type I intermittency.

A new approach using radiation mode expansions is presented for calculating radiated fields from arbitrary distribution of electromagnetic sources in the half space region partitioned by a dielectric layer with a ground conductor. This method is applied to the calculation of radiation from microstrip-type antennas with a dielectric substrate of theoretically infinite extent. To be able to use this method, it is necessary to obtain first the field distribution around antenna patches, which is accomplished rather easily by using the FD-TD method. Radiation pattern calculations are presented for a rectangular patch antenna to verify the feasibility of this approach.

Bifurcations of quasi–periodic responses in an oscillator described by conductively coupled van der Pol equations with a sinusoidal forcing term are investigated. According to the variation of three base frequencies, i.e., two natural frequencies of oscillators and the forcing frequency, various nonlinear phenomena such as harmonic or subharmonic synchronization, almost synchronization and complete desynchronization are ovserved. The most characteristic phenomenon observed in the four–dimensional nonautonomous system is the occurrence of a double Hopf bifurcation of periodic solutions. A quasi–periodic solution with three base spectra, which is generated by the double Hopf bifurcation, is studied through an investigation of properties of limit cycles observed in an averaged system for the original nonautonomous equations. The oscillatory circuit is particularly motivated by analysis of human circadian rhythms. The transition from an external desynchronization to a complete desynchronization in human rest–activity can be referred to a mechanism of the bifurcation of quasi–periodic solutions with two and three base spectra.

In general, message passing multiprocessors suffer from communication overhead and shared memory multiprocessors suffer from memory contention. Also, data I/O overhead limits performance. In particular, computer vision tasks that require massive computation are strongly affected by these disadvantages. This paper proposes new parallel architectures for computer vision, a Flexibly (Tightly/Loosely) Coupled Multiprocessor (FCM) and a Flexibly Coupled Hypercube Multiprocessor (FCHM) to alleviate these problems. FCM and FCHM have a variable address space memory in which a set of neighboring memory modules can be merged into a shared memory by a dynamically partitionable topology. FCM and FCHM are based on two different topologies: reconfigurable bus and hypercube. The proposed architectures are quantitatively analyzed using computational models and parallel vision algorithms are simulated on FCM and FCHM using the Intel's Personal SuperComputer (iPSC), a hypercube multiprocessor, showing significant performance improvements over that of iPSC.