A new design method for 2-D IIR digital filters, having a separable denominator,in the spatial domain is presented. The modified Gauss Method is applied in the iterating calculation of the filter coefficients. Also, the 1-D state space representation of the denominator is utilized in determining the impulse response of the designed IIR transfer function and its partial derivatives systematically while the numerator is expressed by a nonseparable polynomial. The error criterion function, which also includes the response outside the given region of support, is minimized in the least square sense. Convergence, together with the stability of the resulting filttr, are guaranteed.

This paper reviews two topics of nonlinear system analysis done in Japan. The first half of this paper concerns with nonlinear system analysis through the nondeterministic operator theory. The nondeterministic operator is a set-valued or fuzzy set valued operator by K. Horiuchi. From 1975 Horiuchi has developed fixed point theorems for nondeterministic operators. Using such fixed point theorems, he developed a unique theory for nonlinear system analysis. Horiuchi's theory provides a fundamental view point for analysis of fluctuations in nonlinear systems. In this paper, it is pointed out that Horiuchi's theory can be viewed as an extension of the interval analysis. Next, Urabe's theory for nonlinear boundary value problems is discussed. From 1965 Urabe has developed a method of computer assisted existence proof for solutions of nonlinear boundary value problems. Urabe has presented a convergence theorem for a certain simplified Newton method. Urabe's theorem is essentially based on Banach's contraction mapping theorem. In this paper, reformulation of Urabe's theory using the interval analysis is presented. It is shown that sharp error estimation can be obtained by this reformulation. Both works discussed in this paper have been done independently with the interval analysis. This paper points out that they have deep relationship with the interval analysis. Moreover, it is also pointed out that these two works suggest future directions of the interval analysis.

It is of significantly importance in relation to the problem of diagnosis of deviation faults in linear analog circuits to check whether or not it is possible to uniquely determine the element-values in a given linear analog circuit from the node-voltage measurements at its accessible nodes and then of giving a method for actual computation of the element-values if it is possible, under the assumption that i) the circuit is of known topology (and of known element-kinds if possible) and ii) the actual value of each element-value of the circuit almost always deviates from the design value and is not known exactly. In this paper, the problem of checking the unique determinability of the element-values is called the element-value determinability problem, and its solutions which have been obtained until now are reviewed in perspectives to designing a publicly available user-oriented analog circuit diagnosis system.

The factored state space approach (FSS) can be a powerful mathematical tool for the synthesis and analysis of non state space digital filters. In the following letter, this technique is used for the rederivation of some classes of low sensitivity filters described by a II-cascade two-pair structure. This method leads to a simplified synthesis algorithm (with applications to automated synthesis procedures for many classes of non state space digital filters) as well as a straightforward analysis of roundoff noise and norm scaling problems.

This paper proposes a new, high-speed method of filling in the contours of alpha-numeric characters to produce correct binary image patterns. We call this method the improved edge-fill method because it improves on a previously developed edge-fill method. Ambiguity of the conventional edge-fill method on binary images are eliminated by selecting fill pixels from combinations of Freeman's chain code, which expresses contour lines. Consequently, the areas inside the contour lines are filled in rapidly and correctly. With the new method, the processing time for character image generation is reduced by ten to tewnty percent over the conventional method. The effectiveness of the new method is examined in experiments using both Arabic numerals and letters from the Roman alphabet. Results show that this fill method is able to produce correct image patterns and that it can be applied to alpha-numeric-character contour filling.

This paper discusses the role of knowledge in document image understanding from the viewpoints of representation, utilization and acquisition. For the representation of knowledge, we propose two models, a layout model and a content model, which represent knowledge about the layout structure and content of a document, respectively. For the utilization of knowledge, we implement layout analysis and content analysis which utilize a layout model and a content model, respectively. The strategy of hypothesis generation and verification is introduced in order to integrate these two kinds of analysis. For the acquisition of knowledge, we propose a method of incremental acquisition of a layout model from a stream of example documents. From the experimental results of document image understanding and knowledge acquisition using 50 samples of visiting cards, we verified the effectiveness of the proposed method.

An integrated pen interface system was developed to allow effective Japanese text entry. It consists of sub-systems for handwriting recognition, contextual post-processing, and enhanced Kana-to-Kanji conversion. The recognition sub-system uses a hybrid algorithm consisting of a pattern matcher and a neural network discriminator. Special care was taken to improve the recognition of non-Kanji and simple Kanji characters frequently used in fast data entry. The post-processor predicts consecutive characters on the basis of bigrams modified by the addition of parts of speech and substitution of macro characters for Kanji characters. A Kana-to Kanji conversion method designed for ease of use with a pen interface has also been integrated into the system. In an experiment in which 2,900 samples of Kanji and non-Kanji characters were obtained from 20 subjects, it was observed that the original recognition accuracy of 83.7% (the result obtained by using the pattern matching recognizer) was improved to 90.7% by adding the neural network discriminator, and that it was further improved to 94.4% by adding the post-processor. The improved recognition accuracy for non-Kanji characters was particularly marked.

The Institute for Posts and Telecommunications Policy (IPTP) held its first character recognition competition in 1992 to ascertain the present status of ongoing research in character recognition and to find promising algorithms for handwritten numerals. In this paper, we report and analyze the results of this competition. In the competition, we adopted 3-digit handwritten postal code images gathered from live mail as recognition objects. Prior to the competition, 2,500 samples (7,500 characters) were distributed to the participants as traning data. By using about 10,000 different samples (29,883 characters), we tested 13 recognition programs submitted by five universities and eight manufacturing companies. According to the four kinds of evaluation criteria: recognition accuracy, recognition speed, robustness against degradation, and theroretical originality, we selected the best three recognition algorithms as the Prize of Highest Excellence. Interestingly enough, the best three recognition algorithms showed considerable diversity in their methodologies and had very few commonly substituted or rejected patterns. We analyzed the causes for these commonly substituted or rejected patterns and, moreover, examined the human ability to discriminate between these patterns. Next, by considering the complementary characteristics of each recognition algorithm, we studied a multi-expert recognition strategy using the best three recognition algorithms. Three kinds of combination rules: voting on the first candidate rule, minimal sum of candidate order rule, and minimal sum of dissimilarities rule were examined, and the latter two rules decreased the substitution rate to one third of that obtained by one-expert in the competition. Furthermore, we proposed a candidate appearance likelihood method which utilizes the conditional probability of each of ten digits given the candidate combination obtained by each algorithm. From the experiments, this method achieved surprisingly low values of both substitution and rejection rates. By taking account of its learning ability, the candidate appearance likelihood method is considered one of the most promising multi-expert systems.

It is demonstrated that the enhancement in the functional capability of an elemental transistor is quite essential in developing human-like intelligent electronic systems. For this purpose we have introduced the concept of four-terminal devices. Four-terminal devices have an additional dimension in the degree of freedom in controlling currents as compared to the three-terminal devices like bipolar and MOS transistors. The importance of the four-terminal device concept is demonstrated taking the neuron MOS transistor (abbreviated as neuMOS or νMOS) and its circuit applications as examples. We have found that any Boolean functin can be realized by a two-stage configuratin of νMOS inverters. In addition, the variable threshold nature of the device allows us to build real-time reconfigurable logic circuits (no floating gate charging effect is involved in varying the threshold). Based on the principle, we have developed Soft-Hardware Logic Circuits and Real-Time Rule-Variable Data Matching Circuits. A winner-take-all circuit which finds the largest signal by hardware parallel processing has been also developed. The circuit is applied to building an associative memory which is different from Hopfield network in both principle and operation. The hardware algorithm in which binary, multivalue, and analog operations are merged at a very device level is quite essential to establish intelligent information processing systems based on highly flexible, real-time programmable hardwares realized by four-terminal devices.

An adaptive LMS filtering system is proposed for computing the Discrete Walsh Transform (DWT). The signal to be transformed serves as the 'desired signal' for the adaptive filter, while a set of periodic Walsh sequences serve as the input signal vector for the adaptive filter. The weights of the adaptive filter provide the DWT. The given approach is more efficient in terms of the required computations and memory locations compared with the direct approach. In contract with existing Fast DWT algorithm, the proposed solution provides more flexibility as far as the signal block length is concerned. In other words, the proposed approach is not restricted to a block length N to be of power 2.

In direct connection with the signal information processing, a practical method of identification and probabilistic prediction for sound insulation systems is theoretically proposed in the object-oriented expression forms by introducing a few functional system parameters. Concretely, a trial of identification of the above functional system parameters and the output probabilistic prediction for a panel thickness change of double-wall type sound insulation system, especially, under the existence of a strong background noise inside of the reception room, is newly proposed based on one of wide sense digital filters and SEA (Statistical Energy Analysis) method. Finally, by using the actual music sound of an arbitrary distribution type, the effectiveness of the proposad method is confirmed experimentally by applying it to some problems of predicting the cumulative probability distribution of the transmitted sound level fluctuation.

This paper presents an algorithm for string searching in a character lattice. A character lattice, which is obtained through a character recognition process, is a general and flexible data structure that represents many hypothesized strings in a document image. In this paper, the authors propose a simple and efficient algorithm; it consists of a single loop of some set-operations and scans the character lattice only once. The authors also describe two actual implementations of the algorithm; one uses Bit-Arrays and the other a Trie. Owing to its bir parallelism, the Bit-Array approach is able to search for a single pattern faster than the Trie approach, and is easily extended to complex matchings such as an approximate one. It is suited for document retrieval systems that need to search for a keyword as fast as possible. A hashed compact version of the character lattice is also useful to increase the speed of the search for a single pattern. In contrast, the Trie approach is able to search for a large number of patterns simultaneously, and is suited for document understanding systems that need to extract words from the character lattice. The experimental results have shown that both approaches achieve high performance.

In intelligent integrated systems such as robotics for autonomous work, it is essential to respond to the change of the environment very quickly. Therefore, the development of special-purpose VLSI processors for intelligent integrated systems with small latency becomes an very important subject. In this paper, we present a scheduling algorithm for high-level synthesis. The input to the scheduler is a behavioral description which is viewed as a data flow graph (DFG). The scheduler minimizes the latency, which is the delay of the critical path in the DFG, and minimizes the number of functional units and buses by improving the utilization rates. By using an integer linear programming, the scheduler optimally assigns nodes and arcs in the DFG into steps.

Wide-band, low-ripple underwater transducers with high-power acoustic radiation capability have been designed on the basis of multiple-mode filter synthesis theory. They are composed of triple acoustic matching plates and double backing plates with optimized specific acoustic impedances,besides piezoelectric ceramic elements. One of the backing plates employs a Fe damping-alloy to suppress unwanted response peaks in the frequency range above the passband region. Two 33 array transducers were fabricated, each with a center frequency of 200 kHz, one as a transmitter and the other as a receiver. The two transducers show high-sensitivity, low-ripple and wide-band transmitting and receiving responses. Then, the transducers were applied in a color video picture digital transmission system.Clear color video pictures, composed of 256240 pixels, were successfully received within one second.

This paper proposes a request-grant-type multiple access control called bandwidth-request labeled-slot multiple access (BLMA) for wireless LANs. BLMA employs slotted ALOHA in the request stage and has an algorithm to avoid unfair access due to the capture effect in this stage. In BLMA, terminals transmit data using fixed length slots called fragment slots in the transmission stage. The base station assigns the fragment slots one by one to terminals for peer-to-peer communication in which terminals communicate directly. It also controls the retransmission based on the stop and wait automatic repeat request scheme. The base station retransmits data for the source terminal as much as it can. BLMA provides simple and fair access control, efficient link utilization, and easy implementation. It also allows modes to be easily changed automatically from peer-to-peer communication to store-and-forward communication in which terminals communicate via the base station. Design concepts of a wireless MAC discussed and details of BLMA are described. The evaluation results of the BLMA are also shown.

A feedback pattern recognition method using an inverse recall neural network model is proposed. The feedback method can adjust processing parameter values adaptively to individual patterns so as to produce reliable recognition results. In order to apply an adaptive control technique to such pattern recognition processings, the evaluation value for recognition uncertainty is determined to be a function with regard to an input pattern and processing parameters. In its feedback phase, the input pattern is fixed and processing parameters are adjusted to decrease the recognition uncertainty. The proposed neural network model implements two functions in this feedback recognition method. One is a discrimination as a kind of multi-layer feedforward model. The other is to generate an input modification so as to decrease the recognition uncertainty. The modification values indicate parts which are important for more certain recognition but are missed in the original input to the nerwork. The proposed feedback method can adjust prcessing parameter values in order to detect the important parts shown by the inverse recall network model. As explained in this paper, feature extraction parameter values are adaptively adjusted by this feedback method. After the inverse recall model and the feedback function are implemented, features are extracted again by using the modified feature extraction parameter values. The feature is classified by the feedforward function of the network model. The feedforward and feedback processings are repeated until a certain recognition result is obtained. This method was examined for hadwritten alpha-numerics with rotation distortion. The feedback method was found to decrease the rejection ratio at the same substitution error ratio with high efficiency.

This paper presents a discrete Fourier analyzer using analog VLSI technology. An analog current-mode technique is employed for implementing it by a regular array structure based on the straight-forward discrete Fourier transform (DFT) algorithm. The basic components are 1-dimensional (1-D) analog current-mode multiplier array for fixed coefficient multiplication, two-dimensional (2-D) analog switch array and wired summations. The proposed scheme can process speedily N-point DFT in a time proportional to N. Possibility of the realization of the analog DFT VLSI based on 1 µm technology is discussed from the viewpoints of precision, speed, area, and power dissipation. In the case of 1024-point DFT, the standard deviation of the total error is estimated to be about 2%, the latency, or processing time is about 110 µs, and the signal sample rate based on a pipeline manner is about 4.7 MHz. A prototype MOS integrated circuit of the 16-point multiplier array has been implemented and a typical operation using the multiplier array has been confirmed.

In this letter, we compare the three compound methods of the Multiple-scale technique to improve the quality of the scale values estimated by the method of fuzzy categories. The results show that the maximum compound method brings higher ability to estimate the scale values than the other methods despite categories used in the scale.

In this tutorial exposition, we present a discussion for the extended interpolation approximation with respect to a class of 1- or multi-dimensional signals. We will provide some conditions concerning to the convergence of the approximation signal to the original one. An exposition for the optimum interpolation is given with respect to a class of n-dimensional signals whose Fourier spectrums have the weighted L2 norms smaller than a given positive number. In this discussion, in the first phase, we present the outline of the approximation which minimizes the measure of error equal to the envelope of the approximation errors. Initially, it is assumed that the infinite number of interpolation functions with different functional forms are used in the approximation. However, the resultant optimum interpolation functions are expressed as the parallel shifts of the finite number of n-dimensional functions. It should be noted that the optimum interpolation functions presented in this tutorial exposition minimize wide variety of measures of error defined in each separate area in the space variable domain at the same time. Interesting reciprocal relation in the approximation, is discussed. An equivalent expression of the approximation formula in the frequency domain, is provided also. In this paper, we will also introduce the optimum approximation using space-limited analysis filters and interpolation functions with the infinite supports. This approximation satisfies beautiful orthogonal relation and minimizes various measure of error symultaneously including many types of measure of error defined in the frequency domain.

The present study describes using the state transition type of drawing understanding framework to construct a multi-purpose drawing understanding system. This new system employs an understanding process that complies with the understanding rules, which are easily obtained by the user. The same set of user-provided rules must be used for the same type of target drawings, but for slightly different ones, fine tuning is required to obtain understanding rules. To overcome this inherent drawback in constructing drawing understanding systems, we extended the system using a newly constructed understanding rule generating support system. The resultant integrated system is based on a man-machine cooperation type interface, and can automatically generate rules from user-provided simple interactions using a graphical user interace (GUI). To obtain efficient rule generation, the system employs an inductive inference method as a learning algorithm. Map-drawing experiments were successfully carried out, and an evaluation based on a rule leaning error criterion subsequently revealed an efficient rule generation process.