This paper presents a heuristic floorplanning method that improves the method proposed by Vijayan and Tsay. It is based on tentative insertion of constraints, that intentionally produces redundant constraints to make it possible to search in a wide range of solution space. The proposed method can reduce the total area of blocks with the removal and insertion of constraints on the critical path in both horizontal and vertical constraint graphs. Experimental results for MCNC benchmarks showed that the quality of solutions of the proposed method is better than [7],[8] by about 15% on average, and even for the large number of blocks, the proposed method keeps the high quality of solutions.

Electromagnetic plane wave scattering by a loaded trough on a ground plane has been analyzed by Kobayashi and Nomura's method. The field in each region is expressed first in terms of appropriate eigen functions, whose excitation coefficients are determined by the continuity condition across the aperture of the trough. Simple far field expression which is suitable for numerical calculation for small aperture cases has been derived. Scattering far field patterns and radar cross section are calculated and compared with those obtained by other methods. Good agreements have been observed for all incident angles.

OFDM (Orthogonal Frequency Division Multiplexing) is a useful digital modulation method for terrestrial digital broadcasting systems, both for digital TV broadcasting and digital audio broadcasting. OFDM is a kind of multicarrier modulation and shows excellent performance especially in multipath environments and in mobile reception. Other advantages are its resistance to interference signals and its suitability for digital signal processing. When each carrier of the OFDM signal is modulated with DQPSK, we call it DQPSK-OFDM. DQPSK-OFDM is a basic OFDM system, which is especially suitable for mobile reception. This paper describes how a DQPSK-OFDM system works and shows several experimental and simulation results. The experimental results mainly concern the performance of the DQPSK-OFDM system relative to various disturbances such as multipath (ghost) signals, nonlinearity of the channel, and interference from analog signals. The transmission characteristics of DQPSK-OFDM are investigated and the basic criteria for the system design of DQPSK-OFDM are discussed.

A programmable clock generator, based on a phase-locked loop (PLL) circuit, has been developed with 0.5 µm CMOS triple-layer Al interconnection technology for use as an on-chip clock generator in a 300-MHz video signal processor. The PLL-based clock generator generates a clock signal whose frequency ranges from 50 to 350 MHz which is an integral multiple, from 2 to 16, of an external clock frequency. In order to achieve stable operation within this wide range, a voltage controlled oscillator (VCO) with selectable low VCO gain characteristics has been developed. Experimental results show that the clock generator generates a 297-MHz clock with a 27-MHz external clock, with jitter of 180 ps and power dissipation of 120 mW at 3.3-V power supply, and it can also oscillate up to 348 MHz with a 31.7-MHz external clock.

In current teleteaching systems, video conferencing systems have been used to transmit a motion video from a teacher's site. A video that captures a teacher or his or her chalkboard is transmitted to a remote site through a communication channel. Since the resolution of the video is not very high, a camera captures either a teacher or a chalkboard, but not both at the same time. Thus, remote students have difficulty in obtaining realistic sensation. Another approach to realizing teleteaching is to use a computer-based desktop conferencing system that supports a motion video and a computer-based shared chalkboard. In this approach, a teacher has to use a mouse or a handwriting tablet for input, and therefore cannot use a real chalkboard. Moreover, the teacher cannot use gestures to remote students. This paper presents a multimedia teleteaching system that integrates an electronic whiteboard with a multimedia desktop conferencing system for providing realistic sensation to remote students. The system provides two-way communication of a video and a computerized chalkboard. A teacher uses an electronic whiteboard as a real whiteboard using direct manipulation, and transmits his or her gestures to remote students by using video communication. The system provides dual views; one view is for teacher's gestures and the other is for chalkboard contents. By providing the dual views, the system can transmit teacher's gestures all the time. Since chalkboard contents are processed and displayed as computer data, students can see them clearly. With the computerized chalkboard, a teacher or a student can zoom contents, input data written on a paper using a scanner, or add annotation.

This paper focuses on Mixed Reality (MR) visual displays, a particular subset of Virtual Reality (VR) related technologies that involve the merging of real and virtual worlds somewhere along the virtuality continuum" which connects completely real environments to completely virtual ones. Probably the best known of these is Augmented Reality (AR), which refers to all cases in which the display of an otherwise real environment is augmented by means of virtual (computer graphic) objects. The converse case on the virtuality continuum is therefore Augmented Virtuality (AV). Six classes of hybrid MR display environments are identified. However, an attempt to distinguish these classes on the basis of whether they are primarily video or computer graphics based, whether the real world is viewed directly or via some electronic display medium, whether the viewer is intended to feel part of the world or on the outside looking in, and whether or not the scale of the display is intended to map orthoscopically onto the real world leads to quite different groupings among the six identified classes, thereby demonstrating the need for an efficient taxonomy, or classification framework, according to which essential differences can be identified. The obvious' distinction between the terms real" and virtual" is shown to have a number of different aspects, depending on whether one is dealing with real or virtual objects, real or virtual images, and direct or non-direct viewing of these. An (approximately) three dimensional taxonomy is proposed, comprising the following dimensions: Extent of World Knowledge (how much do we know about the world being displayed?"), Reproduction Fidelity (how realistically' are we able to display it?"), and Extent of Presence Metaphor (what is the extent of the illusion that the observer is present within that world?").

This paper presents a method, called reduced scan shift, which generates short test sequences for full scan circuits. In this method, scan shift operations can be reduced, i.e., not all but part of flip-flops (FFs) are controlled and observed. This method, unlike partial scan methods, does not decrease fault coverage. In the reduced scan shift, test vectors for the combinational part of a circuit are fistly generated. Since short test sequence will be obtained from the small test vectors set, test compaction techniques are used in the test vector generation. For each test vector in the obtained test set, it is found which FFs should be controlled or observed. And then a scan chain is configured so that FFs more frequently required to be controlled (observed) can be located close to the scan input (output). After the scan chain is configured, the scan shift requirement is examined for the essential faults of each test vector. Essential fault is defined to be a fault which is detected by only one test vector but not other test vectors. The order of test vectors is carefully determined by comparing the scan control requirement of a test vector with the scan observation requirement of another test vector so that unnecessary scan shift operations only for controlling or observing FFs can be reduced. A method of determining the order of test vectors with state transition is additionally described. The effectiveness of the proposed method is shown by the experimental results for benchmark circuits.

This paper compares three typical system-sharing configurations for FTTH networks that provide narrowband and video distribution services and proposes a remote node locating strategy for each configuration. Two new evaluation factors, required land space and service provisioning effort, are included in the calculation, in addition to facility cost and maintenance effort. By considering these factors together, the total network cost is calculated and the sensitivity to the number of remote nodes is evaluated. Finally, the most economical system-sharing configuration is identified on the basis of the evaluations for two typical service areas in Japan, for both present and future cost environments.

We present a new multi-layer over-the-cell channel router for standard cell layout design using simulated annealing. This new approach, STANZA-M consists of two key features. The first key feature of our router is a new scheme for simulated annealing in which we use a cost function to evaluate both the total net-length and the channel heights, and an effective simulated annealing process by a limited range to obtain an optimal chnnel wiring in practical time. The second feature of our router is a basic layer assignment procedure in which we assign all horizontal wiring inside a channel to feasible layers by considering the height of channel including cell region with a one dimensional channel compaction process. We implemented our three-layer cannel router in C language on a Solbourne Series 5 Work Station (22 MIPS). Experimental results for benchmarks such as Deutsch's Difficult Example and MCNC's PRIMARY1 channel routing problems indicate that STANZA-M can achieve superior results compared to the conventional routers, and the process times are very fast despite the use of simulated annealing.

This paper describes a design method of stuff synchronization circuit for High-definition Television (HDTV) transmission to reduce stuff jitter, one of the greatest problems in video transmission through plural Synchronous Digital Hierarchy (SDH) networks operating with different frequency sources. First, we determine the quantity of stuff jitter in SDH networks using the pointer mechanism and Administration Unit (AU) pointer bytes. From the results of a subjective test conducted for HDTV, we show that the minimum noticeable jitter is 3.6 nsec in using a color-bar pattern as a test image and a sinusoidal wave as a jitter signal. These results are used to describe the effect of stuff jitter on picture quality. We then introduce a distributed destuffing method at the receiving end, and show that jitter can be reduced by about 32dB in a 622Mbps rate system. Based on these results, we finally show that the cut-off frequency of the clock recovery PLL for distributed destuffing is more than 10 times higher than that required by conventional destuffing. This reduces the pull-in time by more than 99.9%.

A new approach to implement queues for controlling ATM switch LSI is presented. In many conventional architecture, external FIFOs are provided for each output link and used to manage the address of the buffer in an ATM switch. We reduce the number of FIFOs by using a self-timed queue with a search circuit that finds the earliest entry for each output link. Using this architecture, number of the FIFOs is reduced to 1/N, where N is the switch size. Delay priority and multicasting can be supported without doubling the number of the queues. This new queue can also be utilized as an ATM switch by itself. Evaluation chip was fabricated using 0.5-µm CMOS process technology. Inter-stage transfer speed over 500 MHz and cycle time over 125 MHz was obtained. This performance is enough for a 622-Mbps 1616 ATM Switch.

In a hybrid coder which employs motion compensation and discrete cosine transform (MC-DCT coder), up to 90% of bits are used to represent the quantized DCT blocks. So it is most important to represent them with as few bits as possible. In this paper, we propose an efficient method for encoding the quantized DCT blocks of motion compensated prediction (MCP) errors, which adaptively selects one of a few scanning patterns. The scanning pattern selection of an MCP error block is based on the motion compensated images which are always available at the decoder as well as at the encoder. No overhead information for the scanning patterns needs to be transmitted. Simulation results show that the average bit rate reduction amounts to 5%.

This paper presents the results of a study made to determine the line length coverage of the high-bit-rate digital subscriber line (HDSL) present in NTT's local networks. The HDSL carries one bi-directional 784 kbit/s channel per pair and supports the digital interface at 1544kbit/s by using two cable pairs. The primary purpose of this study is to estimate the range limits for candidate transmission schemes considering line installation conditions, and to determine the most promising transmission scheme and its feasibility given the environment of NTT's local networks. Pulse amplitude modulation (PAM) and quadrature amplitude modulation (QAM) transmission schemes are compared for HDSL implementation. It is shown that 2B1Q-PAM and 16-QAM generally achieve better performance than the more complicated PAM and QAM given the presence intra-system crosstalk interference (interference between identical transmission systems). The range limits determined by inter-system crosstalk interference (interference between different transmission systems) with basic rate access (BRA) implementing a burst-mode transmission method are also estimated. This paper concludes that 2B1Q-PAM achieves the best overall performance in NTT's local networks. A feasibility study of 192-6144 kbit/s transmission is also described.

A novel low-power dissipation and high-speed converter-control-IC has been developed for the transmitting amplifier in digital portable telephones. The IC consists mainly of CMOS devices to reduce the bias current. To improve circuit speed, bipolar transistors are used in the output stage of the operational amplifier and in the current sources of the oscillator because they have a larger current capability and smaller parasitic capacitance than CMOS devices. The IC has one-fifth the bias current of a conventional control circuit consisting of discrete devices, and it can operate up to a switching frequency of 3MHz. The small bias current increases converter efficiency, and the high switching frequency reduces converter size. Using this IC, converter loss is 17% less than that with a conventional control circuit.

Error-correction techniques can be used to reduce the required carrier-to-noise ratio (C/N) in digital satellite news gathering (SNG) systems. The required e.i.r.p. of a digital SNG terminal is smaller than that of conventional analog SNG RF terminals. In this paper, a Ku-band portable SNG RF terminal using a flat antenna is proposed to make the best use of these digital systems. This portable terminal uses 16 planar microstrip subarray antennas, each with a solid-state power amplifier (SSPA) mounted on its backside. The proposed RF terminal is distinctly different from a conventional RF terminal with a parabolic antenna in two ways; it is portable and it has electronic tracking capability. Electronic antenna tracking reduces the terminal setup time because precise alignment of the antenna with the satellite is not required. This paper first describes the system concept and discusses the design concept. Secondly, it then explains phase shifters and feedback loops for electronic tracking. The tracking performance of a feedback system using four subarrays is also presented with some comparisons between theoretical and measured results. Experimental results for the low side-lobe flat antenna and the SSPAs are then presented. These are the most important components of the system. The flat antenna meets the design objectives specified by ITU-R Recommendations. By orthogonally exciting the rectangular patch antenna, the flat antenna is capable of operating dual polarizations and dual frequencies (transmit/vertical polarization: 14GHz; receive/horizontal polarization: 12GHz). The SSPAs have an efficiency of 21% and an output power of 5W.

Throughout the paper, the nearest-neighbour (NN) interconnection of switches within a multistage interconnection network (MIN) is analysed. Three main results are obtained: (1) The switch preserving transformation of a 2-D MIN into the 1-D MIN (and vice versa) (2) The rearrangeability of the MIN and (3) The number of stages (NS) for the rearrangeable nonblocking interconnection. The analysis is extended to any dimension of the interconnected data set. The topological equivalence between 1-D MINs with NN interconnections (NN-MINs) and 1-D cellular arrays is shown.

Long term phase noises are characterized for network synchronization using two time domain measurement techniques: the Maximum Time Interval Error (MTIE) and Time Variance (TVAR). First, the characteristics of previously measured fiber delay variations are evaluated. The diurnal and annual delay variations and the long term noise feature of random walk phase modulation are well represented by the TVAR technique. The delay variation due to the AU pointer operation is then measured using commercial SDH demultiplexing equipment and compared with the simulation result; the simulation result agrees well with the experimental result. The delay variation in the SDH equipment is simulated using the thermal fiber delay variation measured in the actual network as the input phase of the equipment. It is shown that the SDH equipment sometimes generates delay steps of 617ns, which are larger than the normal pointer operations of 154ns. The long term delay variation, periods over 107s, due to the threshold spacing between the positive and negative stuffing is described. We also show that TVAR is suitable for evaluating the phase noise feature and MTIE can clearly show the peak value of phase noise. The long term phase noises evaluated in this paper are the dominant sources that degrade network synchronous performance. The results of this paper will be useful in designing the equipment synchronous specification.

The sensitivity degradation due to unmatched quantum efficiencies is theoretically investigated for coherent optical POLSK heterodyne, homodyne and balanced receivers with shot noise, thermal noise and LO intensity noise. This analysis is based on the exact expressions of the probability density function (PDF) of the noise process to calculate the bit-error-rate (BER) considering LO intensity noise and unmatched quantum efficiencies. We derive the optimum LO power to minimize the power penalty for POLSK receivers. The theoretical results clarify the relation between the unmatched quantum efficiencies and sensitivity degradation due to the LO intensity noise. Based on this analysis, it is found that the balanced receiver is preferable for the design of POLSK receivers.

An Ultra-high-speed (higher than 60 MHz) Viterbi decoder VLSIC with coding rates from one-half to fifteen-sixteenth and a constraint length of seven for forward error correction (FEC) has been developed using 0.8-µm semicustom CMOS LSIC technology and a newly developed high-speed ACS circuit. To reduce power consumption of the one-chip Viterbi decoder, a universal-coding-rate scarce-state-transition (SST) Viterbi decoding scheme and low-power-consumption burst-mode-selection (BMS) path memory have been proposed and employed to the developed VLSIC. In addition, a new maximum-likelihood-decision (MLD) circuit for the SST Viterbi decoder has been developed. The total power consumption of the developed chip is reduced to 75% of the conventional one and the developed Viterbi decodar VLSIC achieves a maximum operation speed of 60 MHz. It achieves near theoretical net coding-gain performance for various coding rates.

A new rate-controlled queueing discipline, called virtual rate-based queueing (VRBQ), is proposed for packet-switching nodes in connection-oriented, high-speed, wide-area networks. The VRBQ discipline is based on the virtual rate which has a value between the average and peak transmission rates. By choosing appropriate virtual rates, various requirements can be met regarding the performance and quality of services in integrated-service networks. As the worst-case performance guarantee, we determine the upper bounds of queueing delay when VRBQ is combined with an admission control mechanism, i.e., Dynamic Time Windows or Leaky Bucket. Simulation results demonstrate the fairness policy of VRBQ in comparison with other queueing disciplines, and the performance of sources controlled under different virtual rates.