In this letter, we compare the three compound methods of the Multiple-scale technique to improve the quality of the scale values estimated by the method of fuzzy categories. The results show that the maximum compound method brings higher ability to estimate the scale values than the other methods despite categories used in the scale.

This paper discusses the role of knowledge in document image understanding from the viewpoints of representation, utilization and acquisition. For the representation of knowledge, we propose two models, a layout model and a content model, which represent knowledge about the layout structure and content of a document, respectively. For the utilization of knowledge, we implement layout analysis and content analysis which utilize a layout model and a content model, respectively. The strategy of hypothesis generation and verification is introduced in order to integrate these two kinds of analysis. For the acquisition of knowledge, we propose a method of incremental acquisition of a layout model from a stream of example documents. From the experimental results of document image understanding and knowledge acquisition using 50 samples of visiting cards, we verified the effectiveness of the proposed method.

This paper proposes a new, high-speed method of filling in the contours of alpha-numeric characters to produce correct binary image patterns. We call this method the improved edge-fill method because it improves on a previously developed edge-fill method. Ambiguity of the conventional edge-fill method on binary images are eliminated by selecting fill pixels from combinations of Freeman's chain code, which expresses contour lines. Consequently, the areas inside the contour lines are filled in rapidly and correctly. With the new method, the processing time for character image generation is reduced by ten to tewnty percent over the conventional method. The effectiveness of the new method is examined in experiments using both Arabic numerals and letters from the Roman alphabet. Results show that this fill method is able to produce correct image patterns and that it can be applied to alpha-numeric-character contour filling.

An integrated pen interface system was developed to allow effective Japanese text entry. It consists of sub-systems for handwriting recognition, contextual post-processing, and enhanced Kana-to-Kanji conversion. The recognition sub-system uses a hybrid algorithm consisting of a pattern matcher and a neural network discriminator. Special care was taken to improve the recognition of non-Kanji and simple Kanji characters frequently used in fast data entry. The post-processor predicts consecutive characters on the basis of bigrams modified by the addition of parts of speech and substitution of macro characters for Kanji characters. A Kana-to Kanji conversion method designed for ease of use with a pen interface has also been integrated into the system. In an experiment in which 2,900 samples of Kanji and non-Kanji characters were obtained from 20 subjects, it was observed that the original recognition accuracy of 83.7% (the result obtained by using the pattern matching recognizer) was improved to 90.7% by adding the neural network discriminator, and that it was further improved to 94.4% by adding the post-processor. The improved recognition accuracy for non-Kanji characters was particularly marked.

This paper proposes a request-grant-type multiple access control called bandwidth-request labeled-slot multiple access (BLMA) for wireless LANs. BLMA employs slotted ALOHA in the request stage and has an algorithm to avoid unfair access due to the capture effect in this stage. In BLMA, terminals transmit data using fixed length slots called fragment slots in the transmission stage. The base station assigns the fragment slots one by one to terminals for peer-to-peer communication in which terminals communicate directly. It also controls the retransmission based on the stop and wait automatic repeat request scheme. The base station retransmits data for the source terminal as much as it can. BLMA provides simple and fair access control, efficient link utilization, and easy implementation. It also allows modes to be easily changed automatically from peer-to-peer communication to store-and-forward communication in which terminals communicate via the base station. Design concepts of a wireless MAC discussed and details of BLMA are described. The evaluation results of the BLMA are also shown.

Real-time collision detection is one of the most important intelligent processings in robotics. In collision detection, a large storage capasity is usually required to store the 3-dimensional information on the obstacles located in a workspace. Moreover, high-computational power is essential in not only coordinate transformation but also matching operation. In the proposed collision detection VLSI processor, the matching operation is drastically accelerated by using a content-addressable memory (CAM). A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be performed by only magnitude comparison in parallel. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed, and each PE performs coordinate transformation at high speed based on the COordinate Rotation DIgital Computation (CORDIC) algorithms. When the 16 PEs and 144-kb CAM are used, the performance is evaluated to be 90 ms.

An analog circuit is devised which selects and outputs the kth largest element among n input voltages. The circuit is composed of n basic transconductance amplifiers connected mutually with an O(n) length wire, thus the complexity of the circuit is O(n). The circuit becomes particularly simple for the case of the selection of the median of inputs.

This paper presents an algorithm for string searching in a character lattice. A character lattice, which is obtained through a character recognition process, is a general and flexible data structure that represents many hypothesized strings in a document image. In this paper, the authors propose a simple and efficient algorithm; it consists of a single loop of some set-operations and scans the character lattice only once. The authors also describe two actual implementations of the algorithm; one uses Bit-Arrays and the other a Trie. Owing to its bir parallelism, the Bit-Array approach is able to search for a single pattern faster than the Trie approach, and is easily extended to complex matchings such as an approximate one. It is suited for document retrieval systems that need to search for a keyword as fast as possible. A hashed compact version of the character lattice is also useful to increase the speed of the search for a single pattern. In contrast, the Trie approach is able to search for a large number of patterns simultaneously, and is suited for document understanding systems that need to extract words from the character lattice. The experimental results have shown that both approaches achieve high performance.

It is demonstrated that the enhancement in the functional capability of an elemental transistor is quite essential in developing human-like intelligent electronic systems. For this purpose we have introduced the concept of four-terminal devices. Four-terminal devices have an additional dimension in the degree of freedom in controlling currents as compared to the three-terminal devices like bipolar and MOS transistors. The importance of the four-terminal device concept is demonstrated taking the neuron MOS transistor (abbreviated as neuMOS or νMOS) and its circuit applications as examples. We have found that any Boolean functin can be realized by a two-stage configuratin of νMOS inverters. In addition, the variable threshold nature of the device allows us to build real-time reconfigurable logic circuits (no floating gate charging effect is involved in varying the threshold). Based on the principle, we have developed Soft-Hardware Logic Circuits and Real-Time Rule-Variable Data Matching Circuits. A winner-take-all circuit which finds the largest signal by hardware parallel processing has been also developed. The circuit is applied to building an associative memory which is different from Hopfield network in both principle and operation. The hardware algorithm in which binary, multivalue, and analog operations are merged at a very device level is quite essential to establish intelligent information processing systems based on highly flexible, real-time programmable hardwares realized by four-terminal devices.

This paper proposes high-performance multiprocessor implementation for real-time one-dimensional (1-D) statespace digital filters (SSDFs). The block-state realization of SSDFs (BSRDF) is suitable for their high speed realization and gives the characteristics of high accuracy. Previously we proposed a VLSI-oriented highly parallel architecture for BSRDF. For the purpose of speeding up and reducing hardware complexity, the distributed arithmetic, of which processing time depends only on word length, is applied to this architecture. It is implemented as a 2-D SIMD processor array, and the processor consists of n homogeneous processing elements (PEs), n being filter order. The high sampling rate of one or more hundred MHz becomes possible for high filter order. Moreover, the number of I/O data per processor can be a small fixed value for any filter order, and the number of gates can also be smaller than that in the case of using multiplier. Consequently, this proposed system can be implemented easily even in the present VLSI environment.

A semicylindrical microstrip applicator system is proposed and designed, both for microwave heating and for noninvasive temperature estimation, in application to hyperthermia treatment. The experimental results showed that the system functions both as a heating device and as a means of noninvasive temperature estimation. Therefore, electrical switching of these two functions makes the system realize both heating and temperature estimation. These functions reduce the pain of hyperthermia therapy for patients. The system is constructed of a water-loaded cylindrical applicator. Thus, the whole system can be made compact compared to conventional applicators. This improvement allows for various merits, such as realizing a surface cooling effect and decreased leakage of electromagnetic (EM) waves. When the applicator is set as an array arrangement, the system can be used as a microwave heating device. The penetration depth can be varied by adjusting phases of the EM wave radiated from each applicator. The experimental results at 430 MHz showed that semicylindrical microstrip applicators can be expected to be valid for tumor heating at depths within 55 mm. Moreover, by measuring transmission power between the two applicators, the system can be used to estimate temperature inside the medium. The transmission power which was measured in the frequency domain was converted in the time domain. By such a method, temperature distribution was calculated by solving simple simultaneous primary equations. The results of the temperature estimation show that the number of estimated temperature segments which have an error within 0.5 is 28 out of 36. The system can be easily used as a temperature measuring applicator as well as a heating applicator.

This paper presents a mathematical formulation of a data path allocation and floorplanning problem using the mixed integer linear programming, and shows some experimental results. We assume that a data flow graph and the scheduled result are given in advance. The chip area and total wire length are used for the quality measures of the solution for the problem. This method is applied to some examples, and compared with the other method reported previously in the points of the solution and computation time.

A kind of time domain reflectometry using deconvolution and envelope extraction process is presented for measuring microwave resonator characteristics, where data acquisition and data processing are performed entirely in the time domain. The proposed method may be used to characterize resonators which have Q values in the range between a few dozen and several hundred. The major drawback of the time domain measurement techniques is in general considered to be a low frequency resolution. In the proposed method, it is avoided skillfully.

In cellular mobile systems, an alternative approach for a Dynamic Channel Assignment problem is presented. It adaptively assigns the channels considering the cochannel interference level. The Dynamic Channel Assignment problem is modeled on the different cellular system from the conventional one. In this paper, we formulate the rearrangement problem in the Dynamic Channel Assignment and propose a novel strategy for the problem. The proposed algorithm is based on an artificial neural network as a specific dynamical system, and is successfully applied to the cellular system models. The computer simulation results show that the algorithm utilized for the rearrangement is an effective strategy to improve the traffic characteristics.

The plane wave diffraction by a two-dimensional parallel-plate waveguide cavity with partial material loading is rigorously analyzed for both the E and the H polarization using the Wiener-Hopf technique. Introducing the Fourier transform for the scattered field and applying boundary conditions in the transform domain, the problem is formulated in terms of the simultaneous Wiener-Hopf equations satisfied by the unknown spectral functions. The Wiener-Hopf equations are solved exactly via the factorization and decomposition procedure leading to the formal solution, which involves branch-cut integrals with unknown integrands as well as infinite series with unknown coefficients. Applying rigorous asymptotics with the aid of the edge condition, the approximate solution to the Wiener-Hopf equations is derived in the form suitable for numerical computations. The scattered field inside and outside the cavity is evaluated by taking the inverse Fourier transform together with the use of the saddle point method. Numerical examples of the radar cross section are presented for various physical parameters, and the far field backscattering characteristics of the cavity are discussed in detail. Some comparisons with a high-frequency technique are also given to validate the present method.

Binary decision diagrams (BDD's) are graph representations of Boolean functions, and at the same time they can be regarded as a computational model. In this paper, we discuss relations between BDD's and other computational models and clarify the computational power of BDD's. BDD's have the property that each variable is examined only once according to a total order of the variables. We characterize families of BDD's by on-line deterministic Turing machines and families of permutations. To clarify the computational power of BDD's, we discuss the difference of the computational power with respect to the way of reading inputs. We also show that the language TADGAP (Topologically Arranged Deterministic Graph Accessibility Problem) is simultaneously complete for both of the class U-PolyBDD of languages accepted by uniform families of polynomial-size BDD's and the clas DL of languages accepted by log-space bounded deterministic Turing machines. From the results, we can see that the problem whether U-PolyBDD U-NC1 is equivalent to a famous open problem whether DL U-NC1, where U-NC1 is the class of languages accepted by uniform families of log-depth constant fan-in logic circuits.

A new built-in drive circuit for superconducting Josephson LSI circuits has been designed and fabricated in a ceramic multichip module. The drive circuit consists of an impedance matching circuit and a DC bias current feeding circuit to supply a two-phase power current to Josephson chips at a microwave frequency. The impedance matching circuit was designed based on a quarter wavelength stripline. A balanced stripline configuration was introduced to reduce the fluctuation of ground potential. Tungsten layers were used to make the drive circuit in a multilayer ceramic substrate of the multichip module. Whole circuit was successfully packed in a volume of 76 mm38 mm1.7 mm. The gain of microwave current were 20 dB around 1.2 GHz and 23 dB around 3.6 GHz, which were in good agreement with the simulated current gain.

This paper discusses a common channel signaling system in which multiple micro-switching systems can converse as though configured like a conventional centralized switching system. A micro-switching system is a switching system whose main functions are integrated on a chip, like a microprocessor. Progress in MOS technology will soon make micro-switching systems possible, and their small scale and economy will allow subscriber switching systems to be distributed closer to subscribers. This will allow shorter subscriber loops, so subscriber networks will be able to reuse existing metallic lines as H1 (1.544/2.048Mb/s)-class subscriber loops. Economical micro-switching systems and reuse of existing network resources will contribute to the establishment H0 (384kb/s)-ISDN, so that every subscriber will be able to enjoy multimedia communications through HO-calls as simply as using present telephones. Four alternative signaling network architectures are examined, classified by arrangement of their signaling transfer junctions and signaling links, and a new signaling system featuring cell-based transfer functions is proposed. This is suitable for a distributed micro-switching-system network in order to minimize the figures of merit, which collectively estimate network cost and signaling delay.

This paper presents an analysis of the dose rate in tissue irradiated by an electromagnetic near field of a circular loop antenna. An analytical model comprised of a circular loop antenna located in the vicinity of the semi-infinite plane of a homogeneous biological medium was formulated. A quasi-static hypothesis was not introduced. The theoretical formulation was rigorously developed based on Maxwell equations which used an electric vector potential, cylindrical coordinates and a Hankel transform. The internal electric field E and the specific absorption rate (SAR) were adopted as indices for the dose in the tissue. This formulation was applied to the dosimetry of a high-frequency therapeutic device (HFTD) and experiment of irradiation to a frog web. The frequency of the applied electro-magnetic fields (EMF) was 9-10MHz. The distance between the antenna and tissue was 2.0-3.2mm. The dose of HFTD were 0.75V/m and 0.35mW/kg, respectively. The dose of experiment of the irradiation to a frog web were 0.42-2.08V/m and 0.11-2.69mW/kg, respectively. The SAR values obtained by this analysis were small enough to conclude that the effects were non-thermal. The calculated SARs of these experiments were compared with estimated SARs in experiments on calcium efflux change due to a weak modulated RF field. All were found to be of the same order of magnitude.

In order to investigate the jitter characteristics of PLLs for practical applications, we have developed a computer simulation program of PLL, which can deal with arbitrary patterns both of data and jitters, as well as a conceivable nonlinearity of the circuit performance. We used a time-domain method, namely, we solved the state equation of a charge pump type PLL with a constant time step. The jitter transfer characteristics of a conventional PLL were calculated for periodic input data patterns with sinusoidal jitters. The result agreed fairly well with the corresponding experiments. And we have revealed that an ordinary PD (Phase Detector), which detects the phase difference between input and VCO signals at only rising edges, shows the folded jitter transfer characteristics at the half of the equivalent frequency of the input signal. This folded jitter characteristics increases the total jitter for long successive '1' or '0' data patterns, because of their low equivalent sampling frequency, and might increase the jitter even for the random data patterns. Based on simulation results, we devised an improved phase detector for PLL having a low jitter characteristics. And we also applied the simulation to an FDD (Frequency Difference Detector) type fast pull-in PLL which we have proposed recently, and obtained that the jitter of it was smaller than that of a conventional PLL by 25% for PRBS (pseudo random bit sequence) NRZ code.