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20721-20740hit(30728hit)

  • Unequal Error Protection in Ziv-Lempel Coding

    Eiji FUJIWARA  Masato KITAKAMI  

     
    PAPER-Dependable Communication

      Vol:
    E86-D No:12
      Page(s):
    2595-2600

    Data compression is popularly applied to computer systems and communication systems. Especially, lossless compression is applied to text compression. Since compressed data are very sensitive to errors, several error control methods for data compression using probability model, such as for arithmetic coding, have been proposed. This paper proposes to apply an unequal error protection, or a UEP, scheme to LZ77 coding and LZW coding. This investigates a structure of the compressed data and clarifies a part which is more sensitive to errors than the other by using theoretical analysis and computer simulation. The UEP scheme protects the error-sensitive part from errors more strongly than the others. Computer simulation says that the proposed scheme can recover from errors in the compressed data more effectively than the conventional methods.

  • A Fuzzy Differential Diagnosis of Headache Applying Linear Regression Method and Fuzzy Classification

    Jeong-Yong AHN  Young-Hyun KIM  Soon-Ki KIM  

     
    LETTER-Medical Engineering

      Vol:
    E86-D No:12
      Page(s):
    2790-2793

    The fuzzy set framework can be utilized in several different approaches to modeling the diagnostic process. In this paper, we introduce two main relations between symptoms and diseases where the relations are described by intuitionistic fuzzy set data. Also, we suggest four measures for medical diagnosis. We are dealing with the preliminary diagnosis from the information of interview chart. We quantify the qualitative information based on the interview chart by dual scaling. Prototype of fuzzy diagnostic sets and the linear regression methods are established with these quantified data. These methods can be used to classify new patient's tone of diseases with certain degrees of belief and its concerned symptoms.

  • Using VHDL-Based Fault Injection for the Early Diagnosis of a TTP/C Controller

    Joaquín GRACIA  Juan C. BARAZA  Daniel GIL  Pedro J. GIL  

     
    PAPER-Verification and Dependability Analysis

      Vol:
    E86-D No:12
      Page(s):
    2634-2641

    Nowadays, the use of dependable systems is generalising, and diagnosis is an important step during their design . A diagnosis in early phases of the design cycle allows to save time and money. Fault injection can be used during the design process of the system, and using Hardware Description Languages, particularly VHDL, it is possible to accomplish this early diagnosis. During last years, the Time-Triggered Architecture (TTA) has emerged as a hard real-time fault-tolerant architecture for embedded systems. This novel architecture is gaining adepts mainly in the avionics and automotive industries ( x-by-wire ). The TTA implements a synchronous protocol with static scheduling that has been specifically targeted at hard real-time fault-tolerant distributed system. In this work, we present the study of the VHDL model of a communication controller based on the TTA, where a number of fault injection campaigns have been carried out. We comment the results produced and suggest some solutions to problems detected.

  • Constrained Location Algorithm Using TDOA Measurements

    Hing Cheung SO  Shun Ping HUI  

     
    LETTER-Digital Signal Processing

      Vol:
    E86-A No:12
      Page(s):
    3291-3293

    One conventional technique for source localization is to utilize the time-difference-of-arrival (TDOA) measurements of a signal received at spatially separated sensors. A simple TDOA-based location algorithm that combines the advantages of two efficient positioning methods is developed. It is demonstrated that the proposed approach can give optimum performance in geolocation via satellites at different noise conditions.

  • Digital Image Watermarking Method Based on Vector Quantization with Labeled Codewords

    Zhe-Ming LU  Wen XING  Dian-Guo XU  Sheng-He SUN  

     
    LETTER-Applications of Information Security Techniques

      Vol:
    E86-D No:12
      Page(s):
    2786-2789

    This Letter presents a novel VQ-based digital image watermarking method. By modifying the conventional GLA algorithm, a codeword-labeled codebook is first generated. Each input image block is then reconstructed by the nearest codeword whose label is equal to the watermark bit. The watermark extraction can be performed blindly. Simulation results show that the proposed method is robust to JPEG compression, vector quantization (VQ) compression and some spatial-domain processing operations.

  • Detoxification of Chlorinated Aromatics Adsorbed on Fly Ash under Microwave Irradiation

    Takamasa KISHIMA  Tsuyoshi KOIZUMI  Yoshio IIO  Sumio TUJII  Yuji WADA  Tetsushi YAMAMOTO  Hengbo YIN  Takayuki KITAMURA  Shozo YANAGIDA  

     
    PAPER-Chemical Application

      Vol:
    E86-C No:12
      Page(s):
    2474-2478

    We succeeded in detoxification of hexachloro-benzene adsorbed on artificially produced fly ash in air by irradiating microwave (2.45 GHz) in the presence of activated carbon powder. Hexachlorobenzene was decomposed by 50-90% at 200-300 by MW irradiation of 1-1.5 min when the ash contained activated carbon by 12 wt% and water by 10 wt%. Chlorinated benzene derivatives are dechlorinated through substitution of chloride anion with hydroxylation produced by basic CaO in the co-presence of activated carbon effectively heated by MW. This method using microwave irradiation enables us to treat the contaminated fly ash in a shorter time and decompose hexachlorobenzene more efficiently than the conventional heating.

  • Critical Path Selection for Deep Sub-Micron Delay Test and Timing Validation

    Jing-Jia LIOU  Li-C. WANG  Angela KRSTIĆ  Kwang-Ting (Tim) CHENG  

     
    PAPER-Timing Verification and Test Generation

      Vol:
    E86-A No:12
      Page(s):
    3038-3048

    Critical path selection is an indispensable step for AC delay test and timing validation. Traditionally, this step relies on the construction of a set of worse-case paths based upon discrete timing models. However, the assumption of discrete timing models can be invalidated by timing defects and process variation in the deep sub-micron domain, which are often continuous in nature. As a result, critical paths defined in a traditional timing analysis approach may not be truly critical in reality. In this paper, we propose using a statistical delay evaluation framework for estimating the quality of a path set. Based upon the new framework, we demonstrate how the traditional definition of a critical path set may deviate from the true critical path set in the deep sub-micron domain. To remedy the problem, we discuss improvements to the existing path selection strategies by including new objectives. We then compare statistical approaches with traditional approaches based upon experimental analysis of both defect-free and defect-injected cases.

  • Double-Image Green's Function Method for CMOS Process Oriented Transmission Lines

    Wenliang DAI  Zhengfan LI  Junfa MAO  

     
    LETTER-Microwaves, Millimeter-Waves

      Vol:
    E86-C No:12
      Page(s):
    2504-2507

    A novel double-image Green's function approach is proposed to compute the frequency- dependent capacitance and conductance for the general CMOS oriented transmission lines with one protective layer. The ε-algorithm of Pade approximation is adopted to reduce the time for establishing coefficient matrix in this letter. The parameters gained from this new approach are shown to be in good agreement with the data obtained by the full-wave method and the total charge Green's function method.

  • A Time-Slot Assignment Scheme in TD-CDMA/TDD Systems

    Ho-Shin CHO  Young Kil KWAG  

     
    LETTER-Wireless Communication Technology

      Vol:
    E86-B No:12
      Page(s):
    3622-3625

    We propose a mathematical model to analyze the performance of TD-CDMA/TDD systems in terms of call blocking probability and then find the optimum time-slot switching-point at the smallest call blocking probability considering asymmetrical traffic load distribution for various kinds of service applications.

  • Evaluation of Checkpointing Mechanism on SCore Cluster System

    Masaaki KONDO  Takuro HAYASHIDA  Masashi IMAI  Hiroshi NAKAMURA  Takashi NANYA  Atsushi HORI  

     
    PAPER-Dependable Software

      Vol:
    E86-D No:12
      Page(s):
    2553-2562

    Cluster systems are getting widely used because of good performance / cost ratio. However, their reliability has not been well discussed in practical environment so far. As the number of commodity components in a cluster system gets increased, it is indispensable to support reliability by system software. SCore cluster system software is a parallel programming environment for High Performance Computing (HPC). SCore provides checkpointing and rollback-recovery mechanism for high availability. In this paper, we analyze and evaluate the checkpointing and rollback-recovery mechanisms of SCore quantitively. The experimental results reveal that the required time for checkpointing scales very well in respect to the number of computing nodes. However, the required time is quite long due to the low effective network bandwidth. Based on the results, we modify SCore and successfully make checkpointing and recovery 1.8 2.8 times and 3.7 5.0 times faster respectively. This is very helpful for cluster systems to achieve high performance and high availability.

  • A Log-Normal Distribution Model for Electron Multiplying Detector Signals in Charged Particle Beam Equipments

    Mitsuru YAMADA  Akinori NISHIHARA  

     
    PAPER-General Fundamentals and Boundaries

      Vol:
    E86-A No:12
      Page(s):
    3276-3282

    We propose a stochastic model for signals generated through the electron multiplying effect of detectors in charged particle beam equipments. This model is based on a stochastic variable characterized by a log-normal type distribution. The model is simple and can be used to represent a wide dynamic range of signals from pulse-like signals when the primary beam current is small to continuous signals when the primary beam current is large. For the model base reference a normalization of actual signal detectors is presented. This base reference yields the unique stochastic parameter used in our model. The proposed model better approximates the actual signals in the power spectrum distribution as compared to the filtered Poisson method presented elsewhere.

  • A Robust Audio Watermarking Scheme Using Wavelet Modulation

    Bing JI  Fei YAN  De ZHANG  

     
    LETTER-Information Security

      Vol:
    E86-A No:12
      Page(s):
    3303-3305

    A novel audio watermarking based on wavelet modulation is presented. The watermark signals are constructed by M-band wavelet modulation that can increase redundancy to improve the detection performance. In order to maximize the watermarking strength within the perceptual constraints, the watermark signals synthesized from different subbands are separately masked using a frequency auditory model. CDMA technique is implemented to achieve watermarking capacity. Experimental results show that this method is very robust.

  • Feature Interaction Detection by Bounded Model Checking

    Tomoyuki YOKOGAWA  Tatsuhiro TSUCHIYA  Masahide NAKAMURA  Tohru KIKUNO  

     
    PAPER-Dependable Communication

      Vol:
    E86-D No:12
      Page(s):
    2579-2587

    Feature interaction is the term used in telephony systems to refer to inconsistent conflict between multiple communication services. Feature interaction is considered a major obstacle to developing reliable telephony systems and many approaches have been explored to resolve it. In this paper we present an automatic method for detecting latent feature interaction in service specifications. This method uses bounded model checking as its basis. The basic idea behind bounded model checking is to reduce the detection problem to the propositional satisfiability (SAT) decision problem. For asynchronous systems like telecommunication systems, however, traditional bounded model checking does not work well because resulting propositional formulas tend to become very large. We propose a new encoding scheme to overcome this problem and show the effectiveness through comparative experiments with traditional bounded model checking and other model checking methods.

  • Irredundant Low Power Address Bus Encoding Techniques Based on Adaptive Codebooks

    Satoshi KOMATSU  Masahiro FUJITA  

     
    PAPER-Power Optimization

      Vol:
    E86-A No:12
      Page(s):
    3001-3008

    The power dissipation at the off-chip bus has become a significant part of the overall power dissipation in micro-processor based digital systems. This paper presents irredundant address bus encoding methods which reduce signal transitions on the instruction address buses by using adaptive codebook methods. These methods are based on the temporal locality and spatial locality of instruction address. Since applications tend to JUMP/BRANCH to limited sets of addresses, proposed encoding methods assign the least signal transition codes to the addresses of JUMP/BRANCH operations in the past. In addition, our methods can be easily applicable for conventional digital systems since they are irredundant encoding methods. Our encoding methods reduce the signal transitions on the instruction address buses, which results in the reduction of total power dissipation of digital systems. Experimental results show that our methods can reduce the signal transition by an average of 88%.

  • Constructing c-Secure CRT Codes Using Polynomials over Finite Fields

    Mira KIM  Junji SHIKATA  Hirofumi MURATANI  Hideki IMAI  

     
    PAPER-Information Security

      Vol:
    E86-A No:12
      Page(s):
    3259-3266

    In this paper, we deal with c-secure codes in a fingerprinting scheme, which encode user ID to be embedded into the contents. If a pirate copy appears, c-secure codes allow the owner of the contents to trace the source of the illegal redistribution under collusion attacks. However, when dealing in practical applications, most past proposed codes are failed to obtain a good efficiency, i.e. their codeword length are too large to be embedded into digital contents. In this paper, we propose a construction method of c-secure CRT codes based on polynomials over finite fields and it is shown that the codeword length in our construction is shorter than that of Muratani's scheme. We compare the codeword length of our construction and that of Muratani's scheme by numerical experiments and present some theoretical results which supports the results obtained by numerical experiments. As a result, we show that our construction is especially efficient in respect to a large size of any coalition c. Furthermore, we discuss the influence of the random error on the traceability and formally define the Weak IDs in respect to our construction.

  • A Transparent Transient Faults Tolerance Mechanism for Superscalar Processors

    Toshinori SATO  

     
    PAPER-Dependable Systems

      Vol:
    E86-D No:12
      Page(s):
    2508-2516

    In this paper, we propose a fault-tolerance mechanism for microprocessors, which detects transient faults and recovers from them. The investigation of fault-tolerance techniques for microprocessors is driven by two issues: One regards deep submicron fabrication technologies. Future semiconductor technologies could become more susceptible to alpha particles and other cosmic radiation. The other is the increasing popularity of mobile platforms. Cellular telephones are currently used for applications which are critical to our financial security, such as mobile banking, mobile trading, and making airline ticket reservations. Such applications demand that computer systems work correctly. In light of this, we propose a mechanism which is based on an instruction reissue technique for incorrect data speculation recovery and utilizes time redundancy, and evaluate our proposal using a timing simulator.

  • Development of an IP Library of IEEE-754-Standard Single-Precision Floating-Point Dividers

    Hiroyuki OCHI  Tatsuya SUZUKI  Sayaka MATSUNAGA  Yoichi KAWANO  Takao TSUDA  

     
    PAPER-IP Design

      Vol:
    E86-A No:12
      Page(s):
    3020-3027

    Floating-point units (FPUs) are indispensable in processors, 3D-graphic engines, etc. To improve design productivity of these LSIs, FPU IPs are strongly desired. However, it is impossible to cover wide range of needs by an FPU IP, because there are various kind of options in specifications (e.g., operating frequency, latency, and ability of pipeline operation) and implementations (e.g., hardware algorithms). Thus, multiple IPs are needed even for the same functionality. In this paper, we propose to build an IP Library which consists of large number of FPU IPs with various kind of specifications and implementations, and which has catalogue data that shows not only specifications but also post-layout area and power dissipation of each IP. As the first step of the project, we have developed an IP Library targeted to Rohm 0.35 µm triple-metal process, which consists of 20 IPs for IEEE-754-standard single-precision floating-point division with 5 operating frequencies (50 MHz, 75 MHz, 100 MHz, 125 MHz, and 150 MHz), with two options whether pipelined or not, and with two hardware algorithms (the restoring method and the SRT method). We have also developed a catalogue for the IP Library, which shows post-layout area and power dissipation as well as specification of each IP. We have introduced two metrics "performance-area ratio (MFLOPS/mm2)" and "performance-power ratio (MFLOPS/W)" to afford a good insight into efficiency of implementations. From the catalogue data, the restoring method is, on the average, 1.4 times and 2.3 times better than the SRT method in terms of performance-area ratio and performance-power ratio, respectively. The developed catalogue is usable not only for selection of the optimal IP for a specific application, but also for quantitative analysis at the early stage of architecture design. It is also expected that the catalogue data based on an actual process technology is valuable for education.

  • An Efficient Resource Reservation Method over RSVP Using Moving History of a Mobile Host

    SeongGon CHOI  JunKyun CHOI  

     
    LETTER-Internet

      Vol:
    E86-B No:12
      Page(s):
    3655-3657

    The aim of this paper is to raise utilization of resource and handover success rate at handover time. The proposed method takes advantage of the moving history of a mobile host at connection admission control time. We demonstrate the benefit of the proposed method over previously proposed reservation schemes by simulation.

  • The Overview of the New Generation Mobile Communication System and the Role of Software Defined Radio Technology

    Hiroshi HARADA  Masahiro KURODA  Hiroyuki MORIKAWA  Hiromitsu WAKANA  Fumiyuki ADACHI  

     
    INVITED PAPER

      Vol:
    E86-B No:12
      Page(s):
    3374-3384

    The Communications Research Laboratory (CRL) started a new project named the New Generation Mobile Network Project in April 2002. The target of this project is the development of new technologies to enable seamless and secure integration of various wireless access networks such as 3rd and 4th generation cellular, wireless LAN, high-speed mobile wireless, wired communications, and broadcasting networks. This paper presents an overview of CRL's new generation mobile communication system that is called The Multimedia Integrated Network by Radio Access Innovation Plus (MIRAI+), as well as details the role of Software Radio Technology (SDR) in MIRAI+.

  • A Retargetable Simulator Generator for DSP Processor Cores with Packed SIMD-type Instructions

    Nozomu TOGAWA  Kyosuke KASAHARA  Yuichiro MIYAOKA  Jinku CHOI  Masao YANAGISAWA  Tatsuo OHTSUKI  

     
    PAPER-Simulation Accelerator

      Vol:
    E86-A No:12
      Page(s):
    3099-3109

    A packed SIMD type operation or a SIMD operation is n-parallel b/n-bit sub-operations executed by the modified n-bit functional unit. Such a functional unit is called a SIMD functional unit and a processor core which can execute SIMD operations is called a SIMD processor core. SIMD operations can be effectively applied to image processing applications. This paper focuses on hardware/software cosynthesis of SIMD processor cores and particularly proposes a new simulator generator which simulates pipelined instructions for a SIMD processor. Generally, a SIMD functional unit has many options and then we can have so many different SIMD functional unit instances. However, since our hardware/software cosynthesis system synthesizes a special-purpose processor core for an input application program, it uses very limited SIMD functional unit instances. In the proposed approach, we consider a SIMD operation to be a set of SIMD sub-operations. By adding up the appropriate SIMD sub-operations, we construct a single SIMD operation. Then a SIMD functional unit behavior can be characterized by a collection of SIMD operations. This approach has the advantage that: if we have a small number of behavior libraries for SIMD sub-operations, we can instantiate a particular SIMD functional unit behavior. Experimental results demonstrate the effectiveness of the proposed approach.

20721-20740hit(30728hit)