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[Keyword] Ti(30728hit)

22521-22540hit(30728hit)

  • Deterministic Built-in Test with Neighborhood Pattern Generator

    Michinobu NAKAO  Yoshikazu KIYOSHIGE  Koichiro NATSUME  Kazumi HATAYAMA  Satoshi FUKUMOTO  Kazuhiko IWASAKI  

     
    PAPER-Fault Tolerance

      Vol:
    E85-D No:5
      Page(s):
    874-883

    This paper presents a new deterministic built-in test scheme using a neighborhood pattern generator (NPG) to guarantee complete fault efficiency with small test-data storage. The NPG as a decoding logic generates both a parent pattern and deterministic child patterns within a small Hamming distance from the parent pattern. A set of test cubes is encoded as a set of seeds for the NPG. The proposed method is practically acceptable because no impact on a circuit under test is required and the design of the NPG does not require the results of test generation. We also describe an efficient seed generation method for the NPG. Experimental results for benchmark circuits demonstrate that the proposed method can significantly reduce the storage requirements when compared with other deterministic built-in test methods.

  • CMOS Time-to-Digital Converter without Delay Time

    Jin-Ho CHOI  

     
    LETTER-Electronic Circuits

      Vol:
    E85-C No:5
      Page(s):
    1216-1218

    In this paper, a time-to-digital converter in which the digital output is obtained without delay time is proposed. The circuit consists of a time-to-voltage converter, voltage-to-frequency converter, and counter. In the time-to-voltage converter, a capacitor is charged with a constant current during the input time interval. The change in the capacitor voltage is proportional to the input time and the capacitor voltage can be converted into a pulse signal with the voltage-to-frequency converter. The frequency of the pulse signal is directly proportional to the peak capacitor voltage and the pulse signals are counted to obtain the digital output. In the proposed circuit, the input time interval can be easily controlled and the resolution of the digital output can be improved by controlling the passive devices such as the capacitor and resistor.

  • Analysis of High-Speed Signal Behavior in a Miniaturized Interconnect

    Akihiro MORIMOTO  Koji KOTANI  Kazushi TAKAHASHI  Shigetoshi SUGAWA  Tadahiro OHMI  

     
    PAPER

      Vol:
    E85-C No:5
      Page(s):
    1111-1118

    Precise interconnect analysis is strongly required for giga-scale integration the operation frequency of which is excess 10 GHz. In this study, detailed and accurate analyses of a coaxial interconnect and an actual rectangular interconnect have been performed by the direct evaluation of Maxwell's equations and the finite element method, respectively. It has been revealed that there are two propagation modes for LSI interconnects: skin depth limited propagation mode and interconnect induced slow wave mode. In a miniaturized interconnect, the propagation mode is the interconnect induced slow wave mode; therefore, we cannot obtain the light-speed propagation due to such an interconnect-induced effect. In order to overcome this speed limitation or to improve signal integrity, it is essential to introduce a short interconnect for a miniaturized structure, and a much larger interconnect than the skin depth. We propose a gas-isolated interconnect as a candidate for an ultimately low-k structure in order to increase the signal-propagation speed. By the introduction of such structures, the performance of miniaturized devices in the deep submicron region will be effectively enhanced.

  • Analysis of Boron Penetration and Gate Depletion Using Dual-Gate PMOSFETs for High Performance G-Bit DRAM Design

    Norikatsu TAKAURA  Ryo NAGAI  Hisao ASAKURA  Satoru YAMADA  Shin'ichiro KIMURA  

     
    PAPER

      Vol:
    E85-C No:5
      Page(s):
    1138-1145

    We developed a method for analysis of boron penetration and gate depletion using N+ and P+ dual-gate PMOSFETs. An N+ gate PMOSFETs, which is immune to boron penetration and gate depletion, exhibited the threshold voltage shifts and fluctuation in P+ gate PMOSFETs fabricated using identical N- substrates. We showed the importance of Vth fluctuation analysis and found that the Vth fluctuation in N+ gate PMOSFETs was negligible, but, the Vth fluctuation in P+ gate PMOSFETs was significant, indicating that the Vth fluctuation in P+ gate PMOSFETs was dominated by boron penetration. It was also shown, for the first time, that boron penetration occurred with gate depletion, and gate depletion must be very strong to suppress boron penetration. The dual-gate PMOSFET method makes it possible to select high-performance G-bit DRAM fabrication processes that are robust against Vth fluctuation.

  • A Spatially Adaptive Gradient-Projection Image Restoration

    Min-Cheol HONG  Hyung Tae CHA  Hern-Soo HAHN  

     
    LETTER-Image Processing, Image Pattern Recognition

      Vol:
    E85-D No:5
      Page(s):
    910-913

    In this letter, we propose a spatially adaptive image restoration algorithm, using local statistics. The local variance, mean and maximum value are utilized to constrain the solution space. These parameters are computed at each iteration step using partially restored image. A parameter defined by the user determines the degree of local smoothness imposed on the solution. The resulting iterative algorithm exhibits increased convergence speed when compared with the non-adaptive algorithm. In addition, a smooth solution with a controlled degree of smoothness is obtained. Experimental results demonstrate the capability of the proposed algorithm.

  • Fabrication of 100 nm Width Fine Active-Region Using LOCOS Isolation

    Daisuke NOTSU  Naoya IKECHI  Yasuyuki AOKI  Nobuyuki KAWAKAMI  Kentaro SHIBAHARA  

     
    PAPER

      Vol:
    E85-C No:5
      Page(s):
    1119-1124

    We have investigated fabricating fine active regions by tuning process condition of conventional LOCOS for the fabrication of the gate width 100 nm MOSFET. Considering the lowering in fluidity of silicon dioxide, oxidation temperature was changed to 900 which is lower than conventional 1000. In addition active region shape was modified to utilize vertical stress due to nitride elastic force. As a result, 75 nm width fine active region was successfully fabricated. Though lowering of the oxidation temperature tends to increase stress, junction leakage current and gate oxide reliability showed no degradation. On the other hand, PSL (Poly-Si Sidewall LOCOS) gave rise to degradation in the electrical properties by the stress. Using the LOCOS process, we have fabricated the MOSFETs with the fine active regions.

  • A Comparison of Bottom-Up Pushdown Tree Transducers and Top-Down Pushdown Tree Transducers

    Katsunori YAMASAKI  Yoshichika SODESHIMA  

     
    PAPER-Theory of Automata, Formal Language Theory

      Vol:
    E85-D No:5
      Page(s):
    799-811

    In this paper we introduce a bottom-up pushdown tree transducer (b-PDTT) which is a bottom-up tree transducer with pushdown storage (where the pushdown storage stores the trees) and may be considered as a dual concept of the top-down pushdown tree transducer (t-PDTT). After proving some fundamental properties of b-PDTT, for example, any b-PDTT can be realized by a linear stack with single state and converted into G-type normal form which corresponds to Greibach normal form in a context-free grammar, and so on, we compare the translational capability of a b-PDTT with that of a t-PDTT.

  • Improvements in Solution of Integral Eigenvalue Equations for Waveguides of Arbitrary Cross Section

    Nguyen Hoang HAI  Masao KODAMA  

     
    PAPER-Optoelectronics

      Vol:
    E85-C No:5
      Page(s):
    1156-1163

    Cutoff frequencies and the modal fields in hollow conducting waveguides of arbitrary cross section are frequently calculated by the method of solving integral equations. This paper presents some improvements for the method by the integral equations. The improved method can calculate the cutoff frequencies and the modal fields only by using the real number, and this method can remove extraneous roots when calculating the cutoff frequencies. The former method calculates the cutoff frequency and the fields only at the cutoff frequency, but the improved method can calculate the fields at arbitrary phase constants.

  • Delta-Sigma Modulator Using a Resonant-Tunneling Diode Quantizer

    Miwa MUTOH  Hiroyuki FUKUYAMA  Toshihiro ITOH  Takatomo ENOKI  Tsugumichi SHIBATA  

     
    LETTER-Electronic Circuits

      Vol:
    E85-C No:5
      Page(s):
    1219-1221

    A novel delta-sigma modulator that utilizes a resonant-tunneling diode (RTD) quantizer is proposed and its operation is investigated by HSPICE simulations. In order to eliminate the signal-to-noise-and-distortion ratio (SINAD) degradation caused from the poor isolation of a single-stage quantizer (1SQ), a three-stage quantizer (3SQ), which consists of three cascoded RTD quantizers, is introduced. At a sample rate of 10 Gsps (samples per a second) and a signal bandwidth of 40 MHz (oversampling ratio of 128), the modulator demonstrates a SINAD of 56 dB, which corresponds to the effective number of bits of 9.3.

  • An Improvement of Tree-Based Multicasting for Irregular Switch-Based Networks with Wormhole Routing

    Nen-Chung WANG  Tzung-Shi CHEN  Chih-Ping CHU  

     
    PAPER-Computer Systems

      Vol:
    E85-D No:5
      Page(s):
    812-823

    In this paper, we propose an efficient dual-tree-based multicasting scheme with three destination-switch partition strategies on irregular switch-based networks. The dual-tree-based routing scheme supports adaptive, distributed, and deadlock-free multicast on irregular networks with double channels. We first describe a dual-tree structure constructed from the irregular networks and prove that the multicasting based on such a structure is deadlock-free. Then, an efficient multicast routing algorithm with three destination-switch partition strategies: source-switch-based partition, destination-switch-based partition, and all-switches-based partition, is proposed. Finally, we perform simulations to evaluate our proposed algorithm under various impact parameters: system size, message length, and startup time. The experimental results show that the improved tree-based multicasting scheme outperforms the usual tree-based multicasting scheme. The dual-tree-based multicasting scheme with destination-switch-based partition is shown to be the best for all situations.

  • Escape and Restoration Routing: Suspensive Deadlock Recovery in Interconnection Networks

    Toshinori TAKABATAKE  Masato KITAKAMI  Hideo ITO  

     
    PAPER-Computer Systems

      Vol:
    E85-D No:5
      Page(s):
    824-832

    In interconnection networks, deadlock recovery has been studied in routing strategy. The routing strategy for the deadlock recovery is intended to optimize the routing performance when deadlocks do not occur. On the other hand, it is important to improve the routing performance by handling deadlocks if they occur. In this paper, a routing strategy for suspensive deadlock recovery called an escape-restoration routing is proposed and its performance is evaluated. In the principle of the proposed techniques, a small amount of exclusive buffer (escape-buffer) at each router is prepared for handling one of deadlocked packets. The transmission of the packet is suspended by temporarily escaping it to the escape-buffer. After the other deadlocked packets were sent, the suspended transmission resumes by restoring the escaped packet. Evaluation results show that the proposed techniques can improve the routing performance more than that of the previous recovery-based techniques in handling deadlocks.

  • Analytical Evaluation of Internet Packet Loss Recovery Using Convolutional Codes

    Anna YAMAGUCHI  Masayuki ARAI  Satoshi FUKUMOTO  Kazuhiko IWASAKI  

     
    PAPER-Fault Tolerance

      Vol:
    E85-D No:5
      Page(s):
    854-863

    With increasing Internet traffic congestion, the provision of reliable transmission and packet loss recovery continues to be of substantial importance. In this paper, we analyze a new recovery method using punctured convolutional codes, demonstrating the simplicity and efficiency of the proposed method for the recovery of lost packets. The analysis provides a method for determining the recoverability and the post-reconstruction receiving rate for a given convolutional code. The exact expressions for calculating the recovery rate are derived for a number of convolutional codes and the (2, 1, m) punctured convolutional code. Where packet loss probabilities are in the range typically found in Internet transmissions, the convolutional code-based method delivers superior performance over the traditional parity method with the same redundancy.

  • A Modified Exoskeleton and Its Application to Object Representation and Recognition

    Rajalida LIPIKORN  Akinobu SHIMIZU  Yoshihiro HAGIHARA  Hidefumi KOBATAKE  

     
    PAPER-Image Processing, Image Pattern Recognition

      Vol:
    E85-D No:5
      Page(s):
    884-896

    The skeleton and the skeleton function of an object are important representations for shape analysis and recognition. They contain enough information to recognize an object and to reconstruct its original shape. However, they are sensitive to distortion caused by rotation and noise. This paper presents another approach for binary object representation called a modified exoskeleton(mES) that combines the previously defined exoskeleton with the use of symmetric object whose dominant property is rotation invariant. The mES is the skeleton of a circular background around the object that preserves the skeleton properties including significant information about the object for use in object recognition. Then the matching algorithm for object recognition based on the mES is presented. We applied the matching algorithm to evaluate the mES against the skeleton obtained from using 4-neighbor distance transformation on a set of artificial objects, and the experimental results reveal that the mES is more robust to distortion caused by rotation and noise than the skeleton and that the matching algorithm is capable of recognizing objects effectively regardless of their size and orientation.

  • Fault-Tolerance Design for Multicast Using Convolutional-Code-Based FEC and Its Analytical Evaluation

    Anna YAMAGUCHI  Masayuki ARAI  Hitoshi KUROSU  Satoshi FUKUMOTO  Kazuhiko IWASAKI  

     
    PAPER-Fault Tolerance

      Vol:
    E85-D No:5
      Page(s):
    864-873

    In this paper, we propose and analytically evaluate the use of punctured convolutional codes for recovering packets lost in multicast transmission. An independent erasure channel is assumed for packets transmission over a star topology. The analysis provides a method for determining the recoverability and the post-reconstruction receiving rate for a given convolutional code. We theoretically evaluate the effectiveness of the proposed approach taking into account two different parameters: the number of transmissions per packet and the number of packets needed to be sent to guarantee the reception of data. Finally, we compare the proposed approach with the scheme when parity packets are generated based on Reed-Solomon codes.

  • Cryptanalysis of a Key Management Scheme for Secure Multicast Communications

    Gwoboa HORNG  

     
    LETTER-Internet

      Vol:
    E85-B No:5
      Page(s):
    1050-1051

    Multicast is an efficient way to send messages to a group of members. It is becoming the basis for a number of applications, such as teleconferencing, news groups, and on-line games. Security is one of the main issues in realizing multicast communications. A working group within IETF dedicated to multicast security has been formed and RFCs and working drafts concerning multicast security are proposed. This letter analyzes the security of a scheme proposed in [1] for securely establishing a shared, secret key in a large, dynamic group. We show that it fails to provide forward and backward security.

  • Error Performance of Codes to which Belief Propagation Decoding Algorithm is Applicable

    Akira SHIOZAKI  Hideki FUKUHARA  

     
    LETTER-Coding Theory

      Vol:
    E85-A No:5
      Page(s):
    1183-1186

    This letter presents the empirical error performance of combining method of a binary numerical code and a single error correcting code on Gaussian channel by belief propagation (BP) decoding algorithm. The numerical codes mentioned here are constructed with any symbol value and have the parity check matrices in reduced-echelon form whose elements are binary (0 and 1). The simulation results show that the method yields good decoding error performance for medium code lengths.

  • Laser Doping for Ultra-Shallow Junctions Monitored by Time Resolved Optical Measurements

    Dominique DEBARRE  Gurwan KERRIEN  Takashi NOGUCHI  Jacques BOULMER  

     
    PAPER

      Vol:
    E85-C No:5
      Page(s):
    1098-1103

    Laser induced boron doping of silicon is studied as a function of the laser pulse number and energy density, in a special configuration where the precursor gas (BCl3) is injected and chemisorbed on the Si surface prior to each laser pulse. In-situ optical diagnostics, based on the transient reflectivity at 675 nm, allow to control the evolution of the dopant concentration and of the doped layer thickness during the laser doping process. Samples are characterized by the four-point probe method, atomic force microscopy (AFM) and secondary ion mass spectrometry (SIMS). As the laser pulse number is scanned from 10 to 200 at a constant laser pulse energy, the junction depth increases from 21 to 74 nm while its sheet resistance decreases from 220 to 17 Ω/. Moreover, boron concentrations well above the solubility limit (up to 31021 cm-3 for 200 pulses) and very abrupt box-like dopant profiles are obtained. So, laser doping, in this dopant gas injection configuration, seems to be a very attractive technique to meet the International Technology Roadmap for Semiconductors (ITRS) requirements for ultra-shallow junctions.

  • Design of the HomeMAC: QoS Based MAC Protocol for the Home Network

    Won-Joo HWANG  Hideki TODE  Koso MURAKAMI  

     
    PAPER-Network

      Vol:
    E85-B No:5
      Page(s):
    1002-1011

    Progress in the fields of broadband access networks and information appliances has led to the introduction of a new network domain called Home Network. In 1999, HomePNA 2.0 using phone lines was proposed, and we believe it is one of the most promising solutions, because of its cost-effectiveness. However, it is not able to guarantee the QoS due to the adaptation of the mature IEEE802.3 CSMA/CD technology which is used for Ethernet. In light of this, we propose and evaluate a new MAC protocol for the Home Network called the HomeMAC that provides guaranteed QoS for appliances and PCs. HomeMAC features a hybrid CSMA/CD-Timed Token protocol which combines the CSMA/CD with timed token protocol and transmits real-time traffic based on the QoS Level Table (QLT) for guaranteeing QoS. In the HomeMAC, there are two different transmission modes, namely, the CSMA/CD Mode when there is no real-time traffic, and the Timed Token Mode when there is real-time traffic taking place. By dynamically switching the transmission mode between CSMA/CD Mode and Timed Token Mode in accordance with the different kinds of traffic, the hybrid protocol provides low delay, low jitter, and low loss rate to multimedia appliances such as TVs, DVDs, and PCs. Moreover, by providing flexible bandwidth allocation based on QLT, the HomeMAC can serve high QoS whole covering entire offered load.

  • Performance Analysis of SIR-Based Closed-Loop Power Control with Feedback Errors

    Andrea ABRARDO  Giovanni GIAMBENE  David SENNATI  

     
    PAPER

      Vol:
    E85-B No:5
      Page(s):
    872-881

    This paper deals with a cellular system based on Code Division Multiple Access (CDMA) and investigates the performance of Signal-to-Interference (SIR)-based Closed Loop-Power Control (CLPC) schemes taking into account errors on the feedback channel that conveys the power control command from the base station to the mobile terminals. We have evaluated both the distribution of the received power at the base station and the optimum control step size that minimizes the Control Error (CE) standard deviation, a useful measure of the CLPC performance. The impact of interference variations has been deeply investigated for different mobility scenarios and for different feedback channel error conditions.

  • Box-Like Response of Microring Resonator Filter by Stacked Double-Ring Geometry

    Yasuo KOKUBUN  Takashi KATO  Sai Tak CHU  

     
    PAPER-Hybrid and Passive Devices

      Vol:
    E85-C No:4
      Page(s):
    1018-1024

    The Lorentzian-shape filter response of a microring resonator filter is not suitable to the practical use in WDM systems, because of the lack of pass band flatness, high cross talk, and the large wing in the stop band. Therefore, the tailoring of filter response shape is required to improve the performance. In this paper, the authors designed and demonstrated the box-like filter response of microring resonator filter by using the supermodes of stacked double microring resonators. The thicknesses of microrings and the separation between them were optimally designed to give the maximally flat response. A fine fabrication process was developed to achieve the deep and very smooth side wall. The shape factor, which is defined by the ratio of -1 dB bandwidth to -10 dB bandwidth, was successfully improved by three factors from 0.17 of Lorentzian shape to 0.51.

22521-22540hit(30728hit)