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[Keyword] Ti(30728hit)

28321-28340hit(30728hit)

  • Performance of an ATM Multiplexer with Selective Cell Discarding for On-Off Bursty Traffics

    Sang Won MIN  Hae CHUNG  Chong Kwan UN  

     
    PAPER-Communication Networks and Service

      Vol:
    E78-B No:9
      Page(s):
    1253-1261

    We study an asynchronous transfer mode (ATM) multiplexer with selective cell discarding (SCD), and propose as a new traffic parameter the ratio of high and low priority cell streams when a cell stream multiplexed is classified by the cell loss priority (CLP) field in a cell header. By having loss priority control, it is possible to increase the multiplexing gain. For performance analysis we assume that an on-of T bursty traffic is described with several traffic parameters and the proposed priority ratio, and is approximately modeled by a Markov-modulated deterministic process (MMDP). Assuming that several independent and homogeneous on-off bursty traffics with priority discrimination are multiplexed, we present an analytical procedure for the cell loss probability of each priority level in statistical cell multiplexing with loss priority control, and use the performance results for connection admission control (CAC). Also, we consider the effect of the proposed priority ratio. Although loss priority control increases the statistical multiplexing gain, it is not appropriate for the on-off bursty traffic to change the value of the high-priority ratio in order to obtain a larger multiplexing gain, since the admissible load is determined by the loss probability of low priority traffic for most cases and the values of the ratio in a certain range slightly affect it.

  • Calculation of Harmonic Distortion of PLL FM Demodulator with Time Delay

    Yutaka TAKAHASHI  Hitoshi SAKAGAMI  

     
    LETTER-Communication Systems and Transmission Equipment

      Vol:
    E78-B No:9
      Page(s):
    1336-1338

    We present both numerical and approximate calculations to estimate the total harmonic distortion of demodulated signal from the PLL which has an excess phase shift or some time delay in the loop. Values by the two calculation methods are in agreement with results of the appropriate experiment.

  • Acceleration Factor for Tarnish Testing of Silver Contact Surface

    Terutaka TAMAI  Yasuhiro KURANAGA  

     
    PAPER-Electronic Circuits

      Vol:
    E78-C No:9
      Page(s):
    1273-1278

    Silver is a fundamental material for electrical contact application. In spite of high electrical conductivity and economical advantage, silver surface is corroded easily by environment contained sulfide. A corrosion product as Ag2S deteriorates the property of contact reliability. In order to examine contact reliability, the acceleration tests have been accepted widely in industries. In the present study, the acceleration factor of the contact reliability for the sulfide film on the surface of silver contact which was subject to the tarnish acceleration test was clarified in comparison with the film grown in a normal office environment. The accelerated environment based on the Japan Electric Industry Development Association (JEIDA) standard No.25 was adopted. This environment is consisted of air contained 3 ppm H2S gas under 40, 85-95% RH. The growth rate of the sulfide film (Ag2S) was evaluated by applying the ellipsometry analysis. In the results, it was found that growth of Ag2S film of 500 in thickness in the normal office environment required corrosion time of 3103 h. This thickness of 500 caused increase in contact resistance of 0.1-1.0 (Ω). However, in the accelerated environment, corrosion time decreased to 1.7 h for same thickness. Therefore, the acceleration factor was obtained by comparison of these time as 1.8103 for the standard test of JEIDA.

  • Power Heterojunction FETs for Low-Voltage Digital Cellular Applications

    Keiko INOSAKO  Naotaka IWATA  Masaaki KUZUHARA  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1241-1245

    This paper describes 950 GHz power performance of double-doped AlGaAs/InGaAs/AlGaAs heterojunction field-effect transistors (HJFET) operated at a drain bias voltage ranging from 2.5 to 3.5 V. The developed 1.0 µm gatelength HJFET exhibited a maximum drain current (Imax) of 500 mA/mm, a transconductance (gm) of 300 mS/mm, and a gate-to-drain breakdown voltage of 11 V. Operated at 3.0 V, a 17.5 mm gate periphery HJFET showed 1.4 W Pout and -50.3 dBc adjacent channel leakage power at a 50 kHz off-carrier frequency from 950 MHz with 50% PAE. Harmonic balance simulations revealed that the flat gm characteristics of the HJFET with respect to gate bias voltage are effective to suppress intermodulation distortion under large signal operation. The developed HJFET has great potential for small-sized digital cellular power applications operated at a low DC supply voltage.

  • On Applicability of Linear Cryptanalysis to DES-like Cryptosystems--LOKI89, LOKI91 and s2 DES--

    Toshio TOKITA  Tohru SORIMACHI  Mitsuru MATSUI  

     
    PAPER

      Vol:
    E78-A No:9
      Page(s):
    1148-1153

    This paper discusses linear cryptanalysis of LOKI89, LOKI91 and s2DES. Our computer program based on Matsui's search algorithm has completely determined their best linear approximate equations, which tell us applicability of linear cryptanalysis to each cryptosystem. As a result, LOKI89 and LOKI91 are resistant to linear cryptanalysis from the viewpoint of the best linear approximate probability, whereas s2DES is breakable by a known-plaintext attack faster than an exhaustive key search. Moreover, our search program, which is also applicable to differential cryptanalysis, has derived their best differential characteristics as well. These values give a complete proof that characteristics found by Knudsen are actully best.

  • An Accurate FET Model for Microwave Nonlinear Circuit Simulation

    Junko ONOMURA  Shigeru WATANABE  Susumu KAMIHASHI  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1223-1228

    We propose an accurate FET model for microwave nonlinear circuit simulation, which has been modified from the Statz model. We have greatly enhanced the accuracy of both dc and capacitance expressions, especially in the knee voltage region where Ids begins to saturate. In the expression of dc characteristics, our model improves the accuracy by incorporating the drain-source voltage dependence of pinch-off voltage, the gate-source voltage dependence of knee voltage, and the non-square dependence of drain current against the gate-source voltage. The non-square-root voltage dependence of gate capacitances is considered as well. All modifications are simple and the parameter extraction is kept as simple as that of the Statz model. By using this model, good agreement has been obtained between simulated and measured characteristics of a GaAs FET. For the dc characteristics and the S-parameters, each of estimated error is within 5% and 10%. The model accuracy has been verified by comparison of simulated and measured results of power amplifier performances over a wide range of operating conditions.

  • On Chaotic Synchronization and Secure Communications

    Ljupco M. KOCAREV  Toni D. STOJANOVSKI  

     
    PAPER

      Vol:
    E78-A No:9
      Page(s):
    1142-1147

    In this paper we present a system for secure communications based on chaos synchronization. Unlike the existing systems for communication via chaotic synchronization, our system extracts the information at the receiver without error. A possibility for secure communications using Lorenz system is given. A practical algorithm for secret-key cryptography is suggested and is evaluated through statistical tests that have not shown any weakness. Furthermore, the algorithm is extremely simple for implementation in a program.

  • Detection and Tracking of Facial Features by Using Edge Pixel Counting and Deformable Circular Template Matching

    Liyanage C. DE SILVA  Kiyoharu AIZAWA  Mitsutoshi HATORI  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E78-D No:9
      Page(s):
    1195-1207

    In this paper face feature detection and tracking are discussed, using methods called edge pixel counting and deformable circular template matching. Instead of utilizing color or gray scale information of the facial image, the proposed edge pixel counting method utilizes the edge information to estimate the face feature positions such as eyes, nose and mouth, using a variable size face feature template, the initial size of which is predetermined by using a facial image database. The method is robust in the sense that the detection is possible with facial images with different skin color and different facial orientations. Subsequently, by using a deformable circular template matching two iris positions of the face are determined and are used in the edge pixel counting, to track the features in the next frame. Although feature tracking using gray scale template matching often fails when inter frame correlation around the feature areas are very low due to facial expression change (such as, talking, smiling, eye blinking etc.), feature tracking using edge pixel counting can track facial features reliably. Some experimental results are shown to demonstrate the effectiveness of the proposed method.

  • Evaluation of Fixed Charge and Interface Trap Densities in SIMOX Wafers and Their Effects on Device Characteristics

    Shoichi MASUI  Tatsuo NAKAJIMA  Keisuke KAWAMURA  Takayuki YANO  Isao HAMAGUCHI  Masaharu TACHIMORI  

     
    PAPER-Integrated Electronics

      Vol:
    E78-C No:9
      Page(s):
    1263-1272

    The buried oxide nonintegrities, represented as the equivalent fixed oxide charge and interface trap densities at both the upper and lower interface of buried oxide, are evaluated for low-dose and high-dose SIMOX wafers, and their effects on device characteristics are investigated. The equivalent fixied oxide charge and trap densities at the lower interface, which are measured with buried oxide capacitors, are negligibly small in as-fabricated SIMOX wafers. This result enables us to make an analytical model of the parasitic drain/source-to-substrate capacitance in an SOI MOSFET, in which the effect of the depletion layer under the buried oxide is considered. The influence of thinner buried oxide and process-induced fixed oxide charge on the parasitic capacitance is explored with this model. The equivalent fixed oxide charge and trap densities at the upper interface are evaluated by the threshold voltage measurement in an SOI NMOSFET. The principle of this evaluation as well as the experimental technique are described in detail. The oxide charge and trap densities at the upper interface are higher than those at the lower interface for both SIMOX wafers. With a new model of the subthreshold slope based on a two-dimensional potential analysis the influence of the trap at the upper interface is discussed.

  • GaInAsP/InP Square Buried-Heterostructure Surface-Emitting Lasers Regrown by MOCVD

    Seiji UCHIYAMA  Susumu KASHIWA  

     
    LETTER-Opto-Electronics

      Vol:
    E78-C No:9
      Page(s):
    1311-1314

    Mesa structures have been investigated to optimize a buried-heterostructure (BH) for a GaInAsP/InP surface-emitting (SE) laser regrown by metalorganic chemical vapor deposition (MOCVD), and it has been found that a square mesa top pattern of which the sides are at an angle of 45 to the 011 orientation is suitable. A 1.3-µm GaInAsP/InP square buried heterostructure (SBH) SE laser with this mesa structure has been demonstrated and low-threshold CW oscillation (threshold current Ith=0.45 mA) at 77 K and low-threshold room-temperature pulsed oscillation (Ith=12 mA) have been obtained.

  • Device Figure-of-Merits for High-Speed Digital ICs and Baseband Amplifiers

    Eiichi SANO  Yutaka MATSUOKA  Tadao ISHIBASHI  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1182-1188

    Device figure-of-merits for digital ICs are derived from analytical delay expressions for emitter-coupled logic and source-coupled FET logic inverters and are compared with the operating speeds of D-F/Fs reported in previous studies. We show that device figure-of-merits for baseband amplifiers are equivalent to those for digital ICs. The validity of device figure-of-merits are confirmed by measuring the bandwidth of the baseband amplifiers fabricated with AlGaAs/GaAs LBCTs.

  • A Super Low Noise AlInAs/InGaAs HEMT Fabricated by Selective Gate Recess Etching

    Naohito YOSHIDA  Toshiaki KITANO  Yoshitsugu YAMAMOTO  Takayuki KATOH  Hiroyuki MINAMI  Takuo KASHIWA  Takuji SONODA  Hirozo TAKANO  Osamu ISHIHARA  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E78-C No:9
      Page(s):
    1279-1285

    A 0.15 µm T-shaped gate AlInAs/InGaAs high electron mobility transistor (HEMT) with an excellent RF performance has been developed using selective wet gate recess etching. The gate recess is formed by a pH-adjusted citric acid/NH4OH/H2O2 mixture with an etching selectivity of more than 30 for InGaAs over AlInAs. The standard deviation of saturation drain current (Idss) is as small as 3.2 mA for an average Idss of 47 mA on a 3 inch diameter InP wafer. The etching time for recess formation is optimized and an ft of 130 GHz and an MSG of 10 dB at 60 GHz are obtained. The extremely low minimum noise figure (Fmin) of 0.9 dB with an associated gain (Ga) of 7.0 dB has been achieved at 60 GHz for a SiON-passivated device. This noise performance is comparable to the lowest value of Fmin ever reported for an AlInAs/InGaAs HEMT with a passivation film.

  • Coding Theorems on Correlated General Sources

    Shigeki MIYAKE  Fumio KANAYA  

     
    PAPER

      Vol:
    E78-A No:9
      Page(s):
    1063-1070

    Slepian, Wolf and Wyner proved famous source coding theorems for correlated i.i.d. sources. On the other hand recently Han and Verdú have shown the source and channel coding theorems on general sources and channels whose statistics can be arbitrary, that is, no assumption such as stationarity or ergodicity is imposed. We prove source coding theorems on correlated general sources by using the method which Han and Verdú developed to prove their theorems. Also, through an example, we show some new results which are essentially different from those already obtained for the i.i.d. source cases.

  • Effects of Hard-Limiter and Error Correction Coding on Performance of Direct-Detection Optical CDMA Systems with PPM Signaling

    Tomoaki OHTSUKI  Iwao SASASE  Shinsaku MORI  

     
    PAPER

      Vol:
    E78-A No:9
      Page(s):
    1092-1101

    The effect of an optical hard-limiter on the performance of direct-detection optical synchronous code-division multiple-access (CDMA) systems with M-ary pulse position modulation (PPM) signaling is analyzed. Moreover, the effect of the error correction coding on the performance of direct-detection optical synchronous CDMA systems with PPM signaling is analyzed: Reed-Solomon (RS) codes and convolutional codes (CC's) with soft-decision Viterbi decoding are employed. We analyze the performance under the assumption of Poisson shot noise model for the receiver photodetector and the noise due to the detector dark currents is considered. We analyze the performance under average power and bit rate constraints. Our results show that the optical hard-limiter is not effective for improving the performance of the optical CDMA systems with PPM signaling. Moreover, RS codes are shown to be more effective than CC's with soft-decision Viterbi decoding to reduce an asymptotic floor to the error probability of the system with large M, while CC's with soft-decision Viterbi decoding is more effective than RS codes for the system with small M. Furthermore, we show that as the code rate of the error correction code increases, the required average energy to achieve the bit error probability Pb105 for the RS coded PPM/CDMA system appreciably increases compared with that for the convolutional coded PPM/CDMA system when M16.

  • Phase Ambiguity Resolver for PCM Sound Broadcasting Satellite Service with Low Power Consumption Viterbi Decoder Employing SST Scheme

    Kazuhiko SEKI  Shuji KUBOTA  Shuzo KATO  

     
    PAPER-Communication Systems and Transmission Equipment

      Vol:
    E78-B No:9
      Page(s):
    1269-1277

    This paper proposes a novel phase ambiguity resolver with combining a very low power Viterbi decoder employing a scarce state transition scheme to realize cost effective receivers for the PCM sound broadcasting satellite service. The theoretical analyses on phase decision performance show that the proposed resolver achieves the symbol-by-symbol phase detection and decides correctly phases of the demodulated data even if the bit error probability of 710-2. The resolver also reduces the phase decision time to below 1/1000 of that of the conventional resolver. Furthermore, experimental results of the power consumption estimate that the prototype Viterbi decoder consumes only 60mW at the data rate of 24.576Mbit/s.

  • Bifurcation Analysis of Nonlinear Resistive Circuits by Curve Tracing Method

    Lingge JIANG  Akio USHIDA  

     
    PAPER-Nonlinear Problems

      Vol:
    E78-A No:9
      Page(s):
    1225-1232

    In this paper, we discuss computational methods for obtaining the bifurcation points and the branch directions at branching points of solution curves for the nonlinear resistive circuits. There are many kinds of the bifurcation points such as limit point, branch point and isolated point. At these points, the Jacobian matrix of circuit equation becomes singular so that we cannot directly apply the usual numerical techniques such as Newton-Raphson method. Therefore, we propose a simple modification technique such that the Newton-Raphson method can be also applied to the modified equations. On the other hand, a curve tracing algorithm can continuously trace the solution curves having the limit points and/or branching points. In this case, we can see whether the curve has passed through a bifurcation point or not by checking the sign of determinant of the Jacobian matrix. We also propose two different methods for calculating the directions of branches at branching point. Combining these algorithms, complicated solution curves will be easily traced by the curve tracing method. We show the example of a Hopfield network in Sect.5.

  • Growth, Design and Performance of InP-Based Heterostructure Bipolar Transistors

    Kenji KURISHIMA  Hiroki NAKAJIMA  Shoji YAMAHATA  Takashi KOBAYASHI  Yutaka MATSUOKA  

     
    INVITED PAPER

      Vol:
    E78-C No:9
      Page(s):
    1171-1181

    This paper discusses crystal-growth and device-design issues associated with the development of high-performance InP/InGaAs heretostructure bipolar transistors (HBTs). It is shown that a highly Si-doped n+-subcollector in the HBT structure causes anomalous Zn redistribution during metalorganic vapor phase epitaxial (MOVPE) growth. A thermodynamical model of and a useful solution to this big problem are presented. A novel hybrid structure consisting of an abrupt emitter-base heterojunction and a compositionally-graded base is shown to enhance nonequilibrium base transport and thereby increase current gain and cutoff frequency fT. A double-heterostructure bipolar transistor (DHBT) with a step-graded InGaAsP collector can improve collector breakdown behavior without any speed penalty. We also elucidate the effect of emitter size shrinkage on high-frequency performance. Maximum oscillation frequency fmax in excess of 250 GHz is reported.

  • Case Histories on Knowledge-Based Design Systems for LSI and Software

    Masanobu WATANABE  Toru YAMANOUCHI  Masahiko IWAMOTO  Satoru FUJITA  

     
    PAPER-Applications

      Vol:
    E78-D No:9
      Page(s):
    1164-1170

    This paper describes, from a system architectural viewpoint, how knowledge-based technologies have been utilized in developing EXLOG (an LSI circuit synthesis system) and SOFTEX (a software synthesis system) inside the authors' projects. Although the system architectures for EXLOG and SOFTEX started from the same production systems, consisting of transformation rules in the middle of the 1980's, both branched off in different directions in the 1990's. Based on experiences with EXLOG and SOFTEX, the differences between LSI and software design models are discussed, and the future directions are indicated for the knowledge-based design system architectures.

  • On p-Ary Bent Sequences

    Shinya MATSUFUJI  Kyoki IMAMURA  

     
    LETTER-Information Theory and Coding Theory

      Vol:
    E78-A No:9
      Page(s):
    1257-1260

    It is known that a family of p-ary bent sequences, whose elements take values of GF (p) with a prime p, possesses low periodic correlation properties and high linear span. Firstly such a family is shown to consist of balanced sequences in the sense that the frequency of appearances in one period is the same for each nonzero element and once less for zero element. Secondly the exact distribution of the periodic correlation values is given for the family.

  • Strategies of Channel Allocation in Developing Radio Networks with Intersite and Cosite Constraints

    Vladimir LYANDRES  

     
    LETTER-Mobile Communication

      Vol:
    E78-B No:9
      Page(s):
    1344-1347

    The influence of cochannel, adjacent channel and intermodulation constraints on the capacity of the frequency band in the dynamic channel allocation problem is estimated. Algorithms including a backtracking phase with partial reassignment of currently assigned requirements are proposed. Numerical examples show a strong possibility of a 20% capacity improvement compared to the conventional strategies.

28321-28340hit(30728hit)