This paper discusses two approaches to statistical multiplexing: rate envelope multiplexing, allowing resource sharing with small delays for low peak rate connections, and rate sharing, based on the use of large multiplexer buffers to ensure high link utilization for high speed data traffic. We argue that the weighted fair queueing scheduling algorithm provides an efficient means for combining both kinds of multiplexing in the B-ISDN. A feasible implementation known as Virtual Spacing is outlined. We illustrate the flexibility of the proposed scheme by showing how different service categories could be provided.

In this paper, the ATM Mini-Bar System (AMBS) which is a future information providing service infrastructure is proposed. The purpose of AMBS is to provide a multi-media environment in which a user can (1) select and get quickly any needed information, in low cost, at any time, among very large amount of different media information provided by a variety of providers, (2) be charged only for the information which is selected and used, (3) edit or process informations into users' individually requested style or format before using them. The basic concept and configurations of AMBS are also addressed. This system is basically a center-end oriented one-way information providing system. The information center broadcasts its contents to all user equipments based on a user request forecast, and every user equipment stores the delivered contents in its large storage. A user can select one's needed informations from the storage, and may edit or process them within the user equipment. The charge is only on the read informations from the storage, not on all contents in it. The key points of this system are the following three. (A) Introduction of a broadcast (or multicast) media for economical information delivery (exactly speaking, it is a predelivery which means a delivery before request) to user equipments. (B) Introduction of a 1 to 1 communication network for selective charging and control of each user equipments. (C) Introduction of the user equipment storage for Quick response to user information request in most cases with the broadcast (or multicast) information delivery media described above, Separation of information delivery speed and replay speed to increase system flexibility, Local user information processing or editing. As an example of technical solutions, a memory architecture, which is based on hierarchical architecture, is described. AMBS is expected to give some impacts to information industries because it can integrate many kinds of services into the same platform, but some standerdization items are needed to realize it.

We propose an asymmetric neural network which can solve inequality-constrained combinatorial optimization problems that are difficult to solve using symmetric neural networks. In this article, a knapsack problem that is one of such the problem is solved using the proposed network. Additionally, we study condition for obtaining a valid solution. In computer simulations, we show that the condition is correct and that the proposed network produces better solutions than the simple greedy algorithm.

0.15 µm CMOS transistors have been fabricated. TiSi2 salicide was used for the gate electrode and source/drain to reduce parasitic resistance. Electron beam (EB) lithography was used for the gate patterning. Since the channel impurity was implanted only around the gate to reduce the junction capacitance, a reasonably short ring oscillator delay of 33 ps was obtained at 1.9 V supply voltage. The parasitic resistance and capacitance contribution on the delay time was analyzed by SPICE simulation. It was shown that the localized channel implant is effective for scaling the delay time and power consumption, because the source/drain size difficult to scale down to as small as the gate length.

This paper proposes a universal structure for STM-N(N=1, 2, 3, ) multiplex line terminals that only utilizes N chips CMOS LSIs for Section OverHead (SOH) processing. The uniquely configured LSIs are applicable to any STM-N line terminal equipment. Reasonable frame alignment performance attributes, such as the maximum average reframe time, false in-frame time, out-of-frame detection time, and misframe time, are calculated for the configuration. A prototype SOH processing LSI built on 0.8m BiCMOS technology successfully realizes the functions needed for multiplex section termination. The STM-64 frame is also demonstrated using the proposed circuit configuration and prototype LSIs.

In this report, we propose a robust block adaptive digital filter (BADF) which can improve the accuracy of the estimated weights by averaging the adaptive weight vectors. We show that the improvement of the estimated weights is independent of the input signal correlation.

This is an attempt to examine the contact resistance of a composite material which is used for sliding contacts. The composite material used here is sintered by dispersing the solid lubricant WS2 into the metallic base alloy Cu-Sn. A method based on Greenwood's formula is applied to determine how the calculated values are related to the contact resistance values obtained in our experiments. As a result, the composite material mated with the carbon specimen is found nearly to corresponds to the values of those calculated by the extended Greenwood's formula, whereas its value mated with the tungsten specimen does not. In short, it is concluded that the composite material mated with the carbon specimen consists of multispots.

Circuit access control is a traffic control technique of rejecting calls arriving at a group of specified circuits to make the group free at a target scheduled time so that the capacity may be dynamically reallocated to serve other traffic demand. This technique plays an important role for resource allocation control in state-of-the-art capacity reconfigurable networks as well as for switching calls on a reserved basis in the ISDNs. In this paper, we present a novel adaptive scheme for circuit access control in order to overcome the inefficiency of the conventional deterministic scheme. The presented scheme is based only on knowledge about service time and bandwidth characteristics of calls. The transitional behavior of the circuit group under the scheme is analyzed, and the gain in utilization achieved by the adaptive scheme is examined. We treat a model of the circuit group shared by multi-slot calls with different service times, and describe the results of the transient analysis and the approximation method for evaluating the gains.

The performance of a nonblocking switch with two kinds of correlated input calls is analyzed. We define two kinds of calls as the waiting call and the immediate call, and assume that the immediate call has the priority over the waiting call. If the traffic density of one kind of calls is larger than maximum throughput, the ratio of the corresponding kind of calls to the total traffic must be restrained in some range. We derive the maximum ratio of the waiting call by using two approximate methods. The effects of traffic densities and transition probabilities of two kinds of calls on the maximum ratio of the waiting call are also considered. It is shown that, if the traffic density of the immediate call is smaller than that of the waiting call, our approximate methods are useful to derive the maximum ratio of the waiting call to the total traffic.

Recently as one of attractive applications in the B-ISDN era, LAN/MAN interconnection through an ATM network has been coming up because burstiness of LAN/MAN data traffic is applicable to distinctive features of cell based ATM network. In order to overcome a difference of the connection mode, i.e., CL packet transfer of LAN/MAN and CO cell transfer of ATM network, a number of interworking and bandwidth allocation mechanisms have been proposed. These methods, however, indicate both merits and drawbacks concerning with CL data transfer quality, network resource efficiency and processing overhead in IWU/CLS and the network, and have been mostly evaluated only for a single IWU model. This paper aims at showing the most appropriate method of LAN/MAN interworking for IWU-IWU or IWU-CLSF connection. In the paper, some interworking issues including a general qualitative assessment are clarified. We then evaluate the selected five interworking methods based on Bandwidth Renegotiation (BR) and VC Establishment (VCE), which are combined with Traffic Enforcement Functions (TEFs) based on policing mechanisms and Cell Loss Control (CLC) scheme. By transient and stationary simulation approach for a single IWU and an IWU-CLS connection model, the most applicable method is indicated as a case study from view points of the communication quality, effective use of the bandwidth and processing load.

Connection Admission Control (CAC) is a key part of traffic control and still leaves several challenging problems peculiar to ATM networks. One of these problems is how to assign sufficient bandwidth for any cell arrival process that satisfies the source traffic descriptor values specified by negotiation between the network and a user at the connection setup. Because the source traffic descriptor cannot describe the actual source traffic characteristics completely, it has already been studied extensively that how to estimate sufficient bandwidth under the assumption that the actual traffic parameter values in the source traffic descriptor are equal to the negotiated values. This paper extends the studies in the literature to how to estimate sufficient bandwidth only assuming that the actual values satisfy the negotiated values, that is the actual values is less than or equal to the negotiated values. We show the sufficient condition for negotiated source traffic descriptors ensuring that the cell-loss ratio calculated from the negotiated values is always the upper-bound of the actual cell-loss ratio. Using this condition, we propose a CAC that can guarantee cell-loss ratio objective so far as a user satisfies the source traffic descriptor values.

A key element in the CDMA transmission is DS spreading. Spreading in a DS/SSMA system are provided in two categories-synchronization and data. For synchronization sequences, good auto-correlation and cross-correlation properties are required in order to guarantee fast acquistion with a minimum false alarm probability. On the other hand, the auto-correlation property may not be so important in data spreading since synchronization is obtained by synchronization spreading. In this paper we provide a set of synchronization sequences and a set of data sequences--each a set of binary N-tuples--that have the necessary correlation constraints.

In this paper, we propose an efficient method (called DIRIC algorithm) to allocate carrier frequencies so as to minimize intermodulation products in two-level SCPC systems in which Hub station and many Remote stations communicate each other through satellite transponder. We also present a very efficient method to evaluate intermodulation products with substantially reduced CPU time in two-level SCPC systems. We compare and analyze the performance of several frequency allocation methods to extend DELINS-INSDEL algorithm (which is proposed by Okinaka) to two-level SCPC systems. When the proposed algorithm is applied to systems with modulated carrier, it is verified that this algorithm has the same efficiency as the unmodulated carrier. It is also shown heuristically that certain initial assignment algorithms perform better than random assignment.

In improving channel utilization in microcellular systems, adaptive channel allocation using distributed control has been reported to be effective. We describe an analytical approximation algorithm for channel dimensioning of distributed adaptive channel allocation. We compare our analytical results with simulation results and show the characteristics of permissible load as a function of the number of base station channels based on our method. Finally we illustrate traffic design and administration based on our algorithm.

Telecommunication services are expected to be upgraded from POTS to B-ISDN services in the future. This means that the conventional metallic access networks should be upgraded to optical fiber access networks because of providing high bit-rate services. Therefore, it is very important to clarify upgrade strategies in access networks. This paper proposes a dynamic evaluation method that can support decision-making on the upgrade strategy from the viewpoint of economy. This method can determine the most promising future access network and upgrade timing. Moreover, viability of various upgrade strategies can be evaluated by this method.

In this paper, we propose a hybrid hierarchical global router for multi-layer VLSI's, which executes routing and layering simultaneously. This novel approach, a hybrid hierarchical global router, is a combination of a topdown and a bottomup hierarchical routers, and may be one of interesting routing techniques. We also show experimental results, which demonstrate the superiority of the hybrid hierarchical approach. This approach may have many possibilities to be used in a various fields.

This paper describes an optimal scheduling approach which finds the scheduling result of the minimum functional unit cost under the given timing constraint. In this method, a well-defined search space is constructed incrementally and traversed in a branch-and-bound manner. During the traversal, tighter lower bounds are estimated and utilized coupled with the upper bound on the optimal solution in pruning the search space effectively. This method is extended to support multi-cycling operations, operation chaining, pipelined functional units, and pipelined data paths. Experimental results on some benchmarks show the efficiency of the proposed approach.

In this paper, bifurcation and chaotic behavior which occur in simple looped MOS inverters with high speed operation are described. The most important point in this work is to change a nonlinear transfer characteristic of a MOS inverter to the nonlinearity generating a chaos. Three types of circuits which include four, three and one MOS inverters, respectively, are proposed. A switched capacitor (SC) circuit to operate sampling holding is added in the loop in each of the circuits. The bifurcation and chaotic behavior have been found along with a variation of an external input, and/or a sampling clock frequency. The bifurcation and chaotic behavior of the proposed simple looped MOS inverters are verified by employing SPICE circuit simulator as well as the experiments. For the first type of four looped CMOS inverters, Lyapunov exponent λ which has the positive regions for the chaotic behavior can be calculated by use of the fitting nonlinear function synthesized from two sigmoid functions. For the second type of three looped CMOS inverters and the third type of one looped MOS inverter, the nonlinear charge/discharge characteristics of the hold capacitor in the SC circuit is utilized efficiently for forming the nonlinearity generating the bifurcation and chaotic behavior. Their bifurcation can be generated by the sampling clock frequency parameter which is controlled easily.

The discrete-time short-time Fourier transform (STFT) is known as a useful tool for analyzing and synthesizing signals. This paper introduces an extention of the well-known STFT to a general form which is more suitable for high resolutional signal analysis. A channel frequency division scheme is developed for realizing arbitrary bandwidth and center frequency so as to improve resolution performance. It is based on a nonuniform filter bank structure with integer decimation and interpolation factors. A design example of the generalized STFT using symmetric windows is given.

This paper investigates the problem of scheduling parallel tasks" with consideration of communication cost on an m-processor system, where processors are assumed to be identical and tasks being scheduled are independent such that they can run on more than one processor simultaneously. Once a task is processed in parallel, its finish time will be speeded up, but communication cost will also be incurred and should be taken into account. To find a schedule with minimum finish time for the parallel tasks scheduling problem is NP-hard. Therefore, in this paper, we will propose a heuristic algorithm for this kind of problem and derive its performance bounds for two different cases of applications, respectively.