Sho ENDO Takeshi SUGAWARA Naofumi HOMMA Takafumi AOKI Akashi SATOH
This paper presents a glitchy-clock generator integrated in FPGA for evaluating fault injection attacks and their countermeasures on cryptographic modules. The proposed generator exploits clock management capabilities, which are common in modern FPGAs, to generate clock signal with temporal voltage spike. The shape and timing of the glitchy-clock cycle are configurable at run time. The proposed generator can be embedded in a single FPGA without any external instrument (e.g., a pulse generator and a variable power supply). Such integration enables reliable and reproducible fault injection experiments. In this paper, we examine the characteristics of the proposed generator through experiments on Side-channel Attack Standard Evaluation Board (SASEBO). The result shows that the timing of the glitches can be controlled at the step of about 0.17 ns. We also demonstrate its application to the safe-error attack against an RSA processor.
Takayuki NOZAKI Kenta KASAI Kohichi SAKANIWA
In this paper, we investigate the error floors of the non-binary low-density parity-check codes transmitted over the binary erasure channels under belief propagation decoding. We propose a method to improve the decoding erasure rates in the error floors by optimizing labels in zigzag cycles in the Tanner graphs of codes. Furthermore, we give lower bounds on the bit and the symbol erasure rates in the error floors. The simulation results show that the presented lower bounds are tight for the codes designed by the proposed method.
Seiya KISHIMOTO Shinichiro OHNUKI
Error analysis of the multilevel fast multipole algorithm is studied for electromagnetic scattering problems. We propose novel error prediction and control methods and verify that the computational error for scattering problems with over one million unknowns can be precisely controlled under desired digits of accuracy. Optimum selection of truncation numbers to minimize computational error also will be discussed.
Chao YAN Hongjun DAI Tianzhou CHEN
Soft error has become an increasingly significant concern in modern micro-processor design, it is reported that the instruction-level temporal redundancy in out-of-order cores suffers an performance degradation up to 45%. In this work, we propose a fault tolerant architecture with fast error correcting codes (such as the two-dimensional code) based on double execution. Experimental results show that our scheme can gain back IPC loss between 9.1% and 10.2%, with an average around 9.2% compared with the conventional double execution architecture.
Xiaopeng JIAO Jianjun MU Fan FANG Rong SUN
Irregular low-density parity-check (LDPC) codes generally have good decoding performance in the waterfall region, but they exhibit higher error floors than regular ones. In this letter, we present a hybrid method, which combines code construction and the iterative decoding algorithm, to tackle this problem. Simulation results show that the proposed scheme decreases the error floor significantly for irregular LDPC codes over binary-input additive white Gaussian noise (BIAWGN) channel.
Seungwon CHOI Jung-Hyun PARK Seokkwon KIM Dong-Jo PARK
This letter introduces a joint design method for uplink-downlink multiple-input multiple-output (MIMO) relay communication systems in which the source nodes transmit information to the destination nodes with the help of a relay. We propose a signal forwarding schceme based on the minimum mean-square error (MMSE) approach in uplink relay systems. Exploiting the duality of relay systems, we also propose a relaying scheme for downlink relay systems. Simulation results confirm that the proposed joint design method improves the performance of the relay systems compared with that of conventional relaying schemes in uplink and downlink MIMO relay systems.
Satoshi DENNO Daisuke UMEHARA Masahiro MORIKURA
This paper proposes an adaptive algorithm for adaptive arrays that minimizes the bit error rate (BER) of the array output signals in radio communication systems with the use of multilevel modulation signals. In particular, amplitude phase shift keying (APSK) is used as one type of multilevel modulations in this paper. Simultaneous non-linear equations that are satisfied by the optimum weight vector of the proposed algorithm are derived and used for theoretical analyze of the performance of the adaptive array based on the proposed algorithm. As a result of the theoretical analysis, it can be shown that the proposed adaptive array improves the carrier to interference ratio of the array output signal without taking advantage of the nulls. Furthermore, it is confirmed that the result of the theoretical analysis agrees with that of computer simulation. When the number of the received antenna is less than that of the received signals, the adaptive array based on the proposed algorithm is verified to achieve much better performance then that based on the least mean square (LMS) algorithm.
Shinichiro OHNUKI Takahisa MOCHIZUKI Kenichiro KOBAYASHI Tsuneki YAMASAKI
We introduce a novel method to optimize field decomposition for a mode matching technique. Using our method, expanded mode numbers can be minimized to achieve the desired digits of computational accuracy.
Ittetsu TANIGUCHI Ayataka KOBAYASHI Keishi SAKANUSHI Yoshinori TAKEUCHI Masaharu IMAI
Forward error correction (FEC) is one of important and heavy tasks for wireless communication. Leading edge mobile embedded systems usually support not only one FEC standard, but multiple FEC standards in order to adapt to various wireless communication standards. In this paper, we propose two-stage configurable decoder model (2-Stage CDM) for multiple FEC standards for Viterbi and Turbo coding which have a variation under the constraint length, coding rate, etc. Proposed decoder model realizes a decoder instance which supports dedicated multiple FEC standards, and rapid design for domain specific decoder is realized. Proposed decoder model is configurable in two stages: at hardware generation time and at runtime, and designers can easily specify these specifications by various design parameters. Experimental results show proposed two-stage configurable decoder model supports various domain specific FEC decoder including existing decoder, and the decoder instances based on proposed 2-Stage CDM have sufficient throughput for each communication standard and reasonable area overhead compared with existing decoder.
Chikara HAMANAKA Ryosuke YAMAMOTO Jun FURUTA Kanto KUBOTA Kazutoshi KOBAYASHI Hidetoshi ONODERA
We show measurement results of variation-tolerance of an error-hardened dual-modular-redundancy flip-flop fabricated in a 65-nm process. The proposed error-hardened FF called BCDMR is very strong against soft errors and also robust to process variations. We propose a shift-register-based test structure to measure variations. The proposed test structure has features of constant pin count and fast measurement time. A 65 nm chip was fabricated including 40k FFs to measure variations. The variations of the proposed BCDMR FF are 74% and 55% smaller than those of the conventional BISER FF on the twin-well and triple-well structures respectively.
Omid DEHZANGI Bin MA Eng Siong CHNG Haizhou LI
This paper investigates a new method for fusion of scores generated by multiple classification sub-systems that help to further reduce the classification error rate in Spoken Language Recognition (SLR). In recent studies, a variety of effective classification algorithms have been developed for SLR. Hence, it has been a common practice in the National Institute of Standards and Technology (NIST) Language Recognition Evaluations (LREs) to fuse the results from several classification sub-systems to boost the performance of the SLR systems. In this work, we introduce a discriminative performance measure to optimize the performance of the fusion of 7 language classifiers developed as IIR's submission to the 2009 NIST LRE. We present an Error Corrective Fusion (ECF) method in which we iteratively learn the fusion weights to minimize error rate of the fusion system. Experiments conducted on the 2009 NIST LRE corpus demonstrate a significant improvement compared to individual sub-systems. Comparison study is also conducted to show the effectiveness of the ECF method.
Masato TAJIMA Koji OKINO Takashi MIYAGOSHI
In this letter, we show that the code-trellis and the error-trellis for a convolutional code can be reduced simultaneously, if reduction is possible. Assume that the error-trellis can be reduced by shifting particular error-subsequences. In this case, if the identical shifts occur in the corresponding subsequences of each code-path, then the code-trellis can also be reduced. First, we obtain pairs of transformations which generate the identical shifts both in the subsequences of the code-path and in those of the error-path. Next, by applying these transformations to the generator matrix and the parity-check matrix, we show that reduction of these matrices is accomplished simultaneously, if it is possible. Moreover, it is shown that the two associated trellises are also reduced simultaneously.
Won-Yong SHIN Muryong KIM Hyoseok YI Ajung KIM Bang Chul JUNG
The impact and benefits of channel state information (CSI) are analyzed in terms of degrees-of-freedom (DoFs) in a K-user interference network operating over time-selective channels, where the error variance of CSI estimation is assumed to scale with an exponent of the received signal-to-noise ratio (SNR). The original interference alignment (IA) scheme is used with a slight modification in the network. Then, it is shown that the DoFs promised by the original IA can be fully achieved under the condition that the CSI quality order, represented as a function of the error variance and the SNR, is greater than or equal to 1. Our result is extended to the case where the number of communication pairs, K, scales with the SNR, i.e., infinite K scenario, by introducing the user scaling order. As a result, this letter provides vital information to the system designer in terms of allocating training resources for channel estimation in practical cellular environments using IA.
This paper investigates the performance of a combination of the affine encoder and the maximum mutual information decoder for symmetric channels, and proves that the random coding error exponent can be attained by this combination even if the conditional probability of the symmetric channel is not known to the encoder and decoder. This result clarifies that the restriction of the encoder to the class of affine encoders does not affect the asymptotic performance of the universal code for symmetric channels.
The doubly constrained robust Capon beamformer (DCRCB), which employs a spherical uncertainty set of the steering vector together with the constant norm constraint, can provide robustness against arbitrary array imperfections. However, its performance can be greatly degraded when the uncertainty bound of the spherical set is not properly selected. In this paper, combining the DCRCB and the weight-vector-norm-constrained beamformer (WVNCB), we suggest a new robust adaptive beamforming method which allows us to overcome the performance degradation due to improper selection of the uncertainty bound. In WVNCB, its weight vector norm is limited not to be larger than a threshold. Both WVNCB and DCRCB belong to a class of diagonal loading methods. The diagonal loading range of WVNCB, which dose not consider negative loading, is extended to match that of DCRCB which can have a negative loading level as well as a positive one. In contrast to the conventional DCRCB with a fixed uncertainty bound, the bound in the proposed method varies such that the weight vector norm constraint is satisfied. Simulation results show that the proposed beamformer outperforms both DCRCB and WVNCB, being far less sensitive to the uncertainty bound than DCRCB.
Takayuki NOZAKI Kenta KASAI Kohichi SAKANIWA
In this paper, we investigate the error floors of non-binary low-density parity-check (LDPC) codes transmitted over the memoryless binary-input output-symmetric (MBIOS) channels. We provide a necessary and sufficient condition for successful decoding of zigzag cycle codes over the MBIOS channel by the belief propagation decoder. We consider an expurgated ensemble of non-binary LDPC codes by using the above necessary and sufficient condition, and hence exhibit lower error floors. Finally, we show lower bounds of the error floors for the expurgated LDPC code ensembles over the MBIOS channels.
Aloys MVUMA Shotaro NISHIMURA Takao HINAMOTO
In this paper, analysis of average bit error ratio (BER) performance of a quadriphase shift keying (QPSK) direct-sequence code-division multiple-access (DS-CDMA) system with narrow-band interference (NBI) suppression complex adaptive infinite-impulse response (IIR) notch filter is presented. QPSK DS-CDMA signal is transmitted over a Rayleigh frequency-nonselective fading channel and the NBI has a randomly-varying frequency. A closed-form expression that relates BER with complex coefficient IIR notch filter parameters, received signal-to-noise ratio (SNR), number of DS-CDMA active users and processing gain is derived. The derivation is based on the Standard Gaussian Approximation (SGA) method. Accuracy of the BER expression is confirmed by computer simulation results.
Myeongwoon JEON Kyungchul KIM Sungkyu CHUNG Seungjae CHUNG Beomju SHIN Jungwoo LEE
NAND multilevel cell flash memory devices are gaining popularity because they can increase the memory capacity by storing two or more bits to a single cell. However, when the number of levels of a cell increases, the inter-cell interference which shifts threshold voltage becomes more critical. There are two approaches to alleviate the errors caused by the voltage shift. One is the error correcting codes, and the other is the signal processing methods. In this paper, we focus on signal processing methods to reduce the inter-cell interference which causes the voltage shift, and propose two algorithms which reduce the voltage shift effects by adjusting read voltages. The simulation results show that the proposed algorithms are effective for interference mitigation.
Lei WANG Yueming CAI Weiwei YANG
For amplify-and-forward (AF) relaying with imperfect channel estimation, we present the average symbol error rate (SER) and the diversity and multiplexing tradeoff (DMT) analysis for both opportunistic relaying (OPR) and all-participate relaying (APR) schemes. SER comparisons show that when the channel estimation quality order is no larger than 1, OPR will perform worse than APR in high SNR region. Moreover, small channel estimation quality orders will also lead to significant DMT loss.
Sung Kwon HONG Jong-Moon CHUNG
In this letter, two new network coding (NC) diversity enhancement schemes are introduced for wireless relay systems. Conventional diversity enhancement approaches for relay systems suffer from error propagation at each relay and exhibit second order diversity performance. In the proposed schemes, when a relay experiences a decoding failure, the relay makes a request to have the source transmit the NC frames to the destination in its time slot. Due to this operation, the proposed schemes prevent error propagation and achieve near third order diversity performance. The proposed schemes are compared to conventional schemes based on the derived mathematical error bounds and simulation performance, both of which demonstrate the superiority of the proposed schemes.