The mobile agent paradigm is a promising technology to structure distributed applications. Since mobile agents physically move to a remote host that is under the control of a different principal, they need to be protected from this environment which is responsible for execution. In this paper, we provide a new cryptographic methodology of protecting mobile agents from unauthorized modification for the program code by malicious hosts.

This paper presents a systematic methodology for the system-level assessment of signal integrity and electromagnetic compatibility effects in high-speed communication and information systems. The proposed modeling strategy is illustrated via a case study consisting of a critical coupled net of a complex system. Three main methodologies are employed for the construction of accurate and efficient macromodels for each of the sub-structures typically found along the signal propagation paths, i.e. drivers/receivers, transmission-line interconnects, and interconnects with a complex 3D geometry such as vias and connectors. The resulting macromodels are cast in a common form, enabling the use of either SPICE-like circuit solvers or VHDL-AMS equation-based solvers for system-level EMC predictions.

Signal integrity problem arises as one of the main issues in digital circuits manufactured by today's deep submicron technology. The coupling capacitance of neighboring lines may cause delays of circuit and it may affect the functionality of circuit. These effects are usually referred to as crosstalk. Since it requires additional design cost to fix crosstalk noise, the false aggressor nodes that cannot affect on victim node have to be eliminated. In this paper, we propose efficient heuristic algorithm that considers functional correlation for false aggressor pruning in crosstalk noise analysis. The false aggressors are detected by a path sensitization algorithm and logic implication. The efficiency of our algorithm has been verified on Benchmark circuits with a 0.18 µm standard cell library. Experimental results show an average of 5.4% false aggressor detection and an average improvement of 14.6% in the accuracy of timing analysis.

This paper describes a sparse realization of passive reduced-order interconnect models via PRIMA to provide the SPICE compatible models. It is demonstrated that, if the SPICE models are directly realized so that the reduced-order equations obtained via PRIMA are stamped into the MNA matrix, the simulations of networks containing the macromodels become computationally inefficient when size of the reduced-order equations is relatively large. This is due to dense coefficient matrices of the reduced-order equations resulting from congruent transformations in PRIMA. To overcome this disadvantage, we propose a sparse realization of the reduced-order models. Since the expression is equivalent to the reduced-order equations, the passivity of the SPICE models generated is also guaranteed. Computational efficiency on SPICE is demonstrated in performing the transient analysis of circuits containing the proposed macromodels.

We propose a new dependable system called PREGMA (Platform for Reliable Environment based on a General-purpose Machine Architecture). PREGMA aims to meet two requirements -- fault tolerance and low cost -- for Internet services. It can provide fault tolerance, so we can avoid system failure and prevent data corruption, even if faults occur. That is, it masks the faults by running multiple replicated servers, each possessing its own data, in a loosely synchronized manner and delivering the majority vote as output to clients. Moreover, PREGMA is composed of COTS (Commercial Off-The-Shelf) components without modification, which makes it possible to offer the services at a low cost. We investigated two approaches for achieving redundancy of the Coordinator, which is the core of PREGMA: using the primary backup method and the active replication method. We evaluated the effectiveness of PREGMA in terms of throughput overhead, data integrity and recovery time. The results for a prototype show that PREGMA using the Coordinator with the primary backup method outperforms that with the active replication method and has throughput only 3% lower than a non-redundant system. The results also show that, in the event of failure, the recovery time is only less than one second and no data corruption occurs.

The problem of calculating parasitic capacitances between two interconnects is investigated dedicatedly for liquid crystal displays, with the main focus put on the approximate expressions of the capacitances caused at the intersection and the parallel running of two interconnects. To derive simple and accurate approximate expressions, the interconnects in these structures are divided into a few basic coupling regions in such a way that the electro-magnetic field in each region can be calculated by a 2-D capacitance model. Then the capacitance in such a region is represented by a simple expression adjusted to the results computed by an electro-magnetic field solver. The total capacitance obtained by summing the capacitances in all regions is evaluated in comparison with the one obtained by using a 3-D field solver, resulting in a relative error of less than 5%.

We propose an estimation method of crosstalk noise for generic RC trees. The proposed method derives an analytic waveform of crosstalk noise in a 2-π equivalent circuit. The peak voltage is calculated from the closed-form expression. We also develop a transformation method from generic RC trees with branches into the 2-π model circuit. The proposed method can hence estimate crosstalk noise for any RC trees. Our estimation method is evaluated in a 0.13 µm technology. The peak noise of two partially-coupled interconnects is estimated with the average error of 11%. Our method transforms generic RC interconnects with branches into the 2-π model with 14% error on average.

In this paper, we propose new physical design techniques to reduce crosstalk noise and crosstalk-induced delay variations caused in a nanometer-scale system-on-a-chip (SoC). We have almost eliminated the coupling effect between signal wires by simply optimizing parameters for the automatic place and route methodology. Our approach consists of two techniques, (1) A 3-D optimization technique for tuning the routing grid configuration both in the horizontal and vertical directions. (2) A co-optimization technique for tuning the cell utilization ratio and the routing grid simultaneously. Experiments on the design of an image processing circuit fabricated in a 0.13 µm CMOS process with six layers of copper interconnect show that crosstalk noise is almost eliminated. From the results of a static timing analysis considering the worst-case crosstalk condition, the longest path delay is decreased by about 15% maximum if technique (1) is used, and by about 7% maximum if technique (2) is used. The 7-15% delay reduction has been achieved without process improvement, and this reduction corresponds to between 1/4 and 1/2 generation of process progress.

This paper proposes a novel extraction method of line parameters for multi-coupled lines on high-speed and high-density PCBs, where it uses TDR measurement in time domain and S-parameter measurement in frequency domain. The accuracy of the proposed method have been verified experimentally by comparing the crosstalk noise in the time domain, where (1) the proposed method extracts RLGC matrices by measuring the test pattern, (2) the crosstalk noise is obtained through SPICE simulation using the extracted RLGC matrices, and (3) the SPICE-simulated crosstalk noise is compared with the measured crosstalk noise. From the crosstalk noise comparison, the proposed method is proven to be very accurate. For N-coupled lines, the proposed method doesn't require expensive 2N-port probe for N-coupled lines but only two-port probe, which provides a simple, accurate, and economic extraction method of line parameters for multi-coupled line on the PCB. In the early stage of PCB design, the proposed method is very useful, because it extracts accurate interconnection parameters of each test board and enables to compensate various side effects due to the variation of PCB fabrication process. Also, the proposed method is necessary to analyze the signal integrity of future high-density and high-speed digital system on PCBs.

A high-speed 32-bit RISC microcontroller has been developed. In order to realize high-speed operation with minimum hardware resource, we have developed new design and analysis methods such as a clock distribution, a bus-line layout, and an IR drop analysis. As a result, high-speed operation of 400 MHz has been achieved with power dissipation of 0.96 W at 1.8 V.

This paper presents a new method to evaluate time stamping schemes from three viewpoints: integrity of a time stamp, cost of issuing and verifying a time stamp and availability of the schemes. The main advantage of the proposed evaluation method is to clarify whether or not a certain scheme is optimal under certain prioritized requirements. Therefore, the proposed method can help potential users of time stamping services select an appropriate one which meets their prioritized requirements. In this paper, we explain the basic idea of the evaluation method and show how to use it by applying it to seven existing schemes.

This paper deals with security issues in a mobile agent system, especially protecting agent data from malicious servers. For this purpose, one-time key generation system, OKGS in short, is proposed. In OKGS, we integrate notions of an one-way hash function and a coupler. A one-way function plays a major role in ensuring confidentiality and integrity of agent data. And the notion of a coupler is used to establish inter-relationship among consecutive encryption keys for agent data, i.e,. all agent keys form a unidirectional chain. With these two features of OKGS, therefore, only the agent owner, who creates the agent bearing data, can decrypt and protect all agent data which are gathered in its itinerary.

The present paper modifies the algorithm to estimate harmful event frequencies and examines the definition of modes of operation in IEC 61508. As far as the continuous mode concerns, the calculated results coincide with those obtained based on the standard. However, for the intermediate region of medium demand frequencies and/or medium demand durations, the standard gives much higher harmful event frequencies than the real values. In order to avoid this difficulty, a new definition of modes of operation and a shortcut method for allocation of SILs are presented.

This paper presents a server-based approach to maintaining software integrity for all computer classroom workstations. The approach takes several advantages: (1) applicable to the FAT (file allocation table) and NTFS file systems, (2) renovating all workstations to workable state, (3) quickly adding or removing software systems to or from all workstations for teachers conducting new courses, and (4) automatically changing computer name and IP (Internet Protocol) address to an appointed one. The basic concept of the server-based maintenance approach is to install whole software systems, including operating system and applications, on a normal workstation, to make one image copy of the workstation's hard disk and store it onto network server, and to restore the image file from the server to the remaining workstations. In order to change computer name and IP automatically, this paper presents a searching heuristic for finding their locations in the image file. The heuristic is modified from Boyer-Moore (BM) algorithm and can improve the BM algorithm's performance over 9%.

A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.

Internet users have become well acquainted with the World Wide Web (WWW) system, and WWW has become the most significant service on the Internet. In the near future, the importance of large scale hypermedia database systems based on WWW technologies is expected to continue to increace. The present study focuses on the issue of managing hyperlink integrity constraints on WWW like hypermedia database systems. After formally defining path existence constraint definitions(PEDs) using intuitive examples, we apply the notion of PEDs to represent hyperlink integrity constraints. Intuitively, a PED can be used to represent the following integrity constraint. If a reference path exists in a given database, then another corresponding reference path must also exist. An outline of a prototype hypermedia database system, AYATORI, which is based on the proposed model and under development, is also mentioned.

This paper proposes a novel one-way hash function that can serve as a tool in achieving authenticity and data integrity. The one-way hash function can be viewed as a representative of a family of fast dedicated one-way hash functions whose construction is based on linear cellular automata over GF(a). The design and analysis of security of the function is accomplished by the use of very recently published results on cellular automata and their applications in cryptography. The analysis indicates that the one-way hash function is secure against all known attacks. A promising property of the proposed one-way hash function is that it is especially suitable for compact and fast implementation.

The EMC-adequate design of microelectronic systems includes all actions intended to eliminate electromagnetic interference in electronic systems. Challenges faced in the microelectronic area include a growing system complexity, high integration levels and higher operating speeds at all levels of integration (chip, MCM, printed circuit board and system). The growing complexity, denser design and higher speed all lead to a substantial increase in EMC problems and accordingly the design time. EMC is not commonly accepted as a vital topic in microelectronic design. Microelectronic designers often are of the opinion that EMC is limited to electrical and electronic systems and the mandatory product regulations instead of setting requirements also for the integrated circuit they are designing. In this contribution a concept for an EMC-adequate design of electronic systems will be introduced. This concept is based on a generalized development process to integrate EMC-constraints into the system design. A prototype of an environment to analyse signal integrity effects on PCB based on a workflow oriented integration approach will be presented. Based on this approach the generation of user specific design and analysis environments including various set of EMC-tools is possible.

Behavior modeling of objects is critical in object-oriented design. In particular, it is essential to preserve integrity constraints on object behavior in application environments where objects of various classes dynamically interact with each other. In order to provide a stable design technique, a behavior model using the notion of the life cycle schema of a class is proposed. To model the aspect of behavioral abstraction of objects, the notion of schema refinement together with a diagrammatic representation technique is also defined. In this framework, a formalization of behavior constraints on objects which interact with each other is proposed together with its graphical representation. Verification rules of consistency of behavior constraints are also discussed. In order to perform certain functions, several partner objects of the same or different classes should collaborate establishing client-server relationships. The contract of a class is defined as a collection of responsibilities of a server class to a client class where each responsibility is specified in the form of the script. To achieve a high degree of systems integrity, a procedure to derive scripts from behavior constraints on collaborating partners is developed. It is also critical to evenly distribute responsibilities to partner objects. A delegation is placing a whole or a part of responsibilities of an object in charge of other objects. Based on the design principle delegation along the aggregation hierarchy,' a unified design approach to delegation that enables to reorganize scripts in constraints preserving way is proposed.