NAT-PT and DSTM are becoming more widespread as de-facto standards for IPv6 dominant network deployment. But few researchers have empirically evaluated their performance aspects. In this paper, we compared the performance of NAT-PT and DSTM with IPv4-only and IPv6-only networks on user applications using metrics such as throughput, CPU utilization, round-trip time, and connect/request/response transaction rate.

In this letter, we propose an enhanced gentle distributed coordination function (GDCF), which is a simple and effective collision resolution mechanism, to improve the performance of IEEE 802.11 DCF. We compare performance of the enhanced GDCF with that of the legacy DCF and the conventional GDCF via analysis and simulations. The enhanced GDCF introduces a new counter to check the number of consecutively successful transmissions, and the maximum permitted values of the counter differ for different backoff stages. The proposed GDCF is shown to have performance superior to that of the conventional GDCF for various combinations of contending stations and frame length.

TCP performance in the IEEE 802.11-based multihop ad hoc networks is extremely poor, because the congestion control mechanism of TCP cannot effectively deal with the problem of packet drops caused by mobility and shared channel contention among wireless nodes. In this paper, we present a cross-layer method, which adaptively adjusts the TCP maximum window size according to the number of RTS (Request To Send) retry counts of the MAC layer at the TCP sender, to control the number of TCP packets in the network and thus decrease the channel contention. Our simulation results show that this method can remarkably improve TCP throughput and its stability.

Ad hoc networks have recently become a hot topic. In ad hoc networks, battery power is an important resource, since most terminals are battery powered. Terminals consume extra energy when their network interfaces are in the idle state or when they overhear packets not destined for them. They should, therefore, switch off their radio when they do not have to send or receive packets. IEEE802.11 features a power saving mechanism (PSM) in Distributed Coordination Function(DCF). In PSM for DCF, nodes must stay awake for a fixed time, called ATIM window (Ad-Hoc Traffic Indication Map window). If nodes do not have data to send or receive, they enter the doze state except for during ATIM window. However, ad hoc networks with PSM have longer end-to-end delays to deliver packets and suffer lower throughput than the standard IEEE802.11. To solve this problem, this paper proposes a protocol that reduces delay and achieves high throughput and energy efficiency. Simulation results show that our proposal outperforms other PSMs in terms of throughput, end-to-end delay and energy efficiency.

A novel threshold choosing method for the threshold-based skip mechanism is presented, in which the threshold is obtained from the analysis of the video device induced noise variance. Simulation results show that the proposed method can remarkably reduce the computation time consumption with only marginal performance penalty.

This paper presents an attempt to make rational active adversary passive using mechanism design. We propose a secure Generalized Vickrey Auction (GVA) scheme where the procedure executed by a bidder affects neither the prices nor the allocation of the bidder. Therefore, a bidder does not have an incentive to be an active adversary.

In the emerging networks, routing may be performed at various levels of the TCP/IP stack, such as datagram, TCP stream or application level, with possibly different message forwarding modes. We formulate an abstract quickest path problem for the transmission of a message of size σ from a source to a destination with the minimum end-to-end delay over a network with bandwidth and delay constraints on the links. We consider six modes for the message forwarding at the nodes reflecting the mechanisms such as circuit switching, store and forward, and their combinations. For each of first five modes, we present O( m2 + mn log n ) time algorithms to compute the quickest path for a given message size σ. For the last mode, the quickest path can be computed in O(m + n log n ) time.

Classical studies of Asynchronous Transfer Mode (ATM) switching elements and in particular the buffer behavior of the Shared Buffer Memory (SBM), assume that all read and write operations of cells to, respectively from, the SBM are executed simultaneously. However, in a real switching element, the inlets (outlets) are scanned sequentially for arriving (departing) cells during the so-called input (output) cycle. Furthermore, the input and output cycles are intermingled, each read operation being followed by a write operation. This is referred to as the Timeslot Interchange Mechanism (TIM). In this paper, we present the analysis of a queueing model that includes the TIM. We model the cell arrival processes on the inlets of the switching element as independent Bernoulli arrival processes. Moreover, we assume that cells are routed from the inlets to the outlets of the switching element according to an independent and uniform process, i.e., the destinations of consecutive cell arrivals on any given inlet are independent and for a given cell all destinations are equiprobable. Under these assumptions, we will derive expressions for the probability generating functions of the queue length in an individual routing group (a logical queue that contains all cells scheduled for the same destination), the (total) queue length in the SBM, and the cell waiting time. From these results, expressions for the mean values and the tail distributions of these quantities are calculated, and the influence of the TIM on the buffer behavior is studied through comparison with a model where all read and write operations occur simultaneously.

In this paper, we propose a preemptive test scheduling technique (a test can be interrupted and later resumed) for core-based systems with the objective to minimize the test application time. We make use of reconfigurable core test wrappers in order to increase the flexibility in the scheduling process. The advantage with such a wrapper is that it is not limited to a single TAM (test access mechanism) bandwidth (wrapper chain configuration) at each core. We model the scheduling problem as a Bin-packing problem, and we discuss the transformation: number of TAM wires (wrapper-chains) versus test time in combination with preemption, as well as the possibilities and the limitations to achieve an optimal solution in respect to test application time. We have implemented the proposed preemptive test scheduling algorithm, and we have through experiments demonstrated its efficiency.

This paper proposes an SoC test architecture generation framework. It contains a database, which stores the test cost information of several DFTs for every core, and a DFT selection part which performs DFT selection for minimizing the test application time using this database in the early phase of the design flow. Moreover, the DFT selection problem is formulated and the algorithm that solves this problem is proposed. Experimental results show that bottlenecks in test application time when using a single DFT method for all cores in an SoC is reduced by performing DFT selection from two types of DFTs. As a result, the whole test application time is drastically shortened.

We show a geometric method to compute the Van der Waals factor 1/r7 between the assemblies of amino acid molecules of the subunits of acetyl choline (abbreviated by Ach: a kind of neuro chemical transmitter) sensitive channel on the post synaptic membrane of the neural system. We induced a analytical geometric formula for the distances between helically arranged ten assemblies of the point amino acid molecules on two interacting membrane perforating poly peptides, M2 helices during channel opening deformation. Detailed geometric parameters have been utilized from reported biophysical measurements. The computed Van der Waals factor decreased rapidly as the slope of the first M2 helix along the central axis of the channel pore has increased. The Van der Waals factor also decreased by an increase in rising angle of the helically arranged amino acids on the M2 helices. The Van der Waals factor increased significantly as the first M2 helix has rotated around the central axis of the channel pore to take an opening position. We discussed the time dependent molecular structural changes of the Ach sensitive channel opening in conjunction with the Allosteric properties of the bio molecules. The molecular mechanism of Ach sensitive channel opening in terms of the Allosteric property may derive from the characteristic helical constitutional nature of the membrane perforating part (M2 helix) of the subunits of the channel molecule.

This paper presents a refined model for the fuzzy logic implementation of an available bit rate (ABR) flow control switch. This refined model is named fuzzy explicit rate (FUER) switch mechanism. FUER switch mechanism is designed to effectively perform congestion control on ABR traffic in asynchronous transfer mode (ATM) networks. The performance of FUER scheme is evaluated against those of two other explicit rate (ER)-based switch mechanisms using simulation in particular local area network (LAN) and wide area network (WAN) environments. On the whole, FUER scheme performs better than the other schemes. Although it has the smallest control parameter set, it is a more efficient and scalable ER-based switch mechanism.

In computer-aided drafting and design, interactive graphics is used to design components, systems, layouts, and structures. There are several approaches for using automated graphical layout tools currently. Our approach employs a genetic algorithm to implement a tool for automated 3D graphical layout design and presentation. The effective use of a genetic algorithm in automated graphical layout design relies on defining a fitness function that reflects user preferences. In this paper, we describe a method to define fitness functions and chromosome structures of selected objects. A learning mechanism is employed to adjust the fitness values of the objects in the selected layout chosen by the user. In our approach, the fitness functions can be changed adaptively reflecting user preferences. Experimental results revealed good performance of the adaptive fitness functions in our proposed mechanism.

We present a new technique for hierarchical intellectual property (IP) protection using partially-mergeable cores. The proposed core partitioning technique guarantees 100% protection of critical-IP, while simplifying test generation for the logic that is merged with the system. Since critical-IP is tested using BIST, the controllability and observability of internal lines in the core are enhanced, and test application time is reduced. Case studies using the ISIT-DLX and Picojava processor cores demonstrate the applicability of our technique.

We propose a mechanism to facilitate the development of component-based mobile applications with adaptive behaviors. The design principles and communication patterns of legacy software systems will greatly change in a forthcoming environment, where a variety of computing devices become embedded in home and office environments, users move around with/without portable computing devices, and all the devices are interconnected through wired/wireless networks. In the proposed mechanism, Improvised Assembly Mechanism (IAM), we realize functionality to compose an application in an ad hoc manner and to achieve the adaptation of applications by adding, replacing, supplementing, and relocating components at system runtime according to various environmental changes such as the locational changes of computing devices and users. The mechanism is implemented as a built-in functionality of the Soul component, which is one of the fundamental elements in the Possession model.

This paper describes two competitive learning algorithms from the viewpoint of deleting mechanisms of weight (reference) vectors. The techniques are termed the adaptivity and sensitivity deletions participated in the criteria of partition error and distortion error, respectively. Experimental results show the effectiveness of the proposed approaches in the average distortion.

Thin films of carbon (C)-sulfur (S) compound were formed by plasma CVD (PCVD) at the special chemical condition. The reactor has a parallel plate electrode system and was operated at a discharge frequency of 13.56 MHz with using a mixture gas of argon (Ar), methane (CH4) and SF6. The deposition was performed on a substrate placed on the grounded electrode. Atomic composition of the film was observed to depend on the gas mixture ratio. The sulfur atom density was increased up to 30% with using a mixture gas at a pressure of 0.1 Torr and at a flow rate of 20, 20 and 50 SCCM for Ar, CH4 and SF6, respectively. It was expected that the C-S compounds were deposited under the condition of F atom elimination by forming HF.

In this paper, we will present a study of the time-dependence effect in alumite perpendicular media at different thicknesses. Important parameters of the time-dependence effect such as magnetic viscosity and activation volume are investigated. Viscosity as a function of applied field (viscosity curve) exhibits a short plateau at a low field and then decreases monotonously with increasing field. After correcting for the demagnetizing field, the shape of the intrinsic viscosity curves changes to the well-known shape of the viscosity curve of in-plane media, i. e. , they have a peak near Hc. The intrinsic viscosity curves obtained from the experiments were fitted to an analytical model by Chantrell et al., from which, we found that the effective switching volumes obtained by fitting are much smaller than the column volumes, indicating that the reversal mechanism is incoherent.

This paper presents two competitive learning methods with the objective of avoiding the initial dependency of weight (reference) vectors. The first is termed the refractory and competitive learning algorithm. The algorithm has a refractory period: Once the cell has fired, a winner unit corresponding to the cell is not selected until a certain amount of time has passed. Thus, a specific unit does not become a winner in the early stage of processing. The second is termed the creative and competitive learning algorithm. The algorithm is presented as follows: First, only one output unit is prepared at the initial stage, and a weight vector according to the unit is updated under the competitive learning. Next, output units are created sequentially to a prespecified number based on the criterion of the partition error, and competitive learning is carried out until the ternimation condition is satisfied. Finally, we discuss algorithms which have little dependence on the initial values and compare them with the proposed algorithms. Experimental results are presented in order to show that the proposed methods are effective in the case of average distortion.

We propose a learning algorithm for self-organizing neural networks to form a topology preserving map from an input manifold whose topology may dynamically change. Experimental results show that the network using the proposed algorithm can rapidly adjust itself to represent the topology of nonstationary input distributions.