The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] mix(413hit)

181-200hit(413hit)

  • Advanced Assertion-Based Design for Mixed-Signal Verification

    Alexander JESSER  Stefan LAEMMERMANN  Alexander PACHOLIK  Roland WEISS  Juergen RUF  Lars HEDRICH  Wolfgang FENGLER  Thomas KROPF  Wolfgang ROSENSTIEL  

     
    PAPER-Logic Synthesis, Test and Verification

      Vol:
    E91-A No:12
      Page(s):
    3548-3555

    Functional and formal verification are important methodologies for complex mixed-signal design validation. However the industry is still verifying such systems by pure simulation. This process lacks on error localization and formal verifications methods. This is the existing verification gap between the analog and digital blocks within a mixed-signal system. Our approach improves the verification process by creating temporal properties named mixed-signal assertions which are described by a combination of digital assertions and analog properties. The proposed method is a new assertion-based verification flow for designing mixed-signal circuits. The effectiveness of the approach is demonstrated on a Σ/Δ-converter.

  • Simultaneous Tunable Wavelength Conversion and Power Amplification Using a Pump-Modulated Wide-Band Fiber Optical Parametric Amplifier

    Guo-Wei LU  Kazi Sarwar ABEDIN  Tetsuya MIYAZAKI  

     
    LETTER-Fiber-Optic Transmission for Communications

      Vol:
    E91-B No:11
      Page(s):
    3712-3714

    We propose and experimentally demonstrate an all-optical broadband wavelength conversion scheme with simultaneous power amplification based on a pump-modulated fiber optic parametric amplifier (FOPA). All-optical tunable wavelength conversion from one to two wavelengths was achieved with ≥13 dB extinction ratio and <2.7-dB power penalty, accompanied by a high (≥37 dB) and flat ( 3 dB variation) FOPA gain spectrum over 47 nm.

  • A GMM-Based Target Classification Scheme for a Node in Wireless Sensor Networks

    Youngsoo KIM  Sangbae JEONG  Daeyoung KIM  

     
    PAPER

      Vol:
    E91-B No:11
      Page(s):
    3544-3551

    In this paper, an efficient node-level target classification scheme in wireless sensor networks (WSNs) is proposed. It uses acoustic and seismic information, and its performance is verified by the classification accuracy of vehicles in a WSN. Because of the hard limitation in resources, parametric classifiers should be more preferable than non-parametric ones in WSN systems. As a parametric classifier, the Gaussian mixture model (GMM) algorithm not only shows good performances to classify targets in WSNs, but it also requires very few resources suitable to a sensor node. In addition, our sensor fusion method uses a decision tree, generated by the classification and regression tree (CART) algorithm, to improve the accuracy, so that the algorithm drives a considerable increase of the classification rate using less resources. Experimental results using a real dataset of WSN show that the proposed scheme shows a 94.10% classification rate and outperforms the k-nearest neighbors and the support vector machine.

  • Digital-Centric RF CMOS Technologies

    Akira MATSUZAWA  

     
    INVITED PAPER

      Vol:
    E91-C No:11
      Page(s):
    1720-1725

    Analog-centric RFCMOS technology has played an important role in motivating the change of technology from conventional discrete device technology or bipolar IC technology to CMOS technology. However it introduces many problems such as poor performance, susceptibility to PVT fluctuation, and cost increase with technology scaling. The most important advantage of CMOS technology compared with legacy RF technology is that CMOS can use more high performance digital circuits for very low cost. In fact, analog-centric RF-CMOS technology has failed the FM/AM tuner business and the digital-centric CMOS technology is becoming attractive for many users. It has many advantages; such as high performance, no external calibration points, high yield, and low cost. From the above facts, digital-centric CMOS technology which utilizes the advantages of digital technology must be the right path for future RF technology. Further investment in this technology is necessary for the advancement of RF technology.

  • A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals

    Youbean KIM  Kicheol KIM  Incheol KIM  Sungho KANG  

     
    LETTER-Integrated Electronics

      Vol:
    E91-C No:10
      Page(s):
    1713-1716

    Testing PLLs (phase-locked loops) is becoming an important issue that affects both time-to-market and production cost of electronic systems. Though a PLL is the most common mixed-signal building block, it is very difficult to test due to internal analog blocks and signals. In this paper, we propose a new PLL BIST (built-in self test) using the distorted frequency detector that uses only internal digital signals. The proposed BIST does not need to load any analog nodes of the PLL. Therefore, it provides an efficient defect-oriented structural test scheme, reduced area overhead, and improved test quality compared with previous approaches.

  • Text-Independent Speaker Verification Using Artificially Generated GMMs for Cohorts

    Yuuji MUKAI  Hideki NODA  Michiharu NIIMI  Takashi OSANAI  

     
    LETTER-Speech and Hearing

      Vol:
    E91-D No:10
      Page(s):
    2536-2539

    This paper presents a text-independent speaker verification method using Gaussian mixture models (GMMs), where only utterances of enrolled speakers are required. Artificial cohorts are used instead of those from speaker databases, and GMMs for artificial cohorts are generated by changing model parameters of the GMM for a claimed speaker. Equal error rates by the proposed method are about 60% less than those by a conventional method which also uses only utterances of enrolled speakers.

  • Combined Self-Test of Analog Portion and ADCs in Integrated Mixed-Signal Circuits

    Geng HU  Hong WANG  Shiyuan YANG  

     
    PAPER-Dependable Computing

      Vol:
    E91-D No:8
      Page(s):
    2134-2140

    Testing is a critical stage in integrated circuits production in order to guarantee reliability. The complexity and high integration level of mixed-signal ICs has put forward new challenges to circuit testing. This paper describes an oscillation-based combined self-test strategy for the analog portion and analog-to-digital converters (ADCs) in integrated mixed-signal circuits. In test mode, the analog portion under test is reconfigured into an oscillator, generating periodic signals as the test stimulus of ADC. By analyzing the A/D conversion results, a histogram test of ADC can be performed, and the oscillation frequency as well as amplitude can be checked, and in this way the oscillation test of the analog portion is realized simultaneously. For an analog benchmark circuit combined with an ADC, triangle oscillation and sinusoid oscillation schemes are both given to test their faults. Experimental results show that fault coverage of the analog portion is 92.2% and 94.3% in the two schemes respectively, and faults in the ADC can also be tested.

  • All-Optical Phase Multiplexing from π/2-Shifted DPSK-WDM to DQPSK Using Four-Wave Mixing in Highly-Nonlinear Fiber

    Guo-Wei LU  Kazi Sarwar ABEDIN  Tetsuya MIYAZAKI  

     
    PAPER

      Vol:
    E91-C No:7
      Page(s):
    1121-1128

    An all-optical phase multiplexing scheme for phase-modulated signals is proposed and experimentally demonstrated using four-wave mixing (FWM) in a highly-nonlinear fiber (HNLF). Two 10-Gb/s π/2-shifted differential phase-shift keying (DPSK) wavelength-division multiplexing (WDM) signals are experimentally demonstrated to be converted and phase-multiplexed into a 20-Gb/s differential quadrature phase-shift keying (DQPSK) signal with non-return-to-zero (NRZ) and return-to-zero (RZ) formats, respectively. Experimental results show that, due to phase-modulation-depth doubling effect and phase multiplexing effect in the FWM process, a DQPSK signal is successfully generated through the proposed all-optical phase multiplexing with improved receiver sensitivity and spectral efficiency.

  • FWM-Aware Dynamic Routing and Wavelength Assignment for Wavelength-Routed Optical Networks

    Adelys MARSDEN  Akihiro MARUTA  Ken-ichi KITAYAMA  

     
    PAPER

      Vol:
    E91-B No:7
      Page(s):
    2145-2151

    A dynamic routing and wavelength assignment (RWA) algorithm encompassing physical impairment due to Four-Wave Mixing (FWM) is proposed, assuming conventional On-Off-Keying (OOK) modulation format. The FWM effect is one of the most severe physical impairments to be considered for the future photonic networks since the accumulation of FWM crosstalk causes a fatal degradation in the wavelength-routed optical network performance. A novel cost function is introduced based upon an impairment-constraint-based routing (ICBR) approach, taking into account the network utilization resources and the physical impairment due to FWM crosstalk. Simulations results show that the proposed algorithm leads to a more realistic system performance compared to those of related approaches of dynamic RWA that fail to consider physical impairments into the routing scheme.

  • A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals

    Osamu WATANABE  Rui ITO  Toshiya MITOMO  Shigehito SAIGUSA  Tadashi ARAI  Takehiko TOYODA  

     
    PAPER

      Vol:
    E91-C No:6
      Page(s):
    837-843

    This paper presents a triple-band WCDMA direct conversion receiver (DCR) IC that needs a small number of off-chip components and control signals from digital baseband (DBB) IC. The DCR IC consists of 3 quadrature demodulators (QDEMs) with on-chip impedance matching circuit and an analog baseband block (ABB) that contains a low-pass filter (LPF) with fc automatic tuning circuit using no off-chip components and a linear-in-dB variable-gain amplifier (VGA) with on-chip analog high-pass filter (HPF). In order to make use of DBB control-free DC offset canceler, the DCR is designed to avoid large gain change under large interference that causes long transient response. In order to realize that characteristic without increasing quiescent current, the QDEM is used that employs class AB input stage and low-noise common mode feedback (CMFB) output stage. The DCR IC was fabricated in a SiGe BiCMOS process and occupies about 2.9 mm3.0 mm. The DCR needs SAW filters only for off-chip components and a gain control signal from DBB IC for AGC loop. The IIP3 of over -4.4 dBm for small signal input level and that of over +1.9 dBm for large signal input level are achieved. The gain compression of the desired signal is less than 0.3 dB for ACS Case-II condition.

  • Analysis of CMOS Transconductance Amplifiers for Sampling Mixers

    Ning LI  Win CHAIVIPAS  Kenichi OKADA  Akira MATSUZAWA  

     
    PAPER

      Vol:
    E91-C No:6
      Page(s):
    871-878

    In this paper the transfer function of a system with windowed current integration is discussed. This kind of integration is usually used in a sampling mixer and the current is generated by a transconductance amplifier (TA). The parasitic capacitance (Cp) and the output resistance of the TA (Ro,TA) before the sampling mixer heavily affect the performance. Calculations based on a model including the parasitic capacitance and the output resistance of the TA is carried out. Calculation results show that due to the parasitic capacitance, a notch at the sampling frequency appears, which is very harmful because it causes the gain near the sampling frequency to decrease greatly. The output resistance of the TA makes the depth of the notches shallow and decreases the gain near the sampling frequency. To suppress the effect of Cp and Ro,TA, an operational amplifier is introduced in parallel with the sampling capacitance (Cs). Simulation results show that there is a 17 dB gain increase while Cs is 1,pF, gm is 9,mS, N is 8 with a clock rate of 800,MHz.

  • Feature Compensation Employing Multiple Environmental Models for Robust In-Vehicle Speech Recognition

    Wooil KIM  John H.L. HANSEN  

     
    PAPER-Noisy Speech Recognition

      Vol:
    E91-D No:3
      Page(s):
    430-438

    An effective feature compensation method is developed for reliable speech recognition in real-life in-vehicle environments. The CU-Move corpus, used for evaluation, contains a range of speech and noise signals collected for a number of speakers under actual driving conditions. PCGMM-based feature compensation, considered in this paper, utilizes parallel model combination to generate noise-corrupted speech model by combining clean speech and the noise model. In order to address unknown time-varying background noise, an interpolation method of multiple environmental models is employed. To alleviate computational expenses due to multiple models, an Environment Transition Model is employed, which is motivated from Noise Language Model used in Environmental Sniffing. An environment dependent scheme of mixture sharing technique is proposed and shown to be more effective in reducing the computational complexity. A smaller environmental model set is determined by the environment transition model for mixture sharing. The proposed scheme is evaluated on the connected single digits portion of the CU-Move database using the Aurora2 evaluation toolkit. Experimental results indicate that our feature compensation method is effective for improving speech recognition in real-life in-vehicle conditions. A reduction of 73.10% of the computational requirements was obtained by employing the environment dependent mixture sharing scheme with only a slight change in recognition performance. This demonstrates that the proposed method is effective in maintaining the distinctive characteristics among the different environmental models, even when selecting a large number of Gaussian components for mixture sharing.

  • Numerical and Experimental Impedance Analyses of Dipole Antenna in the Vicinity of Deionized Water at Different Temperatures

    Amin SAEEDFAR  Hiroyasu SATO  Kunio SAWAYA  

     
    LETTER-Antennas and Propagation

      Vol:
    E91-B No:3
      Page(s):
    963-967

    This paper includes different approaches for analysis of a thin-wire antenna in the presence of de-ionized water box at different temperatures as a high-permittivity three-dimensional dielectric body. In continuation with the previous work of authors, first, the coupled tensor-volume/line integral equations is solved by using Galerkin-based moment method (MoM) consisting of a combination of entire-domain and sub-domain basis functions including three-dimensional polynomials with different degrees. Then, the accuracy of such MoM, specifically for a high-permittivity dielectric scatterer, is substantiated by comparing its numerical results with that of FDTD method and some experimental data.

  • Advances in High-Tc Single Flux Quantum Device Technologies

    Keiichi TANABE  Hironori WAKANA  Koji TSUBONE  Yoshinobu TARUTANI  Seiji ADACHI  Yoshihiro ISHIMARU  Michitaka MARUYAMA  Tsunehiro HATO  Akira YOSHIDA  Hideo SUZUKI  

     
    INVITED PAPER

      Vol:
    E91-C No:3
      Page(s):
    280-292

    We have developed the fabrication process, the circuit design technology, and the cryopackaging technology for high-Tc single flux quantum (SFQ) devices with the aim of application to an analog-to-digital (A/D) converter circuit for future wireless communication and a sampler system for high-speed measurements. Reproducibility of fabricating ramp-edge Josephson junctions with IcRn products above 1 mV at 40 K and small Ic spreads on a superconducting groundplane was much improved by employing smooth multilayer structures and optimizing the junction fabrication process. The separated base-electrode layout (SBL) method that suppresses the Jc spread for interface-modified junctions in circuits was developed. This method enabled low-frequency logic operations of various elementary SFQ circuits with relatively wide bias current margins and operation of a toggle-flip-flop (T-FF) above 200 GHz at 40 K. Operation of a 1:2 demultiplexer, one of main elements of a hybrid-type Σ-Δ A/D converter circuit, was also demonstrated. We developed a sampler system in which a sampler circuit with a potential bandwidth over 100 GHz was cooled by a compact stirling cooler, and waveform observation experiments confirmed the actual system bandwidth well over 50 GHz.

  • Throughput Enhancement Using Adaptive Delay Barrier Function over HSDPA System in Mixed Traffic Scenarios

    Yong-Seok KIM  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E91-B No:2
      Page(s):
    488-493

    In this paper, we consider a method to enhance the throughput of HSDPA systems in the mixed traffic scenario. A channel-dependent adaptive delay barrier (DB) function is proposed to maximize throughput of best-effort (BE) traffic while satisfying the delay latency of voice over internet protocol (VoIP) service. Simulations show that the proposed channel-adaptive DB function raises the throughput of BE traffic service by 30% compared to the conventional scheme, without degrading the capacity of VoIP service over HSDPA system.

  • An IIP2 Calibration Technique for Zero-IF Multi Band down Converter Mixer

    Mohammad B. VAHIDFAR  Omid SHOAEI  

     
    PAPER

      Vol:
    E91-A No:2
      Page(s):
    529-534

    Meeting the tough linearity and noise required by GSM and UMTS receivers in CMOS technology is challenging. A new IIP2 calibration technique based on canceling the second order nonlinearities of mixer, generated in the input RF transistors, is introduced. By using this technique about 22 dB mixer IIP2 improvement is achieved. The proposed calibration circuit can be used in multi-standard mixer because of high bandwidth of the calibration circuitry. Moreover it can work with voltage supplies as low as 1 V. Using this technique a multi-standard mixer supporting PCS, UMTS and IEEE802.11b-g is developed. The design is done in CMOS 65 nm technology with 1.2 V supply while it consumes about 7 mA current.

  • A 2-GHz Low-Power Down-Conversion Mixer in 0.18-µm CMOS Technology

    Jun-Da CHEN  Zhi-Ming LIN  Jeen-Sheen ROW  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E91-C No:1
      Page(s):
    64-71

    A low-voltage and low-power RF mixer for WCDMA applications is presented. The paper presents a novel topology mixer that leads to a better performance in terms of isolation and power consumption for low supply voltage. The measuring results of the proposed mixer achieve: 7 dB power conversion gain, 10.4 dB double side band (DSB) noise figure, -2 dBm input third-order intercept point (IIP3), and the total dc power consumption of this mixer including output buffers is 2.2 mW from a 1 V supply voltage. The current output buffer is about 1.96 mW, the excellent LO-RF, LO-IF and RF-IF isolation achieved up to 49 dB, 39.5 dB and 57.3 dB, respectively.

  • Batch Processing for Proofs of Partial Knowledge and Its Applications

    Koji CHIDA  Go YAMAMOTO  

     
    PAPER-Protocols

      Vol:
    E91-A No:1
      Page(s):
    150-159

    This paper presents batch processing protocols for efficiently proving a great deal of partial knowledge. These protocols reduce the computation and communication costs for a MIX-net and secure circuit evaluation. The efficiency levels of the proposed protocols are estimated based on the implementation results of a secure circuit evaluation with batch processing.

  • A Distortion-Free Learning Algorithm for Feedforward Multi-Channel Blind Source Separation

    Akihide HORITA  Kenji NAKAYAMA  Akihiro HIRANO  

     
    PAPER-Digital Signal Processing

      Vol:
    E90-A No:12
      Page(s):
    2835-2845

    FeedForward (FF-) Blind Source Separation (BSS) systems have some degree of freedom in the solution space. Therefore, signal distortion is likely to occur. First, a criterion for the signal distortion is discussed. Properties of conventional methods proposed to suppress the signal distortion are analyzed. Next, a general condition for complete separation and distortion-free is derived for multi-channel FF-BSS systems. This condition is incorporated in learning algorithms as a distortion-free constraint. Computer simulations using speech signals and stationary colored signals are performed for the conventional methods and for the new learning algorithms employing the proposed distortion-free constraint. The proposed method can well suppress signal distortion, while maintaining a high source separation performance.

  • Method for Visualizing Complicated Structures Based on Unified Simplification Strategy

    Hiroki OMOTE  Kozo SUGIYAMA  

     
    PAPER

      Vol:
    E90-D No:10
      Page(s):
    1649-1656

    In this paper, we present a novel force-directed method for automatically drawing intersecting compound mixed graphs (ICMGs) that can express complicated relations among elements such as adjacency, inclusion, and intersection. For this purpose, we take a strategy called unified simplification that can transform layout problem for an ICMG into that for an undirected graph. This method is useful for various information visualizations. We describe definitions, aesthetics, force model, algorithm, evaluation, and applications.

181-200hit(413hit)